Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ |
| 18 | #define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ |
| 19 | |
| 20 | #include <vector> |
| 21 | |
| 22 | #include "base/logging.h" |
| 23 | #include "constants_arm.h" |
| 24 | #include "utils/arm/managed_register_arm.h" |
| 25 | #include "utils/arm/assembler_arm.h" |
| 26 | #include "offsets.h" |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 27 | |
| 28 | namespace art { |
| 29 | namespace arm { |
| 30 | |
| 31 | class Arm32Assembler FINAL : public ArmAssembler { |
| 32 | public: |
| 33 | Arm32Assembler() { |
| 34 | } |
| 35 | virtual ~Arm32Assembler() {} |
| 36 | |
| 37 | bool IsThumb() const OVERRIDE { |
| 38 | return false; |
| 39 | } |
| 40 | |
| 41 | // Data-processing instructions. |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 42 | virtual void and_(Register rd, Register rn, const ShifterOperand& so, |
| 43 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 44 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 45 | virtual void eor(Register rd, Register rn, const ShifterOperand& so, |
| 46 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 47 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 48 | virtual void sub(Register rd, Register rn, const ShifterOperand& so, |
| 49 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 50 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 51 | virtual void rsb(Register rd, Register rn, const ShifterOperand& so, |
| 52 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 53 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 54 | virtual void add(Register rd, Register rn, const ShifterOperand& so, |
| 55 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 56 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 57 | virtual void adc(Register rd, Register rn, const ShifterOperand& so, |
| 58 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 59 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 60 | virtual void sbc(Register rd, Register rn, const ShifterOperand& so, |
| 61 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 62 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 63 | virtual void rsc(Register rd, Register rn, const ShifterOperand& so, |
| 64 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 65 | |
| 66 | void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 67 | |
| 68 | void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 69 | |
| 70 | void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 71 | |
| 72 | void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; |
| 73 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 74 | virtual void orr(Register rd, Register rn, const ShifterOperand& so, |
| 75 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 76 | |
Vladimir Marko | d2b4ca2 | 2015-09-14 15:13:26 +0100 | [diff] [blame] | 77 | virtual void orn(Register rd, Register rn, const ShifterOperand& so, |
| 78 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 79 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 80 | virtual void mov(Register rd, const ShifterOperand& so, |
| 81 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 82 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 83 | virtual void bic(Register rd, Register rn, const ShifterOperand& so, |
| 84 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 85 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 86 | virtual void mvn(Register rd, const ShifterOperand& so, |
| 87 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 88 | |
| 89 | // Miscellaneous data-processing instructions. |
| 90 | void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
| 91 | void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; |
| 92 | void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE; |
Scott Wakeling | 9ee23f4 | 2015-07-23 10:44:35 +0100 | [diff] [blame] | 93 | void rbit(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 94 | |
| 95 | // Multiply instructions. |
| 96 | void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; |
| 97 | void mla(Register rd, Register rn, Register rm, Register ra, |
| 98 | Condition cond = AL) OVERRIDE; |
| 99 | void mls(Register rd, Register rn, Register rm, Register ra, |
| 100 | Condition cond = AL) OVERRIDE; |
Zheng Xu | c666710 | 2015-05-15 16:08:45 +0800 | [diff] [blame] | 101 | void smull(Register rd_lo, Register rd_hi, Register rn, Register rm, |
| 102 | Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 103 | void umull(Register rd_lo, Register rd_hi, Register rn, Register rm, |
| 104 | Condition cond = AL) OVERRIDE; |
| 105 | |
| 106 | void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; |
| 107 | void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE; |
| 108 | |
Roland Levillain | 981e454 | 2014-11-14 11:47:14 +0000 | [diff] [blame] | 109 | // Bit field extract instructions. |
Roland Levillain | 51d3fc4 | 2014-11-13 14:11:42 +0000 | [diff] [blame] | 110 | void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE; |
Roland Levillain | 981e454 | 2014-11-14 11:47:14 +0000 | [diff] [blame] | 111 | void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE; |
Roland Levillain | 51d3fc4 | 2014-11-13 14:11:42 +0000 | [diff] [blame] | 112 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 113 | // Load/store instructions. |
| 114 | void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 115 | void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 116 | |
| 117 | void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 118 | void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 119 | |
| 120 | void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 121 | void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 122 | |
| 123 | void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 124 | void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 125 | |
| 126 | void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 127 | void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 128 | |
| 129 | void ldm(BlockAddressMode am, Register base, |
| 130 | RegList regs, Condition cond = AL) OVERRIDE; |
| 131 | void stm(BlockAddressMode am, Register base, |
| 132 | RegList regs, Condition cond = AL) OVERRIDE; |
| 133 | |
| 134 | void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE; |
| 135 | void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE; |
Calin Juravle | 52c4896 | 2014-12-16 17:02:57 +0000 | [diff] [blame] | 136 | void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; |
| 137 | void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 138 | |
| 139 | // Miscellaneous instructions. |
| 140 | void clrex(Condition cond = AL) OVERRIDE; |
| 141 | void nop(Condition cond = AL) OVERRIDE; |
| 142 | |
| 143 | // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0. |
| 144 | void bkpt(uint16_t imm16) OVERRIDE; |
| 145 | void svc(uint32_t imm24) OVERRIDE; |
| 146 | |
| 147 | void cbz(Register rn, Label* target) OVERRIDE; |
| 148 | void cbnz(Register rn, Label* target) OVERRIDE; |
| 149 | |
| 150 | // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles). |
| 151 | void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE; |
| 152 | void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE; |
| 153 | void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; |
| 154 | void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE; |
| 155 | void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE; |
| 156 | void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE; |
| 157 | void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 158 | void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 159 | |
| 160 | // Returns false if the immediate cannot be encoded. |
| 161 | bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE; |
| 162 | bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE; |
| 163 | |
| 164 | void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 165 | void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 166 | void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 167 | void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; |
| 168 | |
| 169 | void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 170 | void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 171 | void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 172 | void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 173 | void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 174 | void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 175 | void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 176 | void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 177 | void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 178 | void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 179 | void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE; |
| 180 | void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; |
| 181 | |
| 182 | void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 183 | void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 184 | void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 185 | void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 186 | void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 187 | void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 188 | |
| 189 | void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 190 | void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 191 | void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 192 | void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 193 | void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 194 | void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 195 | void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 196 | void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 197 | void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 198 | void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 199 | |
| 200 | void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE; |
| 201 | void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; |
| 202 | void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE; |
| 203 | void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE; |
| 204 | void vmstat(Condition cond = AL) OVERRIDE; // VMRS APSR_nzcv, FPSCR |
| 205 | |
| 206 | void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 207 | void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 208 | void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 209 | void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; |
| 210 | |
| 211 | // Branch instructions. |
Nicolas Geoffray | d56376c | 2015-05-21 12:32:34 +0000 | [diff] [blame] | 212 | void b(Label* label, Condition cond = AL) OVERRIDE; |
| 213 | void bl(Label* label, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 214 | void blx(Register rm, Condition cond = AL) OVERRIDE; |
| 215 | void bx(Register rm, Condition cond = AL) OVERRIDE; |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 216 | virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, |
| 217 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 218 | virtual void Lsr(Register rd, Register rm, uint32_t shift_imm, |
| 219 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 220 | virtual void Asr(Register rd, Register rm, uint32_t shift_imm, |
| 221 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 222 | virtual void Ror(Register rd, Register rm, uint32_t shift_imm, |
| 223 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 224 | virtual void Rrx(Register rd, Register rm, |
| 225 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 45fdb93 | 2014-06-25 12:37:10 -0700 | [diff] [blame] | 226 | |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 227 | virtual void Lsl(Register rd, Register rm, Register rn, |
| 228 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 229 | virtual void Lsr(Register rd, Register rm, Register rn, |
| 230 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 231 | virtual void Asr(Register rd, Register rm, Register rn, |
| 232 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
| 233 | virtual void Ror(Register rd, Register rm, Register rn, |
| 234 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 235 | |
| 236 | void Push(Register rd, Condition cond = AL) OVERRIDE; |
| 237 | void Pop(Register rd, Condition cond = AL) OVERRIDE; |
| 238 | |
| 239 | void PushList(RegList regs, Condition cond = AL) OVERRIDE; |
| 240 | void PopList(RegList regs, Condition cond = AL) OVERRIDE; |
| 241 | |
| 242 | void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE; |
| 243 | |
| 244 | void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE; |
| 245 | void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE; |
| 246 | |
Nicolas Geoffray | 19a19cf | 2014-10-22 16:07:05 +0100 | [diff] [blame] | 247 | // Memory barriers. |
| 248 | void dmb(DmbOptions flavor) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 249 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 250 | // Get the final position of a label after local fixup based on the old position |
| 251 | // recorded before FinalizeCode(). |
| 252 | uint32_t GetAdjustedPosition(uint32_t old_position) OVERRIDE; |
| 253 | |
| 254 | Literal* NewLiteral(size_t size, const uint8_t* data) OVERRIDE; |
| 255 | void LoadLiteral(Register rt, Literal* literal) OVERRIDE; |
| 256 | void LoadLiteral(Register rt, Register rt2, Literal* literal) OVERRIDE; |
| 257 | void LoadLiteral(SRegister sd, Literal* literal) OVERRIDE; |
| 258 | void LoadLiteral(DRegister dd, Literal* literal) OVERRIDE; |
| 259 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 260 | // Add signed constant value to rd. May clobber IP. |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 261 | void AddConstant(Register rd, Register rn, int32_t value, |
Vladimir Marko | 449b109 | 2015-09-08 12:16:45 +0100 | [diff] [blame] | 262 | Condition cond = AL, SetCc set_cc = kCcDontCare) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 263 | |
Andreas Gampe | 7cffc3b | 2015-10-19 21:31:53 -0700 | [diff] [blame] | 264 | void CmpConstant(Register rn, int32_t value, Condition cond = AL) OVERRIDE; |
| 265 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 266 | // Load and Store. May clobber IP. |
| 267 | void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 268 | void MarkExceptionHandler(Label* label) OVERRIDE; |
| 269 | void LoadFromOffset(LoadOperandType type, |
| 270 | Register reg, |
| 271 | Register base, |
| 272 | int32_t offset, |
| 273 | Condition cond = AL) OVERRIDE; |
| 274 | void StoreToOffset(StoreOperandType type, |
| 275 | Register reg, |
| 276 | Register base, |
| 277 | int32_t offset, |
| 278 | Condition cond = AL) OVERRIDE; |
| 279 | void LoadSFromOffset(SRegister reg, |
| 280 | Register base, |
| 281 | int32_t offset, |
| 282 | Condition cond = AL) OVERRIDE; |
| 283 | void StoreSToOffset(SRegister reg, |
| 284 | Register base, |
| 285 | int32_t offset, |
| 286 | Condition cond = AL) OVERRIDE; |
| 287 | void LoadDFromOffset(DRegister reg, |
| 288 | Register base, |
| 289 | int32_t offset, |
| 290 | Condition cond = AL) OVERRIDE; |
| 291 | void StoreDToOffset(DRegister reg, |
| 292 | Register base, |
| 293 | int32_t offset, |
| 294 | Condition cond = AL) OVERRIDE; |
| 295 | |
Nicolas Geoffray | 3bcc8ea | 2014-11-28 15:00:02 +0000 | [diff] [blame] | 296 | bool ShifterOperandCanHold(Register rd, |
| 297 | Register rn, |
| 298 | Opcode opcode, |
| 299 | uint32_t immediate, |
| 300 | ShifterOperand* shifter_op) OVERRIDE; |
| 301 | |
Nicolas Geoffray | 5bd05a5 | 2015-10-13 09:48:30 +0100 | [diff] [blame] | 302 | bool ShifterOperandCanAlwaysHold(uint32_t immediate) OVERRIDE; |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 303 | |
Ian Rogers | 1373595 | 2014-10-08 12:43:28 -0700 | [diff] [blame] | 304 | static bool IsInstructionForExceptionHandling(uintptr_t pc); |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 305 | |
| 306 | // Emit data (e.g. encoded instruction or immediate) to the |
| 307 | // instruction stream. |
| 308 | void Emit(int32_t value); |
| 309 | void Bind(Label* label) OVERRIDE; |
| 310 | |
| 311 | void MemoryBarrier(ManagedRegister scratch) OVERRIDE; |
| 312 | |
Andreas Gampe | 7cffc3b | 2015-10-19 21:31:53 -0700 | [diff] [blame] | 313 | JumpTable* CreateJumpTable(std::vector<Label*>&& labels, Register base_reg) OVERRIDE; |
| 314 | void EmitJumpTableDispatch(JumpTable* jump_table, Register displacement_reg) OVERRIDE; |
| 315 | |
| 316 | void FinalizeCode() OVERRIDE; |
| 317 | |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 318 | private: |
| 319 | void EmitType01(Condition cond, |
| 320 | int type, |
| 321 | Opcode opcode, |
Vladimir Marko | 73cf0fb | 2015-07-30 15:07:22 +0100 | [diff] [blame] | 322 | SetCc set_cc, |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 323 | Register rn, |
| 324 | Register rd, |
| 325 | const ShifterOperand& so); |
| 326 | |
| 327 | void EmitType5(Condition cond, int offset, bool link); |
| 328 | |
| 329 | void EmitMemOp(Condition cond, |
| 330 | bool load, |
| 331 | bool byte, |
| 332 | Register rd, |
| 333 | const Address& ad); |
| 334 | |
| 335 | void EmitMemOpAddressMode3(Condition cond, |
| 336 | int32_t mode, |
| 337 | Register rd, |
| 338 | const Address& ad); |
| 339 | |
| 340 | void EmitMultiMemOp(Condition cond, |
| 341 | BlockAddressMode am, |
| 342 | bool load, |
| 343 | Register base, |
| 344 | RegList regs); |
| 345 | |
| 346 | void EmitShiftImmediate(Condition cond, |
| 347 | Shift opcode, |
| 348 | Register rd, |
| 349 | Register rm, |
| 350 | const ShifterOperand& so); |
| 351 | |
| 352 | void EmitShiftRegister(Condition cond, |
| 353 | Shift opcode, |
| 354 | Register rd, |
| 355 | Register rm, |
| 356 | const ShifterOperand& so); |
| 357 | |
| 358 | void EmitMulOp(Condition cond, |
| 359 | int32_t opcode, |
| 360 | Register rd, |
| 361 | Register rn, |
| 362 | Register rm, |
| 363 | Register rs); |
| 364 | |
| 365 | void EmitVFPsss(Condition cond, |
| 366 | int32_t opcode, |
| 367 | SRegister sd, |
| 368 | SRegister sn, |
| 369 | SRegister sm); |
| 370 | |
| 371 | void EmitVFPddd(Condition cond, |
| 372 | int32_t opcode, |
| 373 | DRegister dd, |
| 374 | DRegister dn, |
| 375 | DRegister dm); |
| 376 | |
| 377 | void EmitVFPsd(Condition cond, |
| 378 | int32_t opcode, |
| 379 | SRegister sd, |
| 380 | DRegister dm); |
| 381 | |
| 382 | void EmitVFPds(Condition cond, |
| 383 | int32_t opcode, |
| 384 | DRegister dd, |
| 385 | SRegister sm); |
| 386 | |
| 387 | void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond); |
| 388 | |
| 389 | void EmitBranch(Condition cond, Label* label, bool link); |
| 390 | static int32_t EncodeBranchOffset(int offset, int32_t inst); |
| 391 | static int DecodeBranchOffset(int32_t inst); |
| 392 | int32_t EncodeTstOffset(int offset, int32_t inst); |
| 393 | int DecodeTstOffset(int32_t inst); |
Nicolas Geoffray | 3bcc8ea | 2014-11-28 15:00:02 +0000 | [diff] [blame] | 394 | bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op); |
Dave Allison | 65fcc2c | 2014-04-28 13:45:27 -0700 | [diff] [blame] | 395 | }; |
| 396 | |
| 397 | } // namespace arm |
| 398 | } // namespace art |
| 399 | |
| 400 | #endif // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_ |