| Bill Buzbee | 7c58bd4 | 2016-01-20 20:46:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Long integer shift. This is different from the generic 32/64-bit |
| 3 | * binary operations because vAA/vBB are 64-bit but vCC (the shift |
| 4 | * distance) is 32-bit. Also, Dalvik requires us to mask off the low |
| 5 | * 6 bits of the shift distance. x86 shifts automatically mask off |
| 6 | * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 |
| 7 | * case specially. |
| 8 | */ |
| 9 | /* shr-long vAA, vBB, vCC */ |
| 10 | /* ecx gets shift count */ |
| 11 | /* Need to spill rIBASE */ |
| 12 | /* rINSTw gets AA */ |
| 13 | movzbl 2(rPC), %eax # eax <- BB |
| 14 | movzbl 3(rPC), %ecx # ecx <- CC |
| 15 | movl rIBASE, LOCAL0(%esp) |
| Serguei Katkov | 05dfaaa | 2016-01-28 08:21:26 +0600 | [diff] [blame] | 16 | GET_VREG_HIGH rIBASE, %eax # rIBASE<- v[BB+1] |
| 17 | GET_VREG %ecx, %ecx # ecx <- vCC |
| 18 | GET_VREG %eax, %eax # eax <- v[BB+0] |
| Bill Buzbee | 7c58bd4 | 2016-01-20 20:46:01 +0000 | [diff] [blame] | 19 | shrdl rIBASE, %eax |
| 20 | sarl %cl, rIBASE |
| 21 | testb $$32, %cl |
| 22 | je 2f |
| 23 | movl rIBASE, %eax |
| 24 | sarl $$31, rIBASE |
| 25 | 2: |
| Serguei Katkov | 05dfaaa | 2016-01-28 08:21:26 +0600 | [diff] [blame] | 26 | SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE |
| Bill Buzbee | 7c58bd4 | 2016-01-20 20:46:01 +0000 | [diff] [blame] | 27 | movl LOCAL0(%esp), rIBASE |
| Serguei Katkov | 05dfaaa | 2016-01-28 08:21:26 +0600 | [diff] [blame] | 28 | SET_VREG %eax, rINST # v[AA+0] <- eax |
| Bill Buzbee | 7c58bd4 | 2016-01-20 20:46:01 +0000 | [diff] [blame] | 29 | ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 |