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LeafOS / LeafOS-Project / android_art / 72783ff32da5d3f025bbe1636cee84328f1135c6 / . / compiler / utils / arm / assembler_arm32.h
blob: 1c38eec12c43bc8ba5214d0d5b4cca56175293f2 [file] [log] [blame]
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]1/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
18#define ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_
19
20#include <vector>
21
22#include "base/logging.h"
23#include "constants_arm.h"
24#include "utils/arm/managed_register_arm.h"
25#include "utils/arm/assembler_arm.h"
26#include "offsets.h"
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]27
28namespace art {
29namespace arm {
30
31class Arm32Assembler FINAL : public ArmAssembler {
32 public:
33 Arm32Assembler() {
34 }
35 virtual ~Arm32Assembler() {}
36
37 bool IsThumb() const OVERRIDE {
38 return false;
39 }
40
41 // Data-processing instructions.
42 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
43
44 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
45
46 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
47 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
48
49 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
50 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
51
52 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
53
54 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
55
56 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
57
58 void sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
59
60 void rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
61
62 void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
63
64 void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
65
66 void cmp(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
67
68 void cmn(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
69
70 void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
71 void orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
72
73 void mov(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
74 void movs(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
75
76 void bic(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
77
78 void mvn(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
79 void mvns(Register rd, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
80
81 // Miscellaneous data-processing instructions.
82 void clz(Register rd, Register rm, Condition cond = AL) OVERRIDE;
83 void movw(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
84 void movt(Register rd, uint16_t imm16, Condition cond = AL) OVERRIDE;
85
86 // Multiply instructions.
87 void mul(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
88 void mla(Register rd, Register rn, Register rm, Register ra,
89 Condition cond = AL) OVERRIDE;
90 void mls(Register rd, Register rn, Register rm, Register ra,
91 Condition cond = AL) OVERRIDE;
Zheng Xuc6667102015-05-15 16:08:45 +0800[diff] [blame]92 void smull(Register rd_lo, Register rd_hi, Register rn, Register rm,
93 Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]94 void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
95 Condition cond = AL) OVERRIDE;
96
97 void sdiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
98 void udiv(Register rd, Register rn, Register rm, Condition cond = AL) OVERRIDE;
99
Roland Levillain981e4542014-11-14 11:47:14 +0000[diff] [blame]100 // Bit field extract instructions.
Roland Levillain51d3fc42014-11-13 14:11:42 +0000[diff] [blame]101 void sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
Roland Levillain981e4542014-11-14 11:47:14 +0000[diff] [blame]102 void ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond = AL) OVERRIDE;
Roland Levillain51d3fc42014-11-13 14:11:42 +0000[diff] [blame]103
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]104 // Load/store instructions.
105 void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
106 void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
107
108 void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
109 void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
110
111 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
112 void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
113
114 void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
115 void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
116
117 void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
118 void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
119
120 void ldm(BlockAddressMode am, Register base,
121 RegList regs, Condition cond = AL) OVERRIDE;
122 void stm(BlockAddressMode am, Register base,
123 RegList regs, Condition cond = AL) OVERRIDE;
124
125 void ldrex(Register rd, Register rn, Condition cond = AL) OVERRIDE;
126 void strex(Register rd, Register rt, Register rn, Condition cond = AL) OVERRIDE;
Calin Juravle52c48962014-12-16 17:02:57 +0000[diff] [blame]127 void ldrexd(Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
128 void strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]129
130 // Miscellaneous instructions.
131 void clrex(Condition cond = AL) OVERRIDE;
132 void nop(Condition cond = AL) OVERRIDE;
133
134 // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
135 void bkpt(uint16_t imm16) OVERRIDE;
136 void svc(uint32_t imm24) OVERRIDE;
137
138 void cbz(Register rn, Label* target) OVERRIDE;
139 void cbnz(Register rn, Label* target) OVERRIDE;
140
141 // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles).
142 void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE;
143 void vmovrs(Register rt, SRegister sn, Condition cond = AL) OVERRIDE;
144 void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
145 void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL) OVERRIDE;
146 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL) OVERRIDE;
147 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
148 void vmovs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
149 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
150
151 // Returns false if the immediate cannot be encoded.
152 bool vmovs(SRegister sd, float s_imm, Condition cond = AL) OVERRIDE;
153 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
154
155 void vldrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
156 void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
157 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
158 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
159
160 void vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
161 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
162 void vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
163 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
164 void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
165 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
166 void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
167 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
168 void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
169 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
170 void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL) OVERRIDE;
171 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
172
173 void vabss(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
174 void vabsd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
175 void vnegs(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
176 void vnegd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
177 void vsqrts(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
178 void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
179
180 void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
181 void vcvtds(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
182 void vcvtis(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
183 void vcvtid(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
184 void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
185 void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
186 void vcvtus(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
187 void vcvtud(SRegister sd, DRegister dm, Condition cond = AL) OVERRIDE;
188 void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
189 void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL) OVERRIDE;
190
191 void vcmps(SRegister sd, SRegister sm, Condition cond = AL) OVERRIDE;
192 void vcmpd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
193 void vcmpsz(SRegister sd, Condition cond = AL) OVERRIDE;
194 void vcmpdz(DRegister dd, Condition cond = AL) OVERRIDE;
195 void vmstat(Condition cond = AL) OVERRIDE; // VMRS APSR_nzcv, FPSCR
196
197 void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
198 void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
199 void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE;
200 void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE;
201
202 // Branch instructions.
Nicolas Geoffrayd56376c2015-05-21 12:32:34 +0000[diff] [blame]203 void b(Label* label, Condition cond = AL) OVERRIDE;
204 void bl(Label* label, Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]205 void blx(Register rm, Condition cond = AL) OVERRIDE;
206 void bx(Register rm, Condition cond = AL) OVERRIDE;
Dave Allison45fdb932014-06-25 12:37:10 -0700[diff] [blame]207 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
208 Condition cond = AL) OVERRIDE;
209 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
210 Condition cond = AL) OVERRIDE;
211 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
212 Condition cond = AL) OVERRIDE;
213 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
214 Condition cond = AL) OVERRIDE;
215 void Rrx(Register rd, Register rm, bool setcc = false,
216 Condition cond = AL) OVERRIDE;
217
218 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
219 Condition cond = AL) OVERRIDE;
220 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
221 Condition cond = AL) OVERRIDE;
222 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
223 Condition cond = AL) OVERRIDE;
224 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
225 Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]226
227 void Push(Register rd, Condition cond = AL) OVERRIDE;
228 void Pop(Register rd, Condition cond = AL) OVERRIDE;
229
230 void PushList(RegList regs, Condition cond = AL) OVERRIDE;
231 void PopList(RegList regs, Condition cond = AL) OVERRIDE;
232
233 void Mov(Register rd, Register rm, Condition cond = AL) OVERRIDE;
234
235 void CompareAndBranchIfZero(Register r, Label* label) OVERRIDE;
236 void CompareAndBranchIfNonZero(Register r, Label* label) OVERRIDE;
237
Nicolas Geoffray19a19cf2014-10-22 16:07:05 +0100[diff] [blame]238 // Memory barriers.
239 void dmb(DmbOptions flavor) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]240
Vladimir Markocf93a5c2015-06-16 11:33:24 +0000[diff] [blame]241 // Get the final position of a label after local fixup based on the old position
242 // recorded before FinalizeCode().
243 uint32_t GetAdjustedPosition(uint32_t old_position) OVERRIDE;
244
245 Literal* NewLiteral(size_t size, const uint8_t* data) OVERRIDE;
246 void LoadLiteral(Register rt, Literal* literal) OVERRIDE;
247 void LoadLiteral(Register rt, Register rt2, Literal* literal) OVERRIDE;
248 void LoadLiteral(SRegister sd, Literal* literal) OVERRIDE;
249 void LoadLiteral(DRegister dd, Literal* literal) OVERRIDE;
250
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]251 // Add signed constant value to rd. May clobber IP.
252 void AddConstant(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
253 void AddConstant(Register rd, Register rn, int32_t value,
254 Condition cond = AL) OVERRIDE;
255 void AddConstantSetFlags(Register rd, Register rn, int32_t value,
256 Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]257
258 // Load and Store. May clobber IP.
259 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]260 void MarkExceptionHandler(Label* label) OVERRIDE;
261 void LoadFromOffset(LoadOperandType type,
262 Register reg,
263 Register base,
264 int32_t offset,
265 Condition cond = AL) OVERRIDE;
266 void StoreToOffset(StoreOperandType type,
267 Register reg,
268 Register base,
269 int32_t offset,
270 Condition cond = AL) OVERRIDE;
271 void LoadSFromOffset(SRegister reg,
272 Register base,
273 int32_t offset,
274 Condition cond = AL) OVERRIDE;
275 void StoreSToOffset(SRegister reg,
276 Register base,
277 int32_t offset,
278 Condition cond = AL) OVERRIDE;
279 void LoadDFromOffset(DRegister reg,
280 Register base,
281 int32_t offset,
282 Condition cond = AL) OVERRIDE;
283 void StoreDToOffset(DRegister reg,
284 Register base,
285 int32_t offset,
286 Condition cond = AL) OVERRIDE;
287
Nicolas Geoffray3bcc8ea2014-11-28 15:00:02 +0000[diff] [blame]288 bool ShifterOperandCanHold(Register rd,
289 Register rn,
290 Opcode opcode,
291 uint32_t immediate,
292 ShifterOperand* shifter_op) OVERRIDE;
293
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]294
Ian Rogers13735952014-10-08 12:43:28 -0700[diff] [blame]295 static bool IsInstructionForExceptionHandling(uintptr_t pc);
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]296
297 // Emit data (e.g. encoded instruction or immediate) to the
298 // instruction stream.
299 void Emit(int32_t value);
300 void Bind(Label* label) OVERRIDE;
301
302 void MemoryBarrier(ManagedRegister scratch) OVERRIDE;
303
304 private:
305 void EmitType01(Condition cond,
306 int type,
307 Opcode opcode,
308 int set_cc,
309 Register rn,
310 Register rd,
311 const ShifterOperand& so);
312
313 void EmitType5(Condition cond, int offset, bool link);
314
315 void EmitMemOp(Condition cond,
316 bool load,
317 bool byte,
318 Register rd,
319 const Address& ad);
320
321 void EmitMemOpAddressMode3(Condition cond,
322 int32_t mode,
323 Register rd,
324 const Address& ad);
325
326 void EmitMultiMemOp(Condition cond,
327 BlockAddressMode am,
328 bool load,
329 Register base,
330 RegList regs);
331
332 void EmitShiftImmediate(Condition cond,
333 Shift opcode,
334 Register rd,
335 Register rm,
336 const ShifterOperand& so);
337
338 void EmitShiftRegister(Condition cond,
339 Shift opcode,
340 Register rd,
341 Register rm,
342 const ShifterOperand& so);
343
344 void EmitMulOp(Condition cond,
345 int32_t opcode,
346 Register rd,
347 Register rn,
348 Register rm,
349 Register rs);
350
351 void EmitVFPsss(Condition cond,
352 int32_t opcode,
353 SRegister sd,
354 SRegister sn,
355 SRegister sm);
356
357 void EmitVFPddd(Condition cond,
358 int32_t opcode,
359 DRegister dd,
360 DRegister dn,
361 DRegister dm);
362
363 void EmitVFPsd(Condition cond,
364 int32_t opcode,
365 SRegister sd,
366 DRegister dm);
367
368 void EmitVFPds(Condition cond,
369 int32_t opcode,
370 DRegister dd,
371 SRegister sm);
372
373 void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond);
374
375 void EmitBranch(Condition cond, Label* label, bool link);
376 static int32_t EncodeBranchOffset(int offset, int32_t inst);
377 static int DecodeBranchOffset(int32_t inst);
378 int32_t EncodeTstOffset(int offset, int32_t inst);
379 int DecodeTstOffset(int32_t inst);
Nicolas Geoffray3bcc8ea2014-11-28 15:00:02 +0000[diff] [blame]380 bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op);
Dave Allison65fcc2c2014-04-28 13:45:27 -0700[diff] [blame]381};
382
383} // namespace arm
384} // namespace art
385
386#endif // ART_COMPILER_UTILS_ARM_ASSEMBLER_ARM32_H_