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Serban Constantinescued8dd492014-02-11 14:15:10 +00001/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Roland Levillain4d027112015-07-01 15:41:14 +010013 * See the License for the specific language governing permissions and
Serban Constantinescued8dd492014-02-11 14:15:10 +000014 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
18#define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
19
Stuart Monteithb95a5342014-03-12 13:32:32 +000020#include <stdint.h>
Ian Rogers700a4022014-05-19 16:49:03 -070021#include <memory>
22#include <vector>
Serban Constantinescued8dd492014-02-11 14:15:10 +000023
Vladimir Marko93205e32016-04-13 11:59:46 +010024#include "base/arena_containers.h"
Serban Constantinescued8dd492014-02-11 14:15:10 +000025#include "base/logging.h"
Serban Constantinescued8dd492014-02-11 14:15:10 +000026#include "utils/arm64/managed_register_arm64.h"
27#include "utils/assembler.h"
28#include "offsets.h"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080029
Artem Serovaf4e42a2016-08-08 15:11:24 +010030// TODO(VIXL): Make VIXL compile with -Wshadow.
Andreas Gampe277ccbd2014-11-03 21:36:10 -080031#pragma GCC diagnostic push
32#pragma GCC diagnostic ignored "-Wshadow"
Artem Serovaf4e42a2016-08-08 15:11:24 +010033#include "aarch64/disasm-aarch64.h"
34#include "aarch64/macro-assembler-aarch64.h"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080035#pragma GCC diagnostic pop
Serban Constantinescued8dd492014-02-11 14:15:10 +000036
37namespace art {
38namespace arm64 {
39
Scott Wakeling97c72b72016-06-24 16:19:36 +010040#define MEM_OP(...) vixl::aarch64::MemOperand(__VA_ARGS__)
Serban Constantinescued8dd492014-02-11 14:15:10 +000041
42enum LoadOperandType {
43 kLoadSignedByte,
44 kLoadUnsignedByte,
45 kLoadSignedHalfword,
46 kLoadUnsignedHalfword,
47 kLoadWord,
48 kLoadCoreWord,
49 kLoadSWord,
50 kLoadDWord
51};
52
53enum StoreOperandType {
54 kStoreByte,
55 kStoreHalfword,
56 kStoreWord,
57 kStoreCoreWord,
58 kStoreSWord,
59 kStoreDWord
60};
61
Andreas Gampedcf30142016-08-08 16:06:34 -070062class Arm64Assembler FINAL : public Assembler {
Serban Constantinescued8dd492014-02-11 14:15:10 +000063 public:
Andreas Gampedcf30142016-08-08 16:06:34 -070064 explicit Arm64Assembler(ArenaAllocator* arena) : Assembler(arena) {}
Serban Constantinescued8dd492014-02-11 14:15:10 +000065
Alexandre Rames087930f2016-08-02 13:45:28 +010066 virtual ~Arm64Assembler() {}
67
68 vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return &vixl_masm_; }
Serban Constantinescued8dd492014-02-11 14:15:10 +000069
Vladimir Markocf93a5c2015-06-16 11:33:24 +000070 // Finalize the code.
71 void FinalizeCode() OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +000072
73 // Size of generated code.
Alexandre Rameseb7b7392015-06-19 14:47:01 +010074 size_t CodeSize() const OVERRIDE;
75 const uint8_t* CodeBufferBaseAddress() const OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +000076
77 // Copy instructions out of assembly buffer into the given region of memory.
78 void FinalizeInstructions(const MemoryRegion& region);
79
Andreas Gampedcf30142016-08-08 16:06:34 -070080 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs);
81
Scott Wakeling97c72b72016-06-24 16:19:36 +010082 void SpillRegisters(vixl::aarch64::CPURegList registers, int offset);
83 void UnspillRegisters(vixl::aarch64::CPURegList registers, int offset);
Zheng Xu69a50302015-04-14 20:04:41 +080084
Andreas Gampec6ee54e2014-03-24 16:45:44 -070085 // Jump to address (not setting link register)
86 void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);
87
Roland Levillain4d027112015-07-01 15:41:14 +010088 //
89 // Heap poisoning.
90 //
91
92 // Poison a heap reference contained in `reg`.
Scott Wakeling97c72b72016-06-24 16:19:36 +010093 void PoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain4d027112015-07-01 15:41:14 +010094 // Unpoison a heap reference contained in `reg`.
Scott Wakeling97c72b72016-06-24 16:19:36 +010095 void UnpoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain0b671c02016-08-19 12:02:34 +010096 // Poison a heap reference contained in `reg` if heap poisoning is enabled.
97 void MaybePoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain4d027112015-07-01 15:41:14 +010098 // Unpoison a heap reference contained in `reg` if heap poisoning is enabled.
Scott Wakeling97c72b72016-06-24 16:19:36 +010099 void MaybeUnpoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain4d027112015-07-01 15:41:14 +0100100
Andreas Gampe85b62f22015-09-09 13:15:38 -0700101 void Bind(Label* label ATTRIBUTE_UNUSED) OVERRIDE {
102 UNIMPLEMENTED(FATAL) << "Do not use Bind for ARM64";
103 }
104 void Jump(Label* label ATTRIBUTE_UNUSED) OVERRIDE {
105 UNIMPLEMENTED(FATAL) << "Do not use Jump for ARM64";
106 }
107
Scott Wakeling97c72b72016-06-24 16:19:36 +0100108 static vixl::aarch64::Register reg_x(int code) {
Alexandre Rames37c92df2014-10-17 14:35:27 +0100109 CHECK(code < kNumberOfXRegisters) << code;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000110 if (code == SP) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100111 return vixl::aarch64::sp;
Serban Constantinescu15523732014-04-02 13:18:05 +0100112 } else if (code == XZR) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100113 return vixl::aarch64::xzr;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000114 }
Scott Wakeling97c72b72016-06-24 16:19:36 +0100115 return vixl::aarch64::Register::GetXRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000116 }
117
Scott Wakeling97c72b72016-06-24 16:19:36 +0100118 static vixl::aarch64::Register reg_w(int code) {
Alexandre Rames37c92df2014-10-17 14:35:27 +0100119 CHECK(code < kNumberOfWRegisters) << code;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100120 if (code == WSP) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100121 return vixl::aarch64::wsp;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100122 } else if (code == WZR) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100123 return vixl::aarch64::wzr;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100124 }
Scott Wakeling97c72b72016-06-24 16:19:36 +0100125 return vixl::aarch64::Register::GetWRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000126 }
127
Scott Wakeling97c72b72016-06-24 16:19:36 +0100128 static vixl::aarch64::FPRegister reg_d(int code) {
129 return vixl::aarch64::FPRegister::GetDRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000130 }
131
Scott Wakeling97c72b72016-06-24 16:19:36 +0100132 static vixl::aarch64::FPRegister reg_s(int code) {
133 return vixl::aarch64::FPRegister::GetSRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000134 }
135
Andreas Gampedcf30142016-08-08 16:06:34 -0700136 private:
Alexandre Rames087930f2016-08-02 13:45:28 +0100137 // VIXL assembler.
138 vixl::aarch64::MacroAssembler vixl_masm_;
Alexandre Rames5319def2014-10-23 10:03:10 +0100139
Serban Constantinescu15523732014-04-02 13:18:05 +0100140 // Used for testing.
141 friend class Arm64ManagedRegister_VixlRegisters_Test;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000142};
143
Serban Constantinescued8dd492014-02-11 14:15:10 +0000144} // namespace arm64
145} // namespace art
146
147#endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_