Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * PCI Express PCI Hot Plug Driver |
| 3 | * |
| 4 | * Copyright (C) 1995,2001 Compaq Computer Corporation |
| 5 | * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) |
| 6 | * Copyright (C) 2001 IBM Corp. |
| 7 | * Copyright (C) 2003-2004 Intel Corporation |
| 8 | * |
| 9 | * All rights reserved. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or (at |
| 14 | * your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but |
| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
| 19 | * NON INFRINGEMENT. See the GNU General Public License for more |
| 20 | * details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | * |
Kristen Accardi | 8cf4c19 | 2005-08-16 15:16:10 -0700 | [diff] [blame] | 26 | * Send feedback to <greg@kroah.com>,<kristen.c.accardi@intel.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | * |
| 28 | */ |
| 29 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | #include <linux/kernel.h> |
| 31 | #include <linux/module.h> |
| 32 | #include <linux/types.h> |
Tim Schmielau | de25968 | 2006-01-08 01:02:05 -0800 | [diff] [blame] | 33 | #include <linux/signal.h> |
| 34 | #include <linux/jiffies.h> |
| 35 | #include <linux/timer.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <linux/pci.h> |
Andrew Morton | 5d1b8c9 | 2005-11-13 16:06:39 -0800 | [diff] [blame] | 37 | #include <linux/interrupt.h> |
Kristen Carlson Accardi | 34d0341 | 2007-01-09 13:02:36 -0800 | [diff] [blame] | 38 | #include <linux/time.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 39 | #include <linux/slab.h> |
Andrew Morton | 5d1b8c9 | 2005-11-13 16:06:39 -0800 | [diff] [blame] | 40 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include "../pci.h" |
| 42 | #include "pciehp.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 44 | static inline struct pci_dev *ctrl_dev(struct controller *ctrl) |
Kenji Kaneshige | a0f018d | 2006-12-21 17:01:06 -0800 | [diff] [blame] | 45 | { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 46 | return ctrl->pcie->port; |
Kenji Kaneshige | a0f018d | 2006-12-21 17:01:06 -0800 | [diff] [blame] | 47 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 49 | static irqreturn_t pcie_isr(int irq, void *dev_id); |
| 50 | static void start_int_poll_timer(struct controller *ctrl, int sec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | |
| 52 | /* This is the interrupt polling timeout function. */ |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 53 | static void int_poll_timeout(unsigned long data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 55 | struct controller *ctrl = (struct controller *)data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | /* Poll for interrupt events. regs == NULL => polling */ |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 58 | pcie_isr(0, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 60 | init_timer(&ctrl->poll_timer); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | if (!pciehp_poll_time) |
Kenji Kaneshige | 40730d1 | 2007-08-09 16:09:38 -0700 | [diff] [blame] | 62 | pciehp_poll_time = 2; /* default polling interval is 2 sec */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 64 | start_int_poll_timer(ctrl, pciehp_poll_time); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | /* This function starts the interrupt polling timer. */ |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 68 | static void start_int_poll_timer(struct controller *ctrl, int sec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 70 | /* Clamp to sane value */ |
| 71 | if ((sec <= 0) || (sec > 60)) |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 72 | sec = 2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 74 | ctrl->poll_timer.function = &int_poll_timeout; |
| 75 | ctrl->poll_timer.data = (unsigned long)ctrl; |
| 76 | ctrl->poll_timer.expires = jiffies + sec * HZ; |
| 77 | add_timer(&ctrl->poll_timer); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | } |
| 79 | |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 80 | static inline int pciehp_request_irq(struct controller *ctrl) |
| 81 | { |
Kenji Kaneshige | f7a10e3 | 2008-08-22 17:16:48 +0900 | [diff] [blame] | 82 | int retval, irq = ctrl->pcie->irq; |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 83 | |
| 84 | /* Install interrupt polling timer. Start with 10 sec delay */ |
| 85 | if (pciehp_poll_mode) { |
| 86 | init_timer(&ctrl->poll_timer); |
| 87 | start_int_poll_timer(ctrl, 10); |
| 88 | return 0; |
| 89 | } |
| 90 | |
| 91 | /* Installs the interrupt handler */ |
| 92 | retval = request_irq(irq, pcie_isr, IRQF_SHARED, MY_NAME, ctrl); |
| 93 | if (retval) |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 94 | ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n", |
| 95 | irq); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 96 | return retval; |
| 97 | } |
| 98 | |
| 99 | static inline void pciehp_free_irq(struct controller *ctrl) |
| 100 | { |
| 101 | if (pciehp_poll_mode) |
| 102 | del_timer_sync(&ctrl->poll_timer); |
| 103 | else |
Kenji Kaneshige | f7a10e3 | 2008-08-22 17:16:48 +0900 | [diff] [blame] | 104 | free_irq(ctrl->pcie->irq, ctrl); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 105 | } |
| 106 | |
Bjorn Helgaas | 40b9608 | 2014-06-14 09:55:49 -0600 | [diff] [blame] | 107 | static int pcie_poll_cmd(struct controller *ctrl, int timeout) |
Kenji Kaneshige | 6592e02 | 2008-05-27 19:05:26 +0900 | [diff] [blame] | 108 | { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 109 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Kenji Kaneshige | 6592e02 | 2008-05-27 19:05:26 +0900 | [diff] [blame] | 110 | u16 slot_status; |
Kenji Kaneshige | 6592e02 | 2008-05-27 19:05:26 +0900 | [diff] [blame] | 111 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 112 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
| 113 | if (slot_status & PCI_EXP_SLTSTA_CC) { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 114 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, |
| 115 | PCI_EXP_SLTSTA_CC); |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 116 | return 1; |
Kenji Kaneshige | 820943b | 2008-06-20 12:04:33 +0900 | [diff] [blame] | 117 | } |
Adrian Bunk | a5827f4 | 2008-08-28 01:05:26 +0300 | [diff] [blame] | 118 | while (timeout > 0) { |
Kenji Kaneshige | 66618ba | 2008-06-20 12:05:12 +0900 | [diff] [blame] | 119 | msleep(10); |
| 120 | timeout -= 10; |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 121 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
| 122 | if (slot_status & PCI_EXP_SLTSTA_CC) { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 123 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, |
| 124 | PCI_EXP_SLTSTA_CC); |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 125 | return 1; |
Kenji Kaneshige | 820943b | 2008-06-20 12:04:33 +0900 | [diff] [blame] | 126 | } |
Kenji Kaneshige | 6592e02 | 2008-05-27 19:05:26 +0900 | [diff] [blame] | 127 | } |
| 128 | return 0; /* timeout */ |
Kenji Kaneshige | 6592e02 | 2008-05-27 19:05:26 +0900 | [diff] [blame] | 129 | } |
| 130 | |
Bjorn Helgaas | 4283c70 | 2014-06-13 13:58:35 -0600 | [diff] [blame] | 131 | static void pcie_wait_cmd(struct controller *ctrl) |
Kenji Kaneshige | 44ef4ce | 2006-12-21 17:01:09 -0800 | [diff] [blame] | 132 | { |
Kenji Kaneshige | 262303fe | 2006-12-21 17:01:10 -0800 | [diff] [blame] | 133 | unsigned int msecs = pciehp_poll_mode ? 2500 : 1000; |
Bjorn Helgaas | 40b9608 | 2014-06-14 09:55:49 -0600 | [diff] [blame] | 134 | unsigned long duration = msecs_to_jiffies(msecs); |
| 135 | unsigned long cmd_timeout = ctrl->cmd_started + duration; |
| 136 | unsigned long now, timeout; |
Kenji Kaneshige | 262303fe | 2006-12-21 17:01:10 -0800 | [diff] [blame] | 137 | int rc; |
Kenji Kaneshige | 44ef4ce | 2006-12-21 17:01:09 -0800 | [diff] [blame] | 138 | |
Bjorn Helgaas | 4283c70 | 2014-06-13 13:58:35 -0600 | [diff] [blame] | 139 | /* |
| 140 | * If the controller does not generate notifications for command |
| 141 | * completions, we never need to wait between writes. |
| 142 | */ |
Rajat Jain | 6c1a32e | 2014-06-26 11:58:55 -0700 | [diff] [blame] | 143 | if (NO_CMD_CMPL(ctrl)) |
Bjorn Helgaas | 4283c70 | 2014-06-13 13:58:35 -0600 | [diff] [blame] | 144 | return; |
| 145 | |
| 146 | if (!ctrl->cmd_busy) |
| 147 | return; |
| 148 | |
Bjorn Helgaas | 40b9608 | 2014-06-14 09:55:49 -0600 | [diff] [blame] | 149 | /* |
| 150 | * Even if the command has already timed out, we want to call |
| 151 | * pcie_poll_cmd() so it can clear PCI_EXP_SLTSTA_CC. |
| 152 | */ |
| 153 | now = jiffies; |
| 154 | if (time_before_eq(cmd_timeout, now)) |
| 155 | timeout = 1; |
| 156 | else |
| 157 | timeout = cmd_timeout - now; |
| 158 | |
Bjorn Helgaas | 4283c70 | 2014-06-13 13:58:35 -0600 | [diff] [blame] | 159 | if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE && |
| 160 | ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE) |
Kenji Kaneshige | d737bdc | 2008-05-28 14:59:44 +0900 | [diff] [blame] | 161 | rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout); |
Bjorn Helgaas | 4283c70 | 2014-06-13 13:58:35 -0600 | [diff] [blame] | 162 | else |
Yinghai Lu | 7cbeb9f | 2014-09-22 20:05:45 -0600 | [diff] [blame] | 163 | rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout)); |
Bjorn Helgaas | 40b9608 | 2014-06-14 09:55:49 -0600 | [diff] [blame] | 164 | |
| 165 | /* |
| 166 | * Controllers with errata like Intel CF118 don't generate |
| 167 | * completion notifications unless the power/indicator/interlock |
| 168 | * control bits are changed. On such controllers, we'll emit this |
| 169 | * timeout message when we wait for completion of commands that |
| 170 | * don't change those bits, e.g., commands that merely enable |
| 171 | * interrupts. |
| 172 | */ |
Kenji Kaneshige | 262303fe | 2006-12-21 17:01:10 -0800 | [diff] [blame] | 173 | if (!rc) |
Bjorn Helgaas | d537a3a | 2014-08-15 17:18:44 -0600 | [diff] [blame] | 174 | ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n", |
Bjorn Helgaas | 40b9608 | 2014-06-14 09:55:49 -0600 | [diff] [blame] | 175 | ctrl->slot_ctrl, |
Yinghai Lu | d433889 | 2014-09-22 20:07:35 -0600 | [diff] [blame] | 176 | jiffies_to_msecs(jiffies - ctrl->cmd_started)); |
Kenji Kaneshige | 44ef4ce | 2006-12-21 17:01:09 -0800 | [diff] [blame] | 177 | } |
| 178 | |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 179 | /** |
| 180 | * pcie_write_cmd - Issue controller command |
Kenji Kaneshige | c27fb88 | 2008-04-25 14:39:05 -0700 | [diff] [blame] | 181 | * @ctrl: controller to which the command is issued |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 182 | * @cmd: command value written to slot control register |
| 183 | * @mask: bitmask of slot control register to be modified |
| 184 | */ |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 185 | static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 187 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 188 | u16 slot_ctrl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | |
Kenji Kaneshige | 44ef4ce | 2006-12-21 17:01:09 -0800 | [diff] [blame] | 190 | mutex_lock(&ctrl->ctrl_lock); |
| 191 | |
Bjorn Helgaas | 3461a06 | 2014-06-13 15:06:40 -0600 | [diff] [blame] | 192 | /* Wait for any previous command that might still be in progress */ |
| 193 | pcie_wait_cmd(ctrl); |
| 194 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 195 | pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 196 | slot_ctrl &= ~mask; |
Kenji Kaneshige | b7aa1f1 | 2008-04-25 14:39:14 -0700 | [diff] [blame] | 197 | slot_ctrl |= (cmd & mask); |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 198 | ctrl->cmd_busy = 1; |
Kenji Kaneshige | 2d32a9a | 2008-04-25 14:39:02 -0700 | [diff] [blame] | 199 | smp_mb(); |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 200 | pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl); |
Bjorn Helgaas | 40b9608 | 2014-06-14 09:55:49 -0600 | [diff] [blame] | 201 | ctrl->cmd_started = jiffies; |
Bjorn Helgaas | 4283c70 | 2014-06-13 13:58:35 -0600 | [diff] [blame] | 202 | ctrl->slot_ctrl = slot_ctrl; |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 203 | |
Kenji Kaneshige | 44ef4ce | 2006-12-21 17:01:09 -0800 | [diff] [blame] | 204 | mutex_unlock(&ctrl->ctrl_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | } |
| 206 | |
Rajat Jain | 4703389 | 2014-02-04 18:28:43 -0800 | [diff] [blame] | 207 | bool pciehp_check_link_active(struct controller *ctrl) |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 208 | { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 209 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Yinghai Lu | 4e2ce40 | 2012-01-27 10:55:12 -0800 | [diff] [blame] | 210 | u16 lnk_status; |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 211 | bool ret; |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 212 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 213 | pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); |
Yinghai Lu | 4e2ce40 | 2012-01-27 10:55:12 -0800 | [diff] [blame] | 214 | ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA); |
| 215 | |
| 216 | if (ret) |
| 217 | ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); |
| 218 | |
| 219 | return ret; |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 220 | } |
| 221 | |
Yinghai Lu | bffe4f7 | 2012-01-27 10:55:13 -0800 | [diff] [blame] | 222 | static void __pcie_wait_link_active(struct controller *ctrl, bool active) |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 223 | { |
| 224 | int timeout = 1000; |
| 225 | |
Rajat Jain | 4703389 | 2014-02-04 18:28:43 -0800 | [diff] [blame] | 226 | if (pciehp_check_link_active(ctrl) == active) |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 227 | return; |
| 228 | while (timeout > 0) { |
| 229 | msleep(10); |
| 230 | timeout -= 10; |
Rajat Jain | 4703389 | 2014-02-04 18:28:43 -0800 | [diff] [blame] | 231 | if (pciehp_check_link_active(ctrl) == active) |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 232 | return; |
| 233 | } |
Yinghai Lu | bffe4f7 | 2012-01-27 10:55:13 -0800 | [diff] [blame] | 234 | ctrl_dbg(ctrl, "Data Link Layer Link Active not %s in 1000 msec\n", |
| 235 | active ? "set" : "cleared"); |
| 236 | } |
| 237 | |
| 238 | static void pcie_wait_link_active(struct controller *ctrl) |
| 239 | { |
| 240 | __pcie_wait_link_active(ctrl, true); |
| 241 | } |
| 242 | |
Yinghai Lu | 2f5d8e4 | 2012-01-27 10:55:11 -0800 | [diff] [blame] | 243 | static bool pci_bus_check_dev(struct pci_bus *bus, int devfn) |
| 244 | { |
| 245 | u32 l; |
| 246 | int count = 0; |
| 247 | int delay = 1000, step = 20; |
| 248 | bool found = false; |
| 249 | |
| 250 | do { |
| 251 | found = pci_bus_read_dev_vendor_id(bus, devfn, &l, 0); |
| 252 | count++; |
| 253 | |
| 254 | if (found) |
| 255 | break; |
| 256 | |
| 257 | msleep(step); |
| 258 | delay -= step; |
| 259 | } while (delay > 0); |
| 260 | |
| 261 | if (count > 1 && pciehp_debug) |
| 262 | printk(KERN_DEBUG "pci %04x:%02x:%02x.%d id reading try %d times with interval %d ms to get %08x\n", |
| 263 | pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), |
| 264 | PCI_FUNC(devfn), count, step, l); |
| 265 | |
| 266 | return found; |
| 267 | } |
| 268 | |
Kenji Kaneshige | 82a9e79 | 2009-09-15 17:30:48 +0900 | [diff] [blame] | 269 | int pciehp_check_link_status(struct controller *ctrl) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 271 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 272 | bool found; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | u16 lnk_status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 275 | /* |
| 276 | * Data Link Layer Link Active Reporting must be capable for |
| 277 | * hot-plug capable downstream port. But old controller might |
| 278 | * not implement it. In this case, we wait for 1000 ms. |
| 279 | */ |
| 280 | if (ctrl->link_active_reporting) |
| 281 | pcie_wait_link_active(ctrl); |
| 282 | else |
| 283 | msleep(1000); |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 284 | |
Yinghai Lu | 2f5d8e4 | 2012-01-27 10:55:11 -0800 | [diff] [blame] | 285 | /* wait 100ms before read pci conf, and try in 1s */ |
| 286 | msleep(100); |
| 287 | found = pci_bus_check_dev(ctrl->pcie->port->subordinate, |
| 288 | PCI_DEVFN(0, 0)); |
Kenji Kaneshige | 0027cb3 | 2011-11-10 16:40:37 +0900 | [diff] [blame] | 289 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 290 | pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 291 | ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 292 | if ((lnk_status & PCI_EXP_LNKSTA_LT) || |
| 293 | !(lnk_status & PCI_EXP_LNKSTA_NLW)) { |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 294 | ctrl_err(ctrl, "Link Training Error occurs\n"); |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 295 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | } |
| 297 | |
Yinghai Lu | fdbd3ce | 2011-11-07 07:53:23 -0800 | [diff] [blame] | 298 | pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); |
| 299 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 300 | if (!found) |
| 301 | return -1; |
Yinghai Lu | 2f5d8e4 | 2012-01-27 10:55:11 -0800 | [diff] [blame] | 302 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 303 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | } |
| 305 | |
Yinghai Lu | 7f82299 | 2012-01-27 10:55:14 -0800 | [diff] [blame] | 306 | static int __pciehp_link_set(struct controller *ctrl, bool enable) |
| 307 | { |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 308 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Yinghai Lu | 7f82299 | 2012-01-27 10:55:14 -0800 | [diff] [blame] | 309 | u16 lnk_ctrl; |
Yinghai Lu | 7f82299 | 2012-01-27 10:55:14 -0800 | [diff] [blame] | 310 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 311 | pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &lnk_ctrl); |
Yinghai Lu | 7f82299 | 2012-01-27 10:55:14 -0800 | [diff] [blame] | 312 | |
| 313 | if (enable) |
| 314 | lnk_ctrl &= ~PCI_EXP_LNKCTL_LD; |
| 315 | else |
| 316 | lnk_ctrl |= PCI_EXP_LNKCTL_LD; |
| 317 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 318 | pcie_capability_write_word(pdev, PCI_EXP_LNKCTL, lnk_ctrl); |
Yinghai Lu | 7f82299 | 2012-01-27 10:55:14 -0800 | [diff] [blame] | 319 | ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl); |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 320 | return 0; |
Yinghai Lu | 7f82299 | 2012-01-27 10:55:14 -0800 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | static int pciehp_link_enable(struct controller *ctrl) |
| 324 | { |
| 325 | return __pciehp_link_set(ctrl, true); |
| 326 | } |
| 327 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 328 | void pciehp_get_attention_status(struct slot *slot, u8 *status) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 330 | struct controller *ctrl = slot->ctrl; |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 331 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | u16 slot_ctrl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 334 | pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 335 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, |
| 336 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 338 | switch (slot_ctrl & PCI_EXP_SLTCTL_AIC) { |
| 339 | case PCI_EXP_SLTCTL_ATTN_IND_ON: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | *status = 1; /* On */ |
| 341 | break; |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 342 | case PCI_EXP_SLTCTL_ATTN_IND_BLINK: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | *status = 2; /* Blink */ |
| 344 | break; |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 345 | case PCI_EXP_SLTCTL_ATTN_IND_OFF: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | *status = 0; /* Off */ |
| 347 | break; |
| 348 | default: |
| 349 | *status = 0xFF; |
| 350 | break; |
| 351 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | } |
| 353 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 354 | void pciehp_get_power_status(struct slot *slot, u8 *status) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 356 | struct controller *ctrl = slot->ctrl; |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 357 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | u16 slot_ctrl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 359 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 360 | pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 361 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, |
| 362 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 364 | switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) { |
| 365 | case PCI_EXP_SLTCTL_PWR_ON: |
| 366 | *status = 1; /* On */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | break; |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 368 | case PCI_EXP_SLTCTL_PWR_OFF: |
| 369 | *status = 0; /* Off */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | break; |
| 371 | default: |
| 372 | *status = 0xFF; |
| 373 | break; |
| 374 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | } |
| 376 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 377 | void pciehp_get_latch_status(struct slot *slot, u8 *status) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | { |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 379 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | u16 slot_status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 382 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 383 | *status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | } |
| 385 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 386 | void pciehp_get_adapter_status(struct slot *slot, u8 *status) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | { |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 388 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | u16 slot_status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 391 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 392 | *status = !!(slot_status & PCI_EXP_SLTSTA_PDS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | } |
| 394 | |
Kenji Kaneshige | 82a9e79 | 2009-09-15 17:30:48 +0900 | [diff] [blame] | 395 | int pciehp_query_power_fault(struct slot *slot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | { |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 397 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | u16 slot_status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 399 | |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 400 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 401 | return !!(slot_status & PCI_EXP_SLTSTA_PFD); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | } |
| 403 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 404 | void pciehp_set_attention_status(struct slot *slot, u8 value) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 406 | struct controller *ctrl = slot->ctrl; |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 407 | u16 slot_cmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | |
Bjorn Helgaas | af9ab79 | 2013-12-15 17:23:54 -0700 | [diff] [blame] | 409 | if (!ATTN_LED(ctrl)) |
| 410 | return; |
| 411 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | switch (value) { |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 413 | case 0: /* turn off */ |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 414 | slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_OFF; |
Kenji Kaneshige | 445f798 | 2009-10-05 17:42:59 +0900 | [diff] [blame] | 415 | break; |
| 416 | case 1: /* turn on */ |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 417 | slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_ON; |
Kenji Kaneshige | 445f798 | 2009-10-05 17:42:59 +0900 | [diff] [blame] | 418 | break; |
| 419 | case 2: /* turn blink */ |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 420 | slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_BLINK; |
Kenji Kaneshige | 445f798 | 2009-10-05 17:42:59 +0900 | [diff] [blame] | 421 | break; |
| 422 | default: |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 423 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 424 | } |
Yinghai Lu | cf8d7b5 | 2014-09-22 20:36:09 -0600 | [diff] [blame] | 425 | pcie_write_cmd(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 426 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
| 427 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | } |
| 429 | |
Kenji Kaneshige | 82a9e79 | 2009-09-15 17:30:48 +0900 | [diff] [blame] | 430 | void pciehp_green_led_on(struct slot *slot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 432 | struct controller *ctrl = slot->ctrl; |
Kenji Kaneshige | 71ad556 | 2007-08-09 16:09:34 -0700 | [diff] [blame] | 433 | |
Bjorn Helgaas | af9ab79 | 2013-12-15 17:23:54 -0700 | [diff] [blame] | 434 | if (!PWR_LED(ctrl)) |
| 435 | return; |
| 436 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 437 | pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON, PCI_EXP_SLTCTL_PIC); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 438 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 439 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, |
| 440 | PCI_EXP_SLTCTL_PWR_IND_ON); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | } |
| 442 | |
Kenji Kaneshige | 82a9e79 | 2009-09-15 17:30:48 +0900 | [diff] [blame] | 443 | void pciehp_green_led_off(struct slot *slot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 445 | struct controller *ctrl = slot->ctrl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | |
Bjorn Helgaas | af9ab79 | 2013-12-15 17:23:54 -0700 | [diff] [blame] | 447 | if (!PWR_LED(ctrl)) |
| 448 | return; |
| 449 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 450 | pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF, PCI_EXP_SLTCTL_PIC); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 451 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 452 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, |
| 453 | PCI_EXP_SLTCTL_PWR_IND_OFF); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | } |
| 455 | |
Kenji Kaneshige | 82a9e79 | 2009-09-15 17:30:48 +0900 | [diff] [blame] | 456 | void pciehp_green_led_blink(struct slot *slot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 458 | struct controller *ctrl = slot->ctrl; |
Kenji Kaneshige | 71ad556 | 2007-08-09 16:09:34 -0700 | [diff] [blame] | 459 | |
Bjorn Helgaas | af9ab79 | 2013-12-15 17:23:54 -0700 | [diff] [blame] | 460 | if (!PWR_LED(ctrl)) |
| 461 | return; |
| 462 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 463 | pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK, PCI_EXP_SLTCTL_PIC); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 464 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 465 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, |
| 466 | PCI_EXP_SLTCTL_PWR_IND_BLINK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | } |
| 468 | |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 469 | int pciehp_power_on_slot(struct slot *slot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 471 | struct controller *ctrl = slot->ctrl; |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 472 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Kenji Kaneshige | f477836 | 2007-05-31 09:43:34 -0700 | [diff] [blame] | 473 | u16 slot_status; |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 474 | int retval; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | |
Rajesh Shah | 5a49f20 | 2005-11-23 15:44:54 -0800 | [diff] [blame] | 476 | /* Clear sticky power-fault bit from previous power failures */ |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 477 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
Bjorn Helgaas | 2f2ed41c | 2013-12-14 13:06:40 -0700 | [diff] [blame] | 478 | if (slot_status & PCI_EXP_SLTSTA_PFD) |
| 479 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, |
| 480 | PCI_EXP_SLTSTA_PFD); |
Kenji Kaneshige | 5651c48 | 2009-11-13 15:14:10 +0900 | [diff] [blame] | 481 | ctrl->power_fault_detected = 0; |
Kenji Kaneshige | a0f018d | 2006-12-21 17:01:06 -0800 | [diff] [blame] | 482 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 483 | pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 484 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 485 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, |
| 486 | PCI_EXP_SLTCTL_PWR_ON); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | |
Yinghai Lu | 2debd92 | 2012-01-27 10:55:15 -0800 | [diff] [blame] | 488 | retval = pciehp_link_enable(ctrl); |
| 489 | if (retval) |
| 490 | ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__); |
| 491 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | return retval; |
| 493 | } |
| 494 | |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 495 | void pciehp_power_off_slot(struct slot *slot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 497 | struct controller *ctrl = slot->ctrl; |
Kenji Kaneshige | f1050a3 | 2007-12-20 19:45:09 +0900 | [diff] [blame] | 498 | |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 499 | pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 500 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
Bjorn Helgaas | e7b4f0d7 | 2013-12-14 13:06:53 -0700 | [diff] [blame] | 501 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, |
| 502 | PCI_EXP_SLTCTL_PWR_OFF); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | } |
| 504 | |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 505 | static irqreturn_t pcie_isr(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 506 | { |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 507 | struct controller *ctrl = (struct controller *)dev_id; |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 508 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Bjorn Helgaas | b440bde | 2014-09-10 13:45:01 -0600 | [diff] [blame] | 509 | struct pci_bus *subordinate = pdev->subordinate; |
| 510 | struct pci_dev *dev; |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 511 | struct slot *slot = ctrl->slot; |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 512 | u16 detected, intr_loc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 514 | /* |
| 515 | * In order to guarantee that all interrupt events are |
| 516 | * serviced, we need to re-inspect Slot Status register after |
| 517 | * clearing what is presumed to be the last pending interrupt. |
| 518 | */ |
| 519 | intr_loc = 0; |
| 520 | do { |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 521 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &detected); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 523 | detected &= (PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD | |
| 524 | PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC | |
Rajat Jain | e48f1b6 | 2014-02-04 18:29:10 -0800 | [diff] [blame] | 525 | PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC); |
Kenji Kaneshige | 81b840c | 2009-02-03 15:06:13 +0900 | [diff] [blame] | 526 | detected &= ~intr_loc; |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 527 | intr_loc |= detected; |
| 528 | if (!intr_loc) |
| 529 | return IRQ_NONE; |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 530 | if (detected) |
| 531 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, |
| 532 | intr_loc); |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 533 | } while (detected); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 534 | |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 535 | ctrl_dbg(ctrl, "%s: intr_loc %x\n", __func__, intr_loc); |
Kenji Kaneshige | 71ad556 | 2007-08-09 16:09:34 -0700 | [diff] [blame] | 536 | |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 537 | /* Check Command Complete Interrupt Pending */ |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 538 | if (intr_loc & PCI_EXP_SLTSTA_CC) { |
Kenji Kaneshige | 262303fe | 2006-12-21 17:01:10 -0800 | [diff] [blame] | 539 | ctrl->cmd_busy = 0; |
Kenji Kaneshige | 2d32a9a | 2008-04-25 14:39:02 -0700 | [diff] [blame] | 540 | smp_mb(); |
Kenji Kaneshige | d737bdc | 2008-05-28 14:59:44 +0900 | [diff] [blame] | 541 | wake_up(&ctrl->queue); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | } |
| 543 | |
Bjorn Helgaas | b440bde | 2014-09-10 13:45:01 -0600 | [diff] [blame] | 544 | if (subordinate) { |
| 545 | list_for_each_entry(dev, &subordinate->devices, bus_list) { |
| 546 | if (dev->ignore_hotplug) { |
| 547 | ctrl_dbg(ctrl, "ignoring hotplug event %#06x (%s requested no hotplug)\n", |
| 548 | intr_loc, pci_name(dev)); |
| 549 | return IRQ_HANDLED; |
| 550 | } |
| 551 | } |
| 552 | } |
| 553 | |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 554 | if (!(intr_loc & ~PCI_EXP_SLTSTA_CC)) |
Kenji Kaneshige | dbd79ae | 2008-05-27 19:03:16 +0900 | [diff] [blame] | 555 | return IRQ_HANDLED; |
| 556 | |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 557 | /* Check MRL Sensor Changed */ |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 558 | if (intr_loc & PCI_EXP_SLTSTA_MRLSC) |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 559 | pciehp_handle_switch_change(slot); |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 560 | |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 561 | /* Check Attention Button Pressed */ |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 562 | if (intr_loc & PCI_EXP_SLTSTA_ABP) |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 563 | pciehp_handle_attention_button(slot); |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 564 | |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 565 | /* Check Presence Detect Changed */ |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 566 | if (intr_loc & PCI_EXP_SLTSTA_PDC) |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 567 | pciehp_handle_presence_change(slot); |
Kenji Kaneshige | 48fe391 | 2006-12-21 17:01:04 -0800 | [diff] [blame] | 568 | |
Kenji Kaneshige | c6b069e | 2008-04-25 14:38:57 -0700 | [diff] [blame] | 569 | /* Check Power Fault Detected */ |
Kenji Kaneshige | 99f0169 | 2009-02-03 15:06:16 +0900 | [diff] [blame] | 570 | if ((intr_loc & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) { |
| 571 | ctrl->power_fault_detected = 1; |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 572 | pciehp_handle_power_fault(slot); |
Kenji Kaneshige | 99f0169 | 2009-02-03 15:06:16 +0900 | [diff] [blame] | 573 | } |
Rajat Jain | e48f1b6 | 2014-02-04 18:29:10 -0800 | [diff] [blame] | 574 | |
| 575 | if (intr_loc & PCI_EXP_SLTSTA_DLLSC) |
| 576 | pciehp_handle_linkstate_change(slot); |
| 577 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | return IRQ_HANDLED; |
| 579 | } |
| 580 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 581 | void pcie_enable_notification(struct controller *ctrl) |
Mark Lord | ecdde93 | 2007-11-21 15:07:55 -0800 | [diff] [blame] | 582 | { |
Kenji Kaneshige | c27fb88 | 2008-04-25 14:39:05 -0700 | [diff] [blame] | 583 | u16 cmd, mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | |
Kenji Kaneshige | 5651c48 | 2009-11-13 15:14:10 +0900 | [diff] [blame] | 585 | /* |
| 586 | * TBD: Power fault detected software notification support. |
| 587 | * |
| 588 | * Power fault detected software notification is not enabled |
| 589 | * now, because it caused power fault detected interrupt storm |
| 590 | * on some machines. On those machines, power fault detected |
| 591 | * bit in the slot status register was set again immediately |
| 592 | * when it is cleared in the interrupt service routine, and |
| 593 | * next power fault detected interrupt was notified again. |
| 594 | */ |
Rajat Jain | 4f854f2 | 2014-02-04 18:29:23 -0800 | [diff] [blame] | 595 | |
| 596 | /* |
| 597 | * Always enable link events: thus link-up and link-down shall |
| 598 | * always be treated as hotplug and unplug respectively. Enable |
| 599 | * presence detect only if Attention Button is not present. |
| 600 | */ |
| 601 | cmd = PCI_EXP_SLTCTL_DLLSCE; |
Kenji Kaneshige | ae416e6 | 2008-04-25 14:39:06 -0700 | [diff] [blame] | 602 | if (ATTN_BUTTN(ctrl)) |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 603 | cmd |= PCI_EXP_SLTCTL_ABPE; |
Rajat Jain | 4f854f2 | 2014-02-04 18:29:23 -0800 | [diff] [blame] | 604 | else |
| 605 | cmd |= PCI_EXP_SLTCTL_PDCE; |
Kenji Kaneshige | ae416e6 | 2008-04-25 14:39:06 -0700 | [diff] [blame] | 606 | if (MRL_SENS(ctrl)) |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 607 | cmd |= PCI_EXP_SLTCTL_MRLSCE; |
Kenji Kaneshige | c27fb88 | 2008-04-25 14:39:05 -0700 | [diff] [blame] | 608 | if (!pciehp_poll_mode) |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 609 | cmd |= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE; |
Kenji Kaneshige | c27fb88 | 2008-04-25 14:39:05 -0700 | [diff] [blame] | 610 | |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 611 | mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE | |
| 612 | PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | |
Rajat Jain | 4f854f2 | 2014-02-04 18:29:23 -0800 | [diff] [blame] | 613 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | |
| 614 | PCI_EXP_SLTCTL_DLLSCE); |
Kenji Kaneshige | c27fb88 | 2008-04-25 14:39:05 -0700 | [diff] [blame] | 615 | |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 616 | pcie_write_cmd(ctrl, cmd, mask); |
Yinghai Lu | cf8d7b5 | 2014-09-22 20:36:09 -0600 | [diff] [blame] | 617 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
| 618 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 619 | } |
Mark Lord | 08e7a7d | 2007-11-28 15:11:46 -0800 | [diff] [blame] | 620 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 621 | static void pcie_disable_notification(struct controller *ctrl) |
| 622 | { |
| 623 | u16 mask; |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 624 | |
Kenji Kaneshige | 322162a | 2008-12-19 15:19:02 +0900 | [diff] [blame] | 625 | mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE | |
| 626 | PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | |
Kenji Kaneshige | f22daf1 | 2009-10-05 17:40:02 +0900 | [diff] [blame] | 627 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | |
| 628 | PCI_EXP_SLTCTL_DLLSCE); |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 629 | pcie_write_cmd(ctrl, 0, mask); |
Yinghai Lu | cf8d7b5 | 2014-09-22 20:36:09 -0600 | [diff] [blame] | 630 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
| 631 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 632 | } |
| 633 | |
Alex Williamson | 2e35afa | 2013-08-08 14:09:37 -0600 | [diff] [blame] | 634 | /* |
| 635 | * pciehp has a 1:1 bus:slot relationship so we ultimately want a secondary |
Rajat Jain | 2b3940b | 2014-02-18 18:53:19 -0800 | [diff] [blame] | 636 | * bus reset of the bridge, but at the same time we want to ensure that it is |
| 637 | * not seen as a hot-unplug, followed by the hot-plug of the device. Thus, |
| 638 | * disable link state notification and presence detection change notification |
| 639 | * momentarily, if we see that they could interfere. Also, clear any spurious |
Alex Williamson | 2e35afa | 2013-08-08 14:09:37 -0600 | [diff] [blame] | 640 | * events after. |
| 641 | */ |
| 642 | int pciehp_reset_slot(struct slot *slot, int probe) |
| 643 | { |
| 644 | struct controller *ctrl = slot->ctrl; |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 645 | struct pci_dev *pdev = ctrl_dev(ctrl); |
Rajat Jain | 06a8d89 | 2014-02-04 18:30:40 -0800 | [diff] [blame] | 646 | u16 stat_mask = 0, ctrl_mask = 0; |
Alex Williamson | 2e35afa | 2013-08-08 14:09:37 -0600 | [diff] [blame] | 647 | |
| 648 | if (probe) |
| 649 | return 0; |
| 650 | |
Rajat Jain | 2b3940b | 2014-02-18 18:53:19 -0800 | [diff] [blame] | 651 | if (!ATTN_BUTTN(ctrl)) { |
Rajat Jain | 06a8d89 | 2014-02-04 18:30:40 -0800 | [diff] [blame] | 652 | ctrl_mask |= PCI_EXP_SLTCTL_PDCE; |
| 653 | stat_mask |= PCI_EXP_SLTSTA_PDC; |
Alex Williamson | 2e35afa | 2013-08-08 14:09:37 -0600 | [diff] [blame] | 654 | } |
Rajat Jain | 06a8d89 | 2014-02-04 18:30:40 -0800 | [diff] [blame] | 655 | ctrl_mask |= PCI_EXP_SLTCTL_DLLSCE; |
| 656 | stat_mask |= PCI_EXP_SLTSTA_DLLSC; |
| 657 | |
| 658 | pcie_write_cmd(ctrl, 0, ctrl_mask); |
Yinghai Lu | cf8d7b5 | 2014-09-22 20:36:09 -0600 | [diff] [blame] | 659 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
| 660 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); |
Rajat Jain | 06a8d89 | 2014-02-04 18:30:40 -0800 | [diff] [blame] | 661 | if (pciehp_poll_mode) |
| 662 | del_timer_sync(&ctrl->poll_timer); |
Alex Williamson | 2e35afa | 2013-08-08 14:09:37 -0600 | [diff] [blame] | 663 | |
| 664 | pci_reset_bridge_secondary_bus(ctrl->pcie->port); |
| 665 | |
Rajat Jain | 06a8d89 | 2014-02-04 18:30:40 -0800 | [diff] [blame] | 666 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask); |
| 667 | pcie_write_cmd(ctrl, ctrl_mask, ctrl_mask); |
Yinghai Lu | cf8d7b5 | 2014-09-22 20:36:09 -0600 | [diff] [blame] | 668 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
| 669 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); |
Rajat Jain | 06a8d89 | 2014-02-04 18:30:40 -0800 | [diff] [blame] | 670 | if (pciehp_poll_mode) |
| 671 | int_poll_timeout(ctrl->poll_timer.data); |
Alex Williamson | 2e35afa | 2013-08-08 14:09:37 -0600 | [diff] [blame] | 672 | |
| 673 | return 0; |
| 674 | } |
| 675 | |
Eric W. Biederman | dbc7e1e | 2009-01-28 19:31:18 -0800 | [diff] [blame] | 676 | int pcie_init_notification(struct controller *ctrl) |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 677 | { |
| 678 | if (pciehp_request_irq(ctrl)) |
| 679 | return -1; |
Bjorn Helgaas | 6dae620 | 2013-12-14 13:06:16 -0700 | [diff] [blame] | 680 | pcie_enable_notification(ctrl); |
Eric W. Biederman | dbc7e1e | 2009-01-28 19:31:18 -0800 | [diff] [blame] | 681 | ctrl->notification_enabled = 1; |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 682 | return 0; |
| 683 | } |
| 684 | |
| 685 | static void pcie_shutdown_notification(struct controller *ctrl) |
| 686 | { |
Eric W. Biederman | dbc7e1e | 2009-01-28 19:31:18 -0800 | [diff] [blame] | 687 | if (ctrl->notification_enabled) { |
| 688 | pcie_disable_notification(ctrl); |
| 689 | pciehp_free_irq(ctrl); |
| 690 | ctrl->notification_enabled = 0; |
| 691 | } |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 692 | } |
| 693 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 694 | static int pcie_init_slot(struct controller *ctrl) |
| 695 | { |
| 696 | struct slot *slot; |
| 697 | |
| 698 | slot = kzalloc(sizeof(*slot), GFP_KERNEL); |
| 699 | if (!slot) |
| 700 | return -ENOMEM; |
| 701 | |
Kees Cook | d853754 | 2013-07-03 15:04:57 -0700 | [diff] [blame] | 702 | slot->wq = alloc_workqueue("pciehp-%u", 0, 0, PSN(ctrl)); |
Yijing Wang | c2be6f9 | 2013-01-11 10:15:54 +0800 | [diff] [blame] | 703 | if (!slot->wq) |
| 704 | goto abort; |
| 705 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 706 | slot->ctrl = ctrl; |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 707 | mutex_init(&slot->lock); |
Rajat Jain | 50b52fd | 2014-02-04 18:31:11 -0800 | [diff] [blame] | 708 | mutex_init(&slot->hotplug_lock); |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 709 | INIT_DELAYED_WORK(&slot->work, pciehp_queue_pushbutton_work); |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 710 | ctrl->slot = slot; |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 711 | return 0; |
Yijing Wang | c2be6f9 | 2013-01-11 10:15:54 +0800 | [diff] [blame] | 712 | abort: |
| 713 | kfree(slot); |
| 714 | return -ENOMEM; |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 715 | } |
| 716 | |
| 717 | static void pcie_cleanup_slot(struct controller *ctrl) |
| 718 | { |
Kenji Kaneshige | 8720d27 | 2009-09-15 17:24:46 +0900 | [diff] [blame] | 719 | struct slot *slot = ctrl->slot; |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 720 | cancel_delayed_work(&slot->work); |
Yijing Wang | c2be6f9 | 2013-01-11 10:15:54 +0800 | [diff] [blame] | 721 | destroy_workqueue(slot->wq); |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 722 | kfree(slot); |
| 723 | } |
| 724 | |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 725 | static inline void dbg_ctrl(struct controller *ctrl) |
| 726 | { |
| 727 | int i; |
| 728 | u16 reg16; |
Kenji Kaneshige | 385e249 | 2009-09-15 17:30:14 +0900 | [diff] [blame] | 729 | struct pci_dev *pdev = ctrl->pcie->port; |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 730 | |
| 731 | if (!pciehp_debug) |
| 732 | return; |
| 733 | |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 734 | ctrl_info(ctrl, "Hotplug Controller:\n"); |
| 735 | ctrl_info(ctrl, " Seg/Bus/Dev/Func/IRQ : %s IRQ %d\n", |
| 736 | pci_name(pdev), pdev->irq); |
| 737 | ctrl_info(ctrl, " Vendor ID : 0x%04x\n", pdev->vendor); |
| 738 | ctrl_info(ctrl, " Device ID : 0x%04x\n", pdev->device); |
| 739 | ctrl_info(ctrl, " Subsystem ID : 0x%04x\n", |
| 740 | pdev->subsystem_device); |
| 741 | ctrl_info(ctrl, " Subsystem Vendor ID : 0x%04x\n", |
| 742 | pdev->subsystem_vendor); |
Kenji Kaneshige | 1518c17 | 2009-11-11 14:34:52 +0900 | [diff] [blame] | 743 | ctrl_info(ctrl, " PCIe Cap offset : 0x%02x\n", |
| 744 | pci_pcie_cap(pdev)); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 745 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
| 746 | if (!pci_resource_len(pdev, i)) |
| 747 | continue; |
Bjorn Helgaas | e1944c6 | 2010-03-16 15:53:08 -0600 | [diff] [blame] | 748 | ctrl_info(ctrl, " PCI resource [%d] : %pR\n", |
| 749 | i, &pdev->resource[i]); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 750 | } |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 751 | ctrl_info(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap); |
Kenji Kaneshige | d54798f | 2009-09-15 17:28:53 +0900 | [diff] [blame] | 752 | ctrl_info(ctrl, " Physical Slot Number : %d\n", PSN(ctrl)); |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 753 | ctrl_info(ctrl, " Attention Button : %3s\n", |
| 754 | ATTN_BUTTN(ctrl) ? "yes" : "no"); |
| 755 | ctrl_info(ctrl, " Power Controller : %3s\n", |
| 756 | POWER_CTRL(ctrl) ? "yes" : "no"); |
| 757 | ctrl_info(ctrl, " MRL Sensor : %3s\n", |
| 758 | MRL_SENS(ctrl) ? "yes" : "no"); |
| 759 | ctrl_info(ctrl, " Attention Indicator : %3s\n", |
| 760 | ATTN_LED(ctrl) ? "yes" : "no"); |
| 761 | ctrl_info(ctrl, " Power Indicator : %3s\n", |
| 762 | PWR_LED(ctrl) ? "yes" : "no"); |
| 763 | ctrl_info(ctrl, " Hot-Plug Surprise : %3s\n", |
| 764 | HP_SUPR_RM(ctrl) ? "yes" : "no"); |
| 765 | ctrl_info(ctrl, " EMI Present : %3s\n", |
| 766 | EMI(ctrl) ? "yes" : "no"); |
| 767 | ctrl_info(ctrl, " Command Completed : %3s\n", |
| 768 | NO_CMD_CMPL(ctrl) ? "no" : "yes"); |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 769 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, ®16); |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 770 | ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16); |
Bjorn Helgaas | cd84d34 | 2013-05-09 11:26:16 -0600 | [diff] [blame] | 771 | pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, ®16); |
Taku Izumi | 7f2feec | 2008-09-05 12:11:26 +0900 | [diff] [blame] | 772 | ctrl_info(ctrl, "Slot Control : 0x%04x\n", reg16); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 773 | } |
| 774 | |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 775 | #define FLAG(x, y) (((x) & (y)) ? '+' : '-') |
Bjorn Helgaas | afe2478 | 2013-12-14 13:06:36 -0700 | [diff] [blame] | 776 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 777 | struct controller *pcie_init(struct pcie_device *dev) |
Mark Lord | 08e7a7d | 2007-11-28 15:11:46 -0800 | [diff] [blame] | 778 | { |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 779 | struct controller *ctrl; |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 780 | u32 slot_cap, link_cap; |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 781 | struct pci_dev *pdev = dev->port; |
Mark Lord | 08e7a7d | 2007-11-28 15:11:46 -0800 | [diff] [blame] | 782 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 783 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
| 784 | if (!ctrl) { |
Taku Izumi | 18b341b | 2008-10-23 11:47:32 +0900 | [diff] [blame] | 785 | dev_err(&dev->device, "%s: Out of memory\n", __func__); |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 786 | goto abort; |
| 787 | } |
Kenji Kaneshige | f7a10e3 | 2008-08-22 17:16:48 +0900 | [diff] [blame] | 788 | ctrl->pcie = dev; |
Bjorn Helgaas | 1a84b99 | 2013-12-14 13:06:07 -0700 | [diff] [blame] | 789 | pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 790 | ctrl->slot_cap = slot_cap; |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 791 | mutex_init(&ctrl->ctrl_lock); |
| 792 | init_waitqueue_head(&ctrl->queue); |
| 793 | dbg_ctrl(ctrl); |
Bjorn Helgaas | 2cc56f3 | 2014-06-14 10:56:31 -0600 | [diff] [blame] | 794 | |
Ryan Desfosses | 3c78bc6 | 2014-04-18 20:13:49 -0400 | [diff] [blame] | 795 | /* Check if Data Link Layer Link Active Reporting is implemented */ |
| 796 | pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap); |
| 797 | if (link_cap & PCI_EXP_LNKCAP_DLLLARC) { |
| 798 | ctrl_dbg(ctrl, "Link Active Reporting supported\n"); |
| 799 | ctrl->link_active_reporting = 1; |
| 800 | } |
Kenji Kaneshige | f18e962 | 2008-10-22 14:31:44 +0900 | [diff] [blame] | 801 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 802 | /* Clear all remaining event bits in Slot Status register */ |
Bjorn Helgaas | df72648 | 2013-12-14 13:06:47 -0700 | [diff] [blame] | 803 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, |
| 804 | PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD | |
| 805 | PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC | |
Myron Stowe | 0d25d35 | 2014-06-17 13:27:34 -0600 | [diff] [blame] | 806 | PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC); |
Mark Lord | 08e7a7d | 2007-11-28 15:11:46 -0800 | [diff] [blame] | 807 | |
Bjorn Helgaas | afe2478 | 2013-12-14 13:06:36 -0700 | [diff] [blame] | 808 | ctrl_info(ctrl, "Slot #%d AttnBtn%c AttnInd%c PwrInd%c PwrCtrl%c MRL%c Interlock%c NoCompl%c LLActRep%c\n", |
| 809 | (slot_cap & PCI_EXP_SLTCAP_PSN) >> 19, |
| 810 | FLAG(slot_cap, PCI_EXP_SLTCAP_ABP), |
| 811 | FLAG(slot_cap, PCI_EXP_SLTCAP_AIP), |
| 812 | FLAG(slot_cap, PCI_EXP_SLTCAP_PIP), |
| 813 | FLAG(slot_cap, PCI_EXP_SLTCAP_PCP), |
| 814 | FLAG(slot_cap, PCI_EXP_SLTCAP_MRLSP), |
| 815 | FLAG(slot_cap, PCI_EXP_SLTCAP_EIP), |
| 816 | FLAG(slot_cap, PCI_EXP_SLTCAP_NCCS), |
| 817 | FLAG(link_cap, PCI_EXP_LNKCAP_DLLLARC)); |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 818 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 819 | if (pcie_init_slot(ctrl)) |
| 820 | goto abort_ctrl; |
Kenji Kaneshige | 2aeeef1 | 2008-04-25 14:39:08 -0700 | [diff] [blame] | 821 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 822 | return ctrl; |
| 823 | |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 824 | abort_ctrl: |
| 825 | kfree(ctrl); |
Mark Lord | 08e7a7d | 2007-11-28 15:11:46 -0800 | [diff] [blame] | 826 | abort: |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 827 | return NULL; |
| 828 | } |
| 829 | |
Kenji Kaneshige | 82a9e79 | 2009-09-15 17:30:48 +0900 | [diff] [blame] | 830 | void pciehp_release_ctrl(struct controller *ctrl) |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 831 | { |
| 832 | pcie_shutdown_notification(ctrl); |
| 833 | pcie_cleanup_slot(ctrl); |
Kenji Kaneshige | c4635eb | 2008-06-20 12:07:08 +0900 | [diff] [blame] | 834 | kfree(ctrl); |
Mark Lord | 08e7a7d | 2007-11-28 15:11:46 -0800 | [diff] [blame] | 835 | } |