blob: a02112ba1c3df692b3a089a3ab24a8f30d35b7ec [file] [log] [blame]
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +01001/*
2 * Analog Devices ADV7511 HDMI transmitter driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
11#include <linux/i2c.h>
12#include <linux/module.h>
13#include <linux/regmap.h>
14#include <linux/slab.h>
15
16#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_encoder_slave.h>
20
21#include "adv7511.h"
22
23struct adv7511 {
24 struct i2c_client *i2c_main;
25 struct i2c_client *i2c_edid;
26
27 struct regmap *regmap;
28 struct regmap *packet_memory_regmap;
29 enum drm_connector_status status;
Laurent Pinchartc6169e42015-03-02 14:38:52 +020030 bool powered;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +010031
32 unsigned int f_tmds;
33
34 unsigned int current_edid_segment;
35 uint8_t edid_buf[256];
Laurent Pincharta5241282015-02-18 15:19:33 +020036 bool edid_read;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +010037
38 wait_queue_head_t wq;
39 struct drm_encoder *encoder;
40
41 bool embedded_sync;
42 enum adv7511_sync_polarity vsync_polarity;
43 enum adv7511_sync_polarity hsync_polarity;
44 bool rgb;
45
46 struct edid *edid;
47
48 struct gpio_desc *gpio_pd;
49};
50
51static struct adv7511 *encoder_to_adv7511(struct drm_encoder *encoder)
52{
53 return to_encoder_slave(encoder)->slave_priv;
54}
55
56/* ADI recommended values for proper operation. */
Nariman Poushin8019ff62015-07-16 16:36:21 +010057static const struct reg_sequence adv7511_fixed_registers[] = {
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +010058 { 0x98, 0x03 },
59 { 0x9a, 0xe0 },
60 { 0x9c, 0x30 },
61 { 0x9d, 0x61 },
62 { 0xa2, 0xa4 },
63 { 0xa3, 0xa4 },
64 { 0xe0, 0xd0 },
65 { 0xf9, 0x00 },
66 { 0x55, 0x02 },
67};
68
69/* -----------------------------------------------------------------------------
70 * Register access
71 */
72
73static const uint8_t adv7511_register_defaults[] = {
74 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */
75 0x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,
76 0x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */
77 0x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,
78 0x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */
79 0x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
81 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,
82 0x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */
83 0x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
84 0x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
87 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
91 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */
93 0x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,
94 0x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */
95 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,
96 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */
97 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
98 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */
99 0x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,
100 0x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */
101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,
102 0x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */
103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */
105 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
106};
107
108static bool adv7511_register_volatile(struct device *dev, unsigned int reg)
109{
110 switch (reg) {
111 case ADV7511_REG_CHIP_REVISION:
112 case ADV7511_REG_SPDIF_FREQ:
113 case ADV7511_REG_CTS_AUTOMATIC1:
114 case ADV7511_REG_CTS_AUTOMATIC2:
115 case ADV7511_REG_VIC_DETECTED:
116 case ADV7511_REG_VIC_SEND:
117 case ADV7511_REG_AUX_VIC_DETECTED:
118 case ADV7511_REG_STATUS:
119 case ADV7511_REG_GC(1):
120 case ADV7511_REG_INT(0):
121 case ADV7511_REG_INT(1):
122 case ADV7511_REG_PLL_STATUS:
123 case ADV7511_REG_AN(0):
124 case ADV7511_REG_AN(1):
125 case ADV7511_REG_AN(2):
126 case ADV7511_REG_AN(3):
127 case ADV7511_REG_AN(4):
128 case ADV7511_REG_AN(5):
129 case ADV7511_REG_AN(6):
130 case ADV7511_REG_AN(7):
131 case ADV7511_REG_HDCP_STATUS:
132 case ADV7511_REG_BCAPS:
133 case ADV7511_REG_BKSV(0):
134 case ADV7511_REG_BKSV(1):
135 case ADV7511_REG_BKSV(2):
136 case ADV7511_REG_BKSV(3):
137 case ADV7511_REG_BKSV(4):
138 case ADV7511_REG_DDC_STATUS:
Wolfram Sangcd38a332016-01-04 03:33:46 +0100139 case ADV7511_REG_EDID_READ_CTRL:
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100140 case ADV7511_REG_BSTATUS(0):
141 case ADV7511_REG_BSTATUS(1):
142 case ADV7511_REG_CHIP_ID_HIGH:
143 case ADV7511_REG_CHIP_ID_LOW:
144 return true;
145 }
146
147 return false;
148}
149
150static const struct regmap_config adv7511_regmap_config = {
151 .reg_bits = 8,
152 .val_bits = 8,
153
154 .max_register = 0xff,
155 .cache_type = REGCACHE_RBTREE,
156 .reg_defaults_raw = adv7511_register_defaults,
157 .num_reg_defaults_raw = ARRAY_SIZE(adv7511_register_defaults),
158
159 .volatile_reg = adv7511_register_volatile,
160};
161
162/* -----------------------------------------------------------------------------
163 * Hardware configuration
164 */
165
166static void adv7511_set_colormap(struct adv7511 *adv7511, bool enable,
167 const uint16_t *coeff,
168 unsigned int scaling_factor)
169{
170 unsigned int i;
171
172 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
173 ADV7511_CSC_UPDATE_MODE, ADV7511_CSC_UPDATE_MODE);
174
175 if (enable) {
176 for (i = 0; i < 12; ++i) {
177 regmap_update_bits(adv7511->regmap,
178 ADV7511_REG_CSC_UPPER(i),
179 0x1f, coeff[i] >> 8);
180 regmap_write(adv7511->regmap,
181 ADV7511_REG_CSC_LOWER(i),
182 coeff[i] & 0xff);
183 }
184 }
185
186 if (enable)
187 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
188 0xe0, 0x80 | (scaling_factor << 5));
189 else
190 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
191 0x80, 0x00);
192
193 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
194 ADV7511_CSC_UPDATE_MODE, 0);
195}
196
197static int adv7511_packet_enable(struct adv7511 *adv7511, unsigned int packet)
198{
199 if (packet & 0xff)
200 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
201 packet, 0xff);
202
203 if (packet & 0xff00) {
204 packet >>= 8;
205 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
206 packet, 0xff);
207 }
208
209 return 0;
210}
211
212static int adv7511_packet_disable(struct adv7511 *adv7511, unsigned int packet)
213{
214 if (packet & 0xff)
215 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
216 packet, 0x00);
217
218 if (packet & 0xff00) {
219 packet >>= 8;
220 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
221 packet, 0x00);
222 }
223
224 return 0;
225}
226
227/* Coefficients for adv7511 color space conversion */
228static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
229 0x0734, 0x04ad, 0x0000, 0x1c1b,
230 0x1ddc, 0x04ad, 0x1f24, 0x0135,
231 0x0000, 0x04ad, 0x087c, 0x1b77,
232};
233
234static void adv7511_set_config_csc(struct adv7511 *adv7511,
235 struct drm_connector *connector,
236 bool rgb)
237{
238 struct adv7511_video_config config;
239 bool output_format_422, output_format_ycbcr;
240 unsigned int mode;
241 uint8_t infoframe[17];
242
243 if (adv7511->edid)
244 config.hdmi_mode = drm_detect_hdmi_monitor(adv7511->edid);
245 else
246 config.hdmi_mode = false;
247
248 hdmi_avi_infoframe_init(&config.avi_infoframe);
249
250 config.avi_infoframe.scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
251
252 if (rgb) {
253 config.csc_enable = false;
254 config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
255 } else {
256 config.csc_scaling_factor = ADV7511_CSC_SCALING_4;
257 config.csc_coefficents = adv7511_csc_ycbcr_to_rgb;
258
259 if ((connector->display_info.color_formats &
260 DRM_COLOR_FORMAT_YCRCB422) &&
261 config.hdmi_mode) {
262 config.csc_enable = false;
263 config.avi_infoframe.colorspace =
264 HDMI_COLORSPACE_YUV422;
265 } else {
266 config.csc_enable = true;
267 config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
268 }
269 }
270
271 if (config.hdmi_mode) {
272 mode = ADV7511_HDMI_CFG_MODE_HDMI;
273
274 switch (config.avi_infoframe.colorspace) {
275 case HDMI_COLORSPACE_YUV444:
276 output_format_422 = false;
277 output_format_ycbcr = true;
278 break;
279 case HDMI_COLORSPACE_YUV422:
280 output_format_422 = true;
281 output_format_ycbcr = true;
282 break;
283 default:
284 output_format_422 = false;
285 output_format_ycbcr = false;
286 break;
287 }
288 } else {
289 mode = ADV7511_HDMI_CFG_MODE_DVI;
290 output_format_422 = false;
291 output_format_ycbcr = false;
292 }
293
294 adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
295
296 adv7511_set_colormap(adv7511, config.csc_enable,
297 config.csc_coefficents,
298 config.csc_scaling_factor);
299
300 regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x81,
301 (output_format_422 << 7) | output_format_ycbcr);
302
303 regmap_update_bits(adv7511->regmap, ADV7511_REG_HDCP_HDMI_CFG,
304 ADV7511_HDMI_CFG_MODE_MASK, mode);
305
306 hdmi_avi_infoframe_pack(&config.avi_infoframe, infoframe,
307 sizeof(infoframe));
308
309 /* The AVI infoframe id is not configurable */
310 regmap_bulk_write(adv7511->regmap, ADV7511_REG_AVI_INFOFRAME_VERSION,
311 infoframe + 1, sizeof(infoframe) - 1);
312
313 adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
314}
315
316static void adv7511_set_link_config(struct adv7511 *adv7511,
317 const struct adv7511_link_config *config)
318{
319 /*
320 * The input style values documented in the datasheet don't match the
321 * hardware register field values :-(
322 */
323 static const unsigned int input_styles[4] = { 0, 2, 1, 3 };
324
325 unsigned int clock_delay;
326 unsigned int color_depth;
327 unsigned int input_id;
328
329 clock_delay = (config->clock_delay + 1200) / 400;
330 color_depth = config->input_color_depth == 8 ? 3
331 : (config->input_color_depth == 10 ? 1 : 2);
332
333 /* TODO Support input ID 6 */
334 if (config->input_colorspace != HDMI_COLORSPACE_YUV422)
335 input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR
336 ? 5 : 0;
337 else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR)
338 input_id = config->embedded_sync ? 8 : 7;
339 else if (config->input_clock == ADV7511_INPUT_CLOCK_2X)
340 input_id = config->embedded_sync ? 4 : 3;
341 else
342 input_id = config->embedded_sync ? 2 : 1;
343
344 regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, 0xf,
345 input_id);
346 regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x7e,
347 (color_depth << 4) |
348 (input_styles[config->input_style] << 2));
349 regmap_write(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG2,
350 config->input_justification << 3);
351 regmap_write(adv7511->regmap, ADV7511_REG_TIMING_GEN_SEQ,
352 config->sync_pulse << 2);
353
354 regmap_write(adv7511->regmap, 0xba, clock_delay << 5);
355
356 adv7511->embedded_sync = config->embedded_sync;
357 adv7511->hsync_polarity = config->hsync_polarity;
358 adv7511->vsync_polarity = config->vsync_polarity;
359 adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
360}
361
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200362static void adv7511_power_on(struct adv7511 *adv7511)
363{
364 adv7511->current_edid_segment = -1;
365
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200366 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
367 ADV7511_POWER_POWER_DOWN, 0);
Wolfram Sangd0be8582016-01-04 03:33:45 +0100368 if (adv7511->i2c_main->irq) {
369 /*
370 * Documentation says the INT_ENABLE registers are reset in
371 * POWER_DOWN mode. My 7511w preserved the bits, however.
372 * Still, let's be safe and stick to the documentation.
373 */
374 regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
375 ADV7511_INT0_EDID_READY);
376 regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
377 ADV7511_INT1_DDC_ERROR);
378 }
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200379
380 /*
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100381 * Per spec it is allowed to pulse the HPD signal to indicate that the
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200382 * EDID information has changed. Some monitors do this when they wakeup
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100383 * from standby or are enabled. When the HPD goes low the adv7511 is
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200384 * reset and the outputs are disabled which might cause the monitor to
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100385 * go to standby again. To avoid this we ignore the HPD pin for the
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200386 * first few seconds after enabling the output.
387 */
388 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100389 ADV7511_REG_POWER2_HPD_SRC_MASK,
390 ADV7511_REG_POWER2_HPD_SRC_NONE);
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200391
392 /*
393 * Most of the registers are reset during power down or when HPD is low.
394 */
395 regcache_sync(adv7511->regmap);
396
397 adv7511->powered = true;
398}
399
400static void adv7511_power_off(struct adv7511 *adv7511)
401{
402 /* TODO: setup additional power down modes */
403 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
404 ADV7511_POWER_POWER_DOWN,
405 ADV7511_POWER_POWER_DOWN);
406 regcache_mark_dirty(adv7511->regmap);
407
408 adv7511->powered = false;
409}
410
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100411/* -----------------------------------------------------------------------------
412 * Interrupt and hotplug detection
413 */
414
415static bool adv7511_hpd(struct adv7511 *adv7511)
416{
417 unsigned int irq0;
418 int ret;
419
420 ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
421 if (ret < 0)
422 return false;
423
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100424 if (irq0 & ADV7511_INT0_HPD) {
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100425 regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100426 ADV7511_INT0_HPD);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100427 return true;
428 }
429
430 return false;
431}
432
Laurent Pincharta5241282015-02-18 15:19:33 +0200433static int adv7511_irq_process(struct adv7511 *adv7511)
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100434{
435 unsigned int irq0, irq1;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100436 int ret;
437
438 ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
439 if (ret < 0)
Laurent Pincharta5241282015-02-18 15:19:33 +0200440 return ret;
441
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100442 ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(1), &irq1);
443 if (ret < 0)
Laurent Pincharta5241282015-02-18 15:19:33 +0200444 return ret;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100445
Laurent Pincharta5241282015-02-18 15:19:33 +0200446 regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);
447 regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100448
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100449 if (irq0 & ADV7511_INT0_HPD && adv7511->encoder)
Laurent Pincharta5241282015-02-18 15:19:33 +0200450 drm_helper_hpd_irq_event(adv7511->encoder->dev);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100451
Laurent Pincharta5241282015-02-18 15:19:33 +0200452 if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {
453 adv7511->edid_read = true;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100454
Laurent Pincharta5241282015-02-18 15:19:33 +0200455 if (adv7511->i2c_main->irq)
456 wake_up_all(&adv7511->wq);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100457 }
458
Laurent Pincharta5241282015-02-18 15:19:33 +0200459 return 0;
460}
461
462static irqreturn_t adv7511_irq_handler(int irq, void *devid)
463{
464 struct adv7511 *adv7511 = devid;
465 int ret;
466
467 ret = adv7511_irq_process(adv7511);
468 return ret < 0 ? IRQ_NONE : IRQ_HANDLED;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100469}
470
471/* -----------------------------------------------------------------------------
472 * EDID retrieval
473 */
474
Laurent Pincharta5241282015-02-18 15:19:33 +0200475static int adv7511_wait_for_edid(struct adv7511 *adv7511, int timeout)
476{
477 int ret;
478
479 if (adv7511->i2c_main->irq) {
480 ret = wait_event_interruptible_timeout(adv7511->wq,
481 adv7511->edid_read, msecs_to_jiffies(timeout));
482 } else {
483 for (; timeout > 0; timeout -= 25) {
484 ret = adv7511_irq_process(adv7511);
485 if (ret < 0)
486 break;
487
488 if (adv7511->edid_read)
489 break;
490
491 msleep(25);
492 }
493 }
494
495 return adv7511->edid_read ? 0 : -EIO;
496}
497
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100498static int adv7511_get_edid_block(void *data, u8 *buf, unsigned int block,
499 size_t len)
500{
501 struct adv7511 *adv7511 = data;
502 struct i2c_msg xfer[2];
503 uint8_t offset;
504 unsigned int i;
505 int ret;
506
507 if (len > 128)
508 return -EINVAL;
509
510 if (adv7511->current_edid_segment != block / 2) {
511 unsigned int status;
512
513 ret = regmap_read(adv7511->regmap, ADV7511_REG_DDC_STATUS,
514 &status);
515 if (ret < 0)
516 return ret;
517
518 if (status != 2) {
Laurent Pincharta5241282015-02-18 15:19:33 +0200519 adv7511->edid_read = false;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100520 regmap_write(adv7511->regmap, ADV7511_REG_EDID_SEGMENT,
521 block);
Laurent Pincharta5241282015-02-18 15:19:33 +0200522 ret = adv7511_wait_for_edid(adv7511, 200);
523 if (ret < 0)
524 return ret;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100525 }
526
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100527 /* Break this apart, hopefully more I2C controllers will
528 * support 64 byte transfers than 256 byte transfers
529 */
530
531 xfer[0].addr = adv7511->i2c_edid->addr;
532 xfer[0].flags = 0;
533 xfer[0].len = 1;
534 xfer[0].buf = &offset;
535 xfer[1].addr = adv7511->i2c_edid->addr;
536 xfer[1].flags = I2C_M_RD;
537 xfer[1].len = 64;
538 xfer[1].buf = adv7511->edid_buf;
539
540 offset = 0;
541
542 for (i = 0; i < 4; ++i) {
543 ret = i2c_transfer(adv7511->i2c_edid->adapter, xfer,
544 ARRAY_SIZE(xfer));
545 if (ret < 0)
546 return ret;
547 else if (ret != 2)
548 return -EIO;
549
550 xfer[1].buf += 64;
551 offset += 64;
552 }
553
554 adv7511->current_edid_segment = block / 2;
555 }
556
557 if (block % 2 == 0)
558 memcpy(buf, adv7511->edid_buf, len);
559 else
560 memcpy(buf, adv7511->edid_buf + 128, len);
561
562 return 0;
563}
564
565/* -----------------------------------------------------------------------------
566 * Encoder operations
567 */
568
569static int adv7511_get_modes(struct drm_encoder *encoder,
570 struct drm_connector *connector)
571{
572 struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
573 struct edid *edid;
574 unsigned int count;
575
576 /* Reading the EDID only works if the device is powered */
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200577 if (!adv7511->powered) {
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100578 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
579 ADV7511_POWER_POWER_DOWN, 0);
Wolfram Sangd0be8582016-01-04 03:33:45 +0100580 if (adv7511->i2c_main->irq) {
581 regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
582 ADV7511_INT0_EDID_READY);
583 regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
584 ADV7511_INT1_DDC_ERROR);
585 }
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100586 adv7511->current_edid_segment = -1;
587 }
588
589 edid = drm_do_get_edid(connector, adv7511_get_edid_block, adv7511);
590
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200591 if (!adv7511->powered)
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100592 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
593 ADV7511_POWER_POWER_DOWN,
594 ADV7511_POWER_POWER_DOWN);
595
596 kfree(adv7511->edid);
597 adv7511->edid = edid;
598 if (!edid)
599 return 0;
600
601 drm_mode_connector_update_edid_property(connector, edid);
602 count = drm_add_edid_modes(connector, edid);
603
604 adv7511_set_config_csc(adv7511, connector, adv7511->rgb);
605
606 return count;
607}
608
609static void adv7511_encoder_dpms(struct drm_encoder *encoder, int mode)
610{
611 struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
612
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200613 if (mode == DRM_MODE_DPMS_ON)
614 adv7511_power_on(adv7511);
615 else
616 adv7511_power_off(adv7511);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100617}
618
619static enum drm_connector_status
620adv7511_encoder_detect(struct drm_encoder *encoder,
621 struct drm_connector *connector)
622{
623 struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
624 enum drm_connector_status status;
625 unsigned int val;
626 bool hpd;
627 int ret;
628
629 ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
630 if (ret < 0)
631 return connector_status_disconnected;
632
633 if (val & ADV7511_STATUS_HPD)
634 status = connector_status_connected;
635 else
636 status = connector_status_disconnected;
637
638 hpd = adv7511_hpd(adv7511);
639
640 /* The chip resets itself when the cable is disconnected, so in case
641 * there is a pending HPD interrupt and the cable is connected there was
642 * at least one transition from disconnected to connected and the chip
643 * has to be reinitialized. */
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200644 if (status == connector_status_connected && hpd && adv7511->powered) {
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100645 regcache_mark_dirty(adv7511->regmap);
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200646 adv7511_power_on(adv7511);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100647 adv7511_get_modes(encoder, connector);
648 if (adv7511->status == connector_status_connected)
649 status = connector_status_disconnected;
650 } else {
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100651 /* Renable HPD sensing */
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100652 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
Wolfram Sang29ce4ed2016-01-04 03:33:47 +0100653 ADV7511_REG_POWER2_HPD_SRC_MASK,
654 ADV7511_REG_POWER2_HPD_SRC_BOTH);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100655 }
656
657 adv7511->status = status;
658 return status;
659}
660
661static int adv7511_encoder_mode_valid(struct drm_encoder *encoder,
662 struct drm_display_mode *mode)
663{
664 if (mode->clock > 165000)
665 return MODE_CLOCK_HIGH;
666
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100667 return MODE_OK;
668}
669
670static void adv7511_encoder_mode_set(struct drm_encoder *encoder,
671 struct drm_display_mode *mode,
672 struct drm_display_mode *adj_mode)
673{
674 struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
675 unsigned int low_refresh_rate;
676 unsigned int hsync_polarity = 0;
677 unsigned int vsync_polarity = 0;
678
679 if (adv7511->embedded_sync) {
680 unsigned int hsync_offset, hsync_len;
681 unsigned int vsync_offset, vsync_len;
682
683 hsync_offset = adj_mode->crtc_hsync_start -
684 adj_mode->crtc_hdisplay;
685 vsync_offset = adj_mode->crtc_vsync_start -
686 adj_mode->crtc_vdisplay;
687 hsync_len = adj_mode->crtc_hsync_end -
688 adj_mode->crtc_hsync_start;
689 vsync_len = adj_mode->crtc_vsync_end -
690 adj_mode->crtc_vsync_start;
691
692 /* The hardware vsync generator has a off-by-one bug */
693 vsync_offset += 1;
694
695 regmap_write(adv7511->regmap, ADV7511_REG_HSYNC_PLACEMENT_MSB,
696 ((hsync_offset >> 10) & 0x7) << 5);
697 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(0),
698 (hsync_offset >> 2) & 0xff);
699 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(1),
700 ((hsync_offset & 0x3) << 6) |
701 ((hsync_len >> 4) & 0x3f));
702 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(2),
703 ((hsync_len & 0xf) << 4) |
704 ((vsync_offset >> 6) & 0xf));
705 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(3),
706 ((vsync_offset & 0x3f) << 2) |
707 ((vsync_len >> 8) & 0x3));
708 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(4),
709 vsync_len & 0xff);
710
711 hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);
712 vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);
713 } else {
714 enum adv7511_sync_polarity mode_hsync_polarity;
715 enum adv7511_sync_polarity mode_vsync_polarity;
716
717 /**
718 * If the input signal is always low or always high we want to
719 * invert or let it passthrough depending on the polarity of the
720 * current mode.
721 **/
722 if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)
723 mode_hsync_polarity = ADV7511_SYNC_POLARITY_LOW;
724 else
725 mode_hsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
726
727 if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)
728 mode_vsync_polarity = ADV7511_SYNC_POLARITY_LOW;
729 else
730 mode_vsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
731
732 if (adv7511->hsync_polarity != mode_hsync_polarity &&
733 adv7511->hsync_polarity !=
734 ADV7511_SYNC_POLARITY_PASSTHROUGH)
735 hsync_polarity = 1;
736
737 if (adv7511->vsync_polarity != mode_vsync_polarity &&
738 adv7511->vsync_polarity !=
739 ADV7511_SYNC_POLARITY_PASSTHROUGH)
740 vsync_polarity = 1;
741 }
742
743 if (mode->vrefresh <= 24000)
744 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_24HZ;
745 else if (mode->vrefresh <= 25000)
746 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_25HZ;
747 else if (mode->vrefresh <= 30000)
748 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_30HZ;
749 else
750 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;
751
752 regmap_update_bits(adv7511->regmap, 0xfb,
753 0x6, low_refresh_rate << 1);
754 regmap_update_bits(adv7511->regmap, 0x17,
755 0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
756
757 /*
758 * TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is
759 * supposed to give better results.
760 */
761
762 adv7511->f_tmds = mode->clock;
763}
764
Ville Syrjäläd2267b92015-12-15 12:21:07 +0100765static const struct drm_encoder_slave_funcs adv7511_encoder_funcs = {
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100766 .dpms = adv7511_encoder_dpms,
767 .mode_valid = adv7511_encoder_mode_valid,
768 .mode_set = adv7511_encoder_mode_set,
769 .detect = adv7511_encoder_detect,
770 .get_modes = adv7511_get_modes,
771};
772
773/* -----------------------------------------------------------------------------
774 * Probe & remove
775 */
776
777static int adv7511_parse_dt(struct device_node *np,
778 struct adv7511_link_config *config)
779{
780 const char *str;
781 int ret;
782
783 memset(config, 0, sizeof(*config));
784
785 of_property_read_u32(np, "adi,input-depth", &config->input_color_depth);
786 if (config->input_color_depth != 8 && config->input_color_depth != 10 &&
787 config->input_color_depth != 12)
788 return -EINVAL;
789
790 ret = of_property_read_string(np, "adi,input-colorspace", &str);
791 if (ret < 0)
792 return ret;
793
794 if (!strcmp(str, "rgb"))
795 config->input_colorspace = HDMI_COLORSPACE_RGB;
796 else if (!strcmp(str, "yuv422"))
797 config->input_colorspace = HDMI_COLORSPACE_YUV422;
798 else if (!strcmp(str, "yuv444"))
799 config->input_colorspace = HDMI_COLORSPACE_YUV444;
800 else
801 return -EINVAL;
802
803 ret = of_property_read_string(np, "adi,input-clock", &str);
804 if (ret < 0)
805 return ret;
806
807 if (!strcmp(str, "1x"))
808 config->input_clock = ADV7511_INPUT_CLOCK_1X;
809 else if (!strcmp(str, "2x"))
810 config->input_clock = ADV7511_INPUT_CLOCK_2X;
811 else if (!strcmp(str, "ddr"))
812 config->input_clock = ADV7511_INPUT_CLOCK_DDR;
813 else
814 return -EINVAL;
815
816 if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||
817 config->input_clock != ADV7511_INPUT_CLOCK_1X) {
818 ret = of_property_read_u32(np, "adi,input-style",
819 &config->input_style);
820 if (ret)
821 return ret;
822
823 if (config->input_style < 1 || config->input_style > 3)
824 return -EINVAL;
825
826 ret = of_property_read_string(np, "adi,input-justification",
827 &str);
828 if (ret < 0)
829 return ret;
830
831 if (!strcmp(str, "left"))
832 config->input_justification =
833 ADV7511_INPUT_JUSTIFICATION_LEFT;
834 else if (!strcmp(str, "evenly"))
835 config->input_justification =
836 ADV7511_INPUT_JUSTIFICATION_EVENLY;
837 else if (!strcmp(str, "right"))
838 config->input_justification =
839 ADV7511_INPUT_JUSTIFICATION_RIGHT;
840 else
841 return -EINVAL;
842
843 } else {
844 config->input_style = 1;
845 config->input_justification = ADV7511_INPUT_JUSTIFICATION_LEFT;
846 }
847
848 of_property_read_u32(np, "adi,clock-delay", &config->clock_delay);
849 if (config->clock_delay < -1200 || config->clock_delay > 1600)
850 return -EINVAL;
851
852 config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");
853
854 /* Hardcode the sync pulse configurations for now. */
855 config->sync_pulse = ADV7511_INPUT_SYNC_PULSE_NONE;
856 config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
857 config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
858
859 return 0;
860}
861
862static const int edid_i2c_addr = 0x7e;
863static const int packet_i2c_addr = 0x70;
864static const int cec_i2c_addr = 0x78;
865
866static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
867{
868 struct adv7511_link_config link_config;
869 struct adv7511 *adv7511;
870 struct device *dev = &i2c->dev;
871 unsigned int val;
872 int ret;
873
874 if (!dev->of_node)
875 return -EINVAL;
876
877 adv7511 = devm_kzalloc(dev, sizeof(*adv7511), GFP_KERNEL);
878 if (!adv7511)
879 return -ENOMEM;
880
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200881 adv7511->powered = false;
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100882 adv7511->status = connector_status_disconnected;
883
884 ret = adv7511_parse_dt(dev->of_node, &link_config);
885 if (ret)
886 return ret;
887
888 /*
889 * The power down GPIO is optional. If present, toggle it from active to
890 * inactive to wake up the encoder.
891 */
892 adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
893 if (IS_ERR(adv7511->gpio_pd))
894 return PTR_ERR(adv7511->gpio_pd);
895
896 if (adv7511->gpio_pd) {
897 mdelay(5);
898 gpiod_set_value_cansleep(adv7511->gpio_pd, 0);
899 }
900
901 adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);
902 if (IS_ERR(adv7511->regmap))
903 return PTR_ERR(adv7511->regmap);
904
905 ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);
906 if (ret)
907 return ret;
908 dev_dbg(dev, "Rev. %d\n", val);
909
910 ret = regmap_register_patch(adv7511->regmap, adv7511_fixed_registers,
911 ARRAY_SIZE(adv7511_fixed_registers));
912 if (ret)
913 return ret;
914
915 regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
916 regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
917 packet_i2c_addr);
918 regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR, cec_i2c_addr);
919 adv7511_packet_disable(adv7511, 0xffff);
920
921 adv7511->i2c_main = i2c;
922 adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
923 if (!adv7511->i2c_edid)
924 return -ENOMEM;
925
926 if (i2c->irq) {
927 init_waitqueue_head(&adv7511->wq);
928
929 ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
930 adv7511_irq_handler,
931 IRQF_ONESHOT, dev_name(dev),
932 adv7511);
933 if (ret)
934 goto err_i2c_unregister_device;
935 }
936
937 /* CEC is unused for now */
938 regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
939 ADV7511_CEC_CTRL_POWER_DOWN);
940
Laurent Pinchartc6169e42015-03-02 14:38:52 +0200941 adv7511_power_off(adv7511);
Lars-Peter Clausen9c8af882012-03-05 16:30:57 +0100942
943 i2c_set_clientdata(i2c, adv7511);
944
945 adv7511_set_link_config(adv7511, &link_config);
946
947 return 0;
948
949err_i2c_unregister_device:
950 i2c_unregister_device(adv7511->i2c_edid);
951
952 return ret;
953}
954
955static int adv7511_remove(struct i2c_client *i2c)
956{
957 struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
958
959 i2c_unregister_device(adv7511->i2c_edid);
960
961 kfree(adv7511->edid);
962
963 return 0;
964}
965
966static int adv7511_encoder_init(struct i2c_client *i2c, struct drm_device *dev,
967 struct drm_encoder_slave *encoder)
968{
969
970 struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
971
972 encoder->slave_priv = adv7511;
973 encoder->slave_funcs = &adv7511_encoder_funcs;
974
975 adv7511->encoder = &encoder->base;
976
977 return 0;
978}
979
980static const struct i2c_device_id adv7511_i2c_ids[] = {
981 { "adv7511", 0 },
982 { "adv7511w", 0 },
983 { "adv7513", 0 },
984 { }
985};
986MODULE_DEVICE_TABLE(i2c, adv7511_i2c_ids);
987
988static const struct of_device_id adv7511_of_ids[] = {
989 { .compatible = "adi,adv7511", },
990 { .compatible = "adi,adv7511w", },
991 { .compatible = "adi,adv7513", },
992 { }
993};
994MODULE_DEVICE_TABLE(of, adv7511_of_ids);
995
996static struct drm_i2c_encoder_driver adv7511_driver = {
997 .i2c_driver = {
998 .driver = {
999 .name = "adv7511",
1000 .of_match_table = adv7511_of_ids,
1001 },
1002 .id_table = adv7511_i2c_ids,
1003 .probe = adv7511_probe,
1004 .remove = adv7511_remove,
1005 },
1006
1007 .encoder_init = adv7511_encoder_init,
1008};
1009
1010static int __init adv7511_init(void)
1011{
1012 return drm_i2c_encoder_register(THIS_MODULE, &adv7511_driver);
1013}
1014module_init(adv7511_init);
1015
1016static void __exit adv7511_exit(void)
1017{
1018 drm_i2c_encoder_unregister(&adv7511_driver);
1019}
1020module_exit(adv7511_exit);
1021
1022MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1023MODULE_DESCRIPTION("ADV7511 HDMI transmitter driver");
1024MODULE_LICENSE("GPL");