blob: 36c18b73c1f4631f3882ba492dbeb1f99e9b7242 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/kernel/setup.c
3 *
4 * Copyright (C) 1995-2001 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
Paul Gortmakerecea4ab2011-07-22 10:58:34 -040010#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/kernel.h>
12#include <linux/stddef.h>
13#include <linux/ioport.h>
14#include <linux/delay.h>
15#include <linux/utsname.h>
16#include <linux/initrd.h>
17#include <linux/console.h>
18#include <linux/bootmem.h>
19#include <linux/seq_file.h>
Jon Smirl894673e2006-07-10 04:44:13 -070020#include <linux/screen_info.h>
Will Deaconaf4dda72014-08-27 17:51:16 +010021#include <linux/of_iommu.h>
Arnd Bergmann883a1062013-01-31 17:51:18 +000022#include <linux/of_platform.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <linux/init.h>
Mika Westerberg3c57fb42010-05-10 09:20:22 +010024#include <linux/kexec.h>
Grant Likely93c02ab2011-04-28 14:27:21 -060025#include <linux/of_fdt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/cpu.h>
27#include <linux/interrupt.h>
Russell King7bbb7942006-02-16 11:08:09 +000028#include <linux/smp.h>
Russell Kinge119bff2010-01-10 17:23:29 +000029#include <linux/proc_fs.h>
Russell King2778f622010-07-09 16:27:52 +010030#include <linux/memblock.h>
Dave Martin2ecccf92011-08-19 17:58:35 +010031#include <linux/bug.h>
32#include <linux/compiler.h>
Nicolas Pitre27a3f0e2011-08-25 19:10:29 -040033#include <linux/sort.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
Catalin Marinasb86040a2009-07-24 12:32:54 +010035#include <asm/unified.h>
Russell King15d07dc2012-03-28 18:30:01 +010036#include <asm/cp15.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <asm/cpu.h>
Russell King0ba8b9b2008-08-10 18:08:10 +010038#include <asm/cputype.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <asm/elf.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <asm/procinfo.h>
Stefano Stabellini05774082013-05-21 14:24:11 +000041#include <asm/psci.h>
Russell King37efe642008-12-01 11:53:07 +000042#include <asm/sections.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <asm/setup.h>
Russell Kingf00ec482010-09-04 10:47:48 +010044#include <asm/smp_plat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <asm/mach-types.h>
46#include <asm/cacheflush.h>
Russell King46097c72008-08-10 18:10:19 +010047#include <asm/cachetype.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048#include <asm/tlbflush.h>
Stefano Stabellini5882bfe2015-05-06 14:13:31 +000049#include <asm/xen/hypervisor.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
Grant Likely93c02ab2011-04-28 14:27:21 -060051#include <asm/prom.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070052#include <asm/mach/arch.h>
53#include <asm/mach/irq.h>
54#include <asm/mach/time.h>
David Howells9f97da72012-03-28 18:30:01 +010055#include <asm/system_info.h>
56#include <asm/system_misc.h>
Jason Wessel5cbad0e2008-02-20 13:33:40 -060057#include <asm/traps.h>
Catalin Marinasbff595c2009-02-16 11:41:36 +010058#include <asm/unwind.h>
Tejun Heo1c16d242011-12-08 10:22:06 -080059#include <asm/memblock.h>
Dave Martin4588c342012-02-17 16:54:28 +000060#include <asm/virt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
Richard Purdie4cd9d6f2008-01-02 00:56:46 +010062#include "atags.h"
Ben Dooks0fc1c832006-03-15 23:17:30 +000063
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
65#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
66char fpe_type[8];
67
68static int __init fpe_setup(char *line)
69{
70 memcpy(fpe_type, line, 8);
71 return 1;
72}
73
74__setup("fpe=", fpe_setup);
75#endif
76
Russell Kingca8f0b02014-05-27 20:34:28 +010077extern void init_default_cache_policy(unsigned long);
Russell Kingff69a4c2013-07-26 14:55:59 +010078extern void paging_init(const struct machine_desc *desc);
Russell King1221ed12015-04-04 17:25:20 +010079extern void early_paging_init(const struct machine_desc *);
Russell King0371d3f2011-07-05 19:58:29 +010080extern void sanity_check_meminfo(void);
Robin Holt16d6d5b2013-07-08 16:01:39 -070081extern enum reboot_mode reboot_mode;
Russell Kingff69a4c2013-07-26 14:55:59 +010082extern void setup_dma_zone(const struct machine_desc *desc);
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
84unsigned int processor_id;
Krzysztof Halasac18f6582007-12-18 03:53:27 +010085EXPORT_SYMBOL(processor_id);
Russell King0385ebc2010-12-04 17:45:55 +000086unsigned int __machine_arch_type __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -070087EXPORT_SYMBOL(__machine_arch_type);
Russell King0385ebc2010-12-04 17:45:55 +000088unsigned int cacheid __read_mostly;
Russell Kingc0e95872008-09-25 15:35:28 +010089EXPORT_SYMBOL(cacheid);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
Bill Gatliff9d20fdd2007-05-31 22:02:22 +010091unsigned int __atags_pointer __initdata;
92
Linus Torvalds1da177e2005-04-16 15:20:36 -070093unsigned int system_rev;
94EXPORT_SYMBOL(system_rev);
95
Paul Kocialkowski3f599872015-05-06 15:23:56 +010096const char *system_serial;
97EXPORT_SYMBOL(system_serial);
98
Linus Torvalds1da177e2005-04-16 15:20:36 -070099unsigned int system_serial_low;
100EXPORT_SYMBOL(system_serial_low);
101
102unsigned int system_serial_high;
103EXPORT_SYMBOL(system_serial_high);
104
Russell King0385ebc2010-12-04 17:45:55 +0000105unsigned int elf_hwcap __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106EXPORT_SYMBOL(elf_hwcap);
107
Ard Biesheuvelb342ea42014-02-19 22:28:40 +0100108unsigned int elf_hwcap2 __read_mostly;
109EXPORT_SYMBOL(elf_hwcap2);
110
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
112#ifdef MULTI_CPU
Russell King0385ebc2010-12-04 17:45:55 +0000113struct processor processor __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114#endif
115#ifdef MULTI_TLB
Russell King0385ebc2010-12-04 17:45:55 +0000116struct cpu_tlb_fns cpu_tlb __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117#endif
118#ifdef MULTI_USER
Russell King0385ebc2010-12-04 17:45:55 +0000119struct cpu_user_fns cpu_user __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120#endif
121#ifdef MULTI_CACHE
Russell King0385ebc2010-12-04 17:45:55 +0000122struct cpu_cache_fns cpu_cache __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123#endif
Catalin Marinas953233d2007-02-05 14:48:08 +0100124#ifdef CONFIG_OUTER_CACHE
Russell King0385ebc2010-12-04 17:45:55 +0000125struct outer_cache_fns outer_cache __read_mostly;
Santosh Shilimkar6c09f092010-02-16 07:57:43 +0100126EXPORT_SYMBOL(outer_cache);
Catalin Marinas953233d2007-02-05 14:48:08 +0100127#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128
Dave Martin2ecccf92011-08-19 17:58:35 +0100129/*
130 * Cached cpu_architecture() result for use by assembler code.
131 * C code should use the cpu_architecture() function instead of accessing this
132 * variable directly.
133 */
134int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
135
Russell Kingccea7a12005-05-31 22:22:32 +0100136struct stack {
137 u32 irq[3];
138 u32 abt[3];
139 u32 und[3];
Daniel Thompsonc0e7f7e2014-09-17 17:12:06 +0100140 u32 fiq[3];
Russell Kingccea7a12005-05-31 22:22:32 +0100141} ____cacheline_aligned;
142
Catalin Marinas55bdd692010-05-21 18:06:41 +0100143#ifndef CONFIG_CPU_V7M
Russell Kingccea7a12005-05-31 22:22:32 +0100144static struct stack stacks[NR_CPUS];
Catalin Marinas55bdd692010-05-21 18:06:41 +0100145#endif
Russell Kingccea7a12005-05-31 22:22:32 +0100146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147char elf_platform[ELF_PLATFORM_SIZE];
148EXPORT_SYMBOL(elf_platform);
149
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150static const char *cpu_name;
151static const char *machine_name;
Jeremy Kerr48ab7e02010-01-27 01:13:31 +0100152static char __initdata cmd_line[COMMAND_LINE_SIZE];
Russell Kingff69a4c2013-07-26 14:55:59 +0100153const struct machine_desc *machine_desc __initdata;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
156#define ENDIANNESS ((char)endian_test.l)
157
158DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
159
160/*
161 * Standard memory resources
162 */
163static struct resource mem_res[] = {
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700164 {
165 .name = "Video RAM",
166 .start = 0,
167 .end = 0,
168 .flags = IORESOURCE_MEM
169 },
170 {
Kees Cooka36d8e52012-01-18 01:57:21 +0100171 .name = "Kernel code",
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700172 .start = 0,
173 .end = 0,
174 .flags = IORESOURCE_MEM
175 },
176 {
177 .name = "Kernel data",
178 .start = 0,
179 .end = 0,
180 .flags = IORESOURCE_MEM
181 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182};
183
184#define video_ram mem_res[0]
185#define kernel_code mem_res[1]
186#define kernel_data mem_res[2]
187
188static struct resource io_res[] = {
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700189 {
190 .name = "reserved",
191 .start = 0x3bc,
192 .end = 0x3be,
193 .flags = IORESOURCE_IO | IORESOURCE_BUSY
194 },
195 {
196 .name = "reserved",
197 .start = 0x378,
198 .end = 0x37f,
199 .flags = IORESOURCE_IO | IORESOURCE_BUSY
200 },
201 {
202 .name = "reserved",
203 .start = 0x278,
204 .end = 0x27f,
205 .flags = IORESOURCE_IO | IORESOURCE_BUSY
206 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207};
208
209#define lp0 io_res[0]
210#define lp1 io_res[1]
211#define lp2 io_res[2]
212
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213static const char *proc_arch[] = {
214 "undefined/unknown",
215 "3",
216 "4",
217 "4T",
218 "5",
219 "5T",
220 "5TE",
221 "5TEJ",
222 "6TEJ",
Catalin Marinas6b090a22006-01-12 16:28:16 +0000223 "7",
Catalin Marinas55bdd692010-05-21 18:06:41 +0100224 "7M",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 "?(12)",
226 "?(13)",
227 "?(14)",
228 "?(15)",
229 "?(16)",
230 "?(17)",
231};
232
Catalin Marinas55bdd692010-05-21 18:06:41 +0100233#ifdef CONFIG_CPU_V7M
234static int __get_cpu_architecture(void)
235{
236 return CPU_ARCH_ARMv7M;
237}
238#else
Dave Martin2ecccf92011-08-19 17:58:35 +0100239static int __get_cpu_architecture(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240{
241 int cpu_arch;
242
Russell King0ba8b9b2008-08-10 18:08:10 +0100243 if ((read_cpuid_id() & 0x0008f000) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 cpu_arch = CPU_ARCH_UNKNOWN;
Russell King0ba8b9b2008-08-10 18:08:10 +0100245 } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
246 cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
247 } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
248 cpu_arch = (read_cpuid_id() >> 16) & 7;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249 if (cpu_arch)
250 cpu_arch += CPU_ARCH_ARMv3;
Russell King0ba8b9b2008-08-10 18:08:10 +0100251 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
Catalin Marinas180005c2007-09-25 16:49:45 +0100252 /* Revised CPUID format. Read the Memory Model Feature
253 * Register 0 and check for VMSAv7 or PMSAv7 */
Mason526299c2015-03-17 21:37:25 +0100254 unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);
Catalin Marinas315cfe72011-02-15 18:06:57 +0100255 if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
256 (mmfr0 & 0x000000f0) >= 0x00000030)
Catalin Marinas180005c2007-09-25 16:49:45 +0100257 cpu_arch = CPU_ARCH_ARMv7;
258 else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
259 (mmfr0 & 0x000000f0) == 0x00000020)
260 cpu_arch = CPU_ARCH_ARMv6;
261 else
262 cpu_arch = CPU_ARCH_UNKNOWN;
263 } else
264 cpu_arch = CPU_ARCH_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265
266 return cpu_arch;
267}
Catalin Marinas55bdd692010-05-21 18:06:41 +0100268#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269
Dave Martin2ecccf92011-08-19 17:58:35 +0100270int __pure cpu_architecture(void)
271{
272 BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
273
274 return __cpu_architecture;
275}
276
Will Deacon8925ec42010-09-13 16:18:30 +0100277static int cpu_has_aliasing_icache(unsigned int arch)
278{
279 int aliasing_icache;
280 unsigned int id_reg, num_sets, line_size;
281
Will Deacon7f94e9c2011-08-23 22:22:11 +0100282 /* PIPT caches never alias. */
283 if (icache_is_pipt())
284 return 0;
285
Will Deacon8925ec42010-09-13 16:18:30 +0100286 /* arch specifies the register format */
287 switch (arch) {
288 case CPU_ARCH_ARMv7:
Linus Walleij5fb31a92010-10-06 11:07:28 +0100289 asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
290 : /* No output operands */
Will Deacon8925ec42010-09-13 16:18:30 +0100291 : "r" (1));
Linus Walleij5fb31a92010-10-06 11:07:28 +0100292 isb();
293 asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
294 : "=r" (id_reg));
Will Deacon8925ec42010-09-13 16:18:30 +0100295 line_size = 4 << ((id_reg & 0x7) + 2);
296 num_sets = ((id_reg >> 13) & 0x7fff) + 1;
297 aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
298 break;
299 case CPU_ARCH_ARMv6:
300 aliasing_icache = read_cpuid_cachetype() & (1 << 11);
301 break;
302 default:
303 /* I-cache aliases will be handled by D-cache aliasing code */
304 aliasing_icache = 0;
305 }
306
307 return aliasing_icache;
308}
309
Russell Kingc0e95872008-09-25 15:35:28 +0100310static void __init cacheid_init(void)
311{
Russell Kingc0e95872008-09-25 15:35:28 +0100312 unsigned int arch = cpu_architecture();
313
Catalin Marinas55bdd692010-05-21 18:06:41 +0100314 if (arch == CPU_ARCH_ARMv7M) {
315 cacheid = 0;
316 } else if (arch >= CPU_ARCH_ARMv6) {
Uwe Kleine-Königac52e832013-01-30 17:38:21 +0100317 unsigned int cachetype = read_cpuid_cachetype();
Catalin Marinasb57ee992009-03-03 11:44:12 +0100318 if ((cachetype & (7 << 29)) == 4 << 29) {
319 /* ARMv7 register format */
Will Deacon72dc53a2011-08-03 12:37:04 +0100320 arch = CPU_ARCH_ARMv7;
Catalin Marinasb57ee992009-03-03 11:44:12 +0100321 cacheid = CACHEID_VIPT_NONALIASING;
Will Deacon7f94e9c2011-08-23 22:22:11 +0100322 switch (cachetype & (3 << 14)) {
323 case (1 << 14):
Catalin Marinasb57ee992009-03-03 11:44:12 +0100324 cacheid |= CACHEID_ASID_TAGGED;
Will Deacon7f94e9c2011-08-23 22:22:11 +0100325 break;
326 case (3 << 14):
327 cacheid |= CACHEID_PIPT;
328 break;
329 }
Will Deacon8925ec42010-09-13 16:18:30 +0100330 } else {
Will Deacon72dc53a2011-08-03 12:37:04 +0100331 arch = CPU_ARCH_ARMv6;
332 if (cachetype & (1 << 23))
333 cacheid = CACHEID_VIPT_ALIASING;
334 else
335 cacheid = CACHEID_VIPT_NONALIASING;
Will Deacon8925ec42010-09-13 16:18:30 +0100336 }
Will Deacon72dc53a2011-08-03 12:37:04 +0100337 if (cpu_has_aliasing_icache(arch))
338 cacheid |= CACHEID_VIPT_I_ALIASING;
Russell Kingc0e95872008-09-25 15:35:28 +0100339 } else {
340 cacheid = CACHEID_VIVT;
341 }
Russell King2b4ae1f2008-09-25 15:39:20 +0100342
Olof Johansson1b0f6682013-12-05 18:29:35 +0100343 pr_info("CPU: %s data cache, %s instruction cache\n",
Russell King2b4ae1f2008-09-25 15:39:20 +0100344 cache_is_vivt() ? "VIVT" :
345 cache_is_vipt_aliasing() ? "VIPT aliasing" :
Will Deacon7f94e9c2011-08-23 22:22:11 +0100346 cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
Russell King2b4ae1f2008-09-25 15:39:20 +0100347 cache_is_vivt() ? "VIVT" :
348 icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
Will Deacon8925ec42010-09-13 16:18:30 +0100349 icache_is_vipt_aliasing() ? "VIPT aliasing" :
Will Deacon7f94e9c2011-08-23 22:22:11 +0100350 icache_is_pipt() ? "PIPT" :
Russell King2b4ae1f2008-09-25 15:39:20 +0100351 cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
Russell Kingc0e95872008-09-25 15:35:28 +0100352}
353
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354/*
355 * These functions re-use the assembly code in head.S, which
356 * already provide the required functionality.
357 */
Russell King0f44ba12006-02-24 21:04:56 +0000358extern struct proc_info_list *lookup_processor_type(unsigned int);
Russell King6fc31d52011-01-12 17:50:42 +0000359
Grant Likely93c02ab2011-04-28 14:27:21 -0600360void __init early_print(const char *str, ...)
Russell King6fc31d52011-01-12 17:50:42 +0000361{
362 extern void printascii(const char *);
363 char buf[256];
364 va_list ap;
365
366 va_start(ap, str);
367 vsnprintf(buf, sizeof(buf), str, ap);
368 va_end(ap);
369
370#ifdef CONFIG_DEBUG_LL
371 printascii(buf);
372#endif
373 printk("%s", buf);
374}
375
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100376static void __init cpuid_init_hwcaps(void)
377{
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100378 int block;
Ard Biesheuvela092aed2015-03-19 19:04:05 +0100379 u32 isar5;
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100380
381 if (cpu_architecture() < CPU_ARCH_ARMv7)
382 return;
383
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100384 block = cpuid_feature_extract(CPUID_EXT_ISAR0, 24);
385 if (block >= 2)
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100386 elf_hwcap |= HWCAP_IDIVA;
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100387 if (block >= 1)
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100388 elf_hwcap |= HWCAP_IDIVT;
Will Deacona469abd2013-04-08 17:13:12 +0100389
390 /* LPAE implies atomic ldrd/strd instructions */
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100391 block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0);
392 if (block >= 5)
Will Deacona469abd2013-04-08 17:13:12 +0100393 elf_hwcap |= HWCAP_LPAE;
Ard Biesheuvela092aed2015-03-19 19:04:05 +0100394
395 /* check for supported v8 Crypto instructions */
396 isar5 = read_cpuid_ext(CPUID_EXT_ISAR5);
397
398 block = cpuid_feature_extract_field(isar5, 4);
399 if (block >= 2)
400 elf_hwcap2 |= HWCAP2_PMULL;
401 if (block >= 1)
402 elf_hwcap2 |= HWCAP2_AES;
403
404 block = cpuid_feature_extract_field(isar5, 8);
405 if (block >= 1)
406 elf_hwcap2 |= HWCAP2_SHA1;
407
408 block = cpuid_feature_extract_field(isar5, 12);
409 if (block >= 1)
410 elf_hwcap2 |= HWCAP2_SHA2;
411
412 block = cpuid_feature_extract_field(isar5, 16);
413 if (block >= 1)
414 elf_hwcap2 |= HWCAP2_CRC32;
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100415}
416
Russell King58171bf2014-07-04 16:41:21 +0100417static void __init elf_hwcap_fixup(void)
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100418{
Russell King58171bf2014-07-04 16:41:21 +0100419 unsigned id = read_cpuid_id();
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100420
421 /*
422 * HWCAP_TLS is available only on 1136 r1p0 and later,
423 * see also kuser_get_tls_init.
424 */
Russell King58171bf2014-07-04 16:41:21 +0100425 if (read_cpuid_part() == ARM_CPU_PART_ARM1136 &&
426 ((id >> 20) & 3) == 0) {
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100427 elf_hwcap &= ~HWCAP_TLS;
Russell King58171bf2014-07-04 16:41:21 +0100428 return;
429 }
430
431 /* Verify if CPUID scheme is implemented */
432 if ((id & 0x000f0000) != 0x000f0000)
433 return;
434
435 /*
436 * If the CPU supports LDREX/STREX and LDREXB/STREXB,
437 * avoid advertising SWP; it may not be atomic with
438 * multiprocessing cores.
439 */
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100440 if (cpuid_feature_extract(CPUID_EXT_ISAR3, 12) > 1 ||
441 (cpuid_feature_extract(CPUID_EXT_ISAR3, 12) == 1 &&
442 cpuid_feature_extract(CPUID_EXT_ISAR3, 20) >= 3))
Russell King58171bf2014-07-04 16:41:21 +0100443 elf_hwcap &= ~HWCAP_SWP;
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100444}
445
Russell Kingb69874e2011-06-21 18:57:31 +0100446/*
447 * cpu_init - initialise one CPU.
448 *
449 * cpu_init sets up the per-CPU stacks.
450 */
Jon Medhurst1783d452013-04-25 14:40:22 +0100451void notrace cpu_init(void)
Russell Kingb69874e2011-06-21 18:57:31 +0100452{
Catalin Marinas55bdd692010-05-21 18:06:41 +0100453#ifndef CONFIG_CPU_V7M
Russell Kingb69874e2011-06-21 18:57:31 +0100454 unsigned int cpu = smp_processor_id();
455 struct stack *stk = &stacks[cpu];
456
457 if (cpu >= NR_CPUS) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100458 pr_crit("CPU%u: bad primary CPU number\n", cpu);
Russell Kingb69874e2011-06-21 18:57:31 +0100459 BUG();
460 }
461
Rob Herring14318efb2012-11-29 20:39:54 +0100462 /*
463 * This only works on resume and secondary cores. For booting on the
464 * boot cpu, smp_prepare_boot_cpu is called after percpu area setup.
465 */
466 set_my_cpu_offset(per_cpu_offset(cpu));
467
Russell Kingb69874e2011-06-21 18:57:31 +0100468 cpu_proc_init();
469
470 /*
471 * Define the placement constraint for the inline asm directive below.
472 * In Thumb-2, msr with an immediate value is not allowed.
473 */
474#ifdef CONFIG_THUMB2_KERNEL
475#define PLC "r"
476#else
477#define PLC "I"
478#endif
479
480 /*
481 * setup stacks for re-entrant exception handlers
482 */
483 __asm__ (
484 "msr cpsr_c, %1\n\t"
485 "add r14, %0, %2\n\t"
486 "mov sp, r14\n\t"
487 "msr cpsr_c, %3\n\t"
488 "add r14, %0, %4\n\t"
489 "mov sp, r14\n\t"
490 "msr cpsr_c, %5\n\t"
491 "add r14, %0, %6\n\t"
492 "mov sp, r14\n\t"
Daniel Thompsonc0e7f7e2014-09-17 17:12:06 +0100493 "msr cpsr_c, %7\n\t"
494 "add r14, %0, %8\n\t"
495 "mov sp, r14\n\t"
496 "msr cpsr_c, %9"
Russell Kingb69874e2011-06-21 18:57:31 +0100497 :
498 : "r" (stk),
499 PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
500 "I" (offsetof(struct stack, irq[0])),
501 PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
502 "I" (offsetof(struct stack, abt[0])),
503 PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
504 "I" (offsetof(struct stack, und[0])),
Daniel Thompsonc0e7f7e2014-09-17 17:12:06 +0100505 PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
506 "I" (offsetof(struct stack, fiq[0])),
Russell Kingb69874e2011-06-21 18:57:31 +0100507 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
508 : "r14");
Catalin Marinas55bdd692010-05-21 18:06:41 +0100509#endif
Russell Kingb69874e2011-06-21 18:57:31 +0100510}
511
Lorenzo Pieralisi18d7f152013-06-19 10:40:48 +0100512u32 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
Will Deaconeb504392012-01-20 12:01:12 +0100513
514void __init smp_setup_processor_id(void)
515{
516 int i;
Lorenzo Pieralisicb8cf4f2012-11-08 18:05:56 +0000517 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
518 u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
Will Deaconeb504392012-01-20 12:01:12 +0100519
520 cpu_logical_map(0) = cpu;
Lorenzo Pieralisicb8cf4f2012-11-08 18:05:56 +0000521 for (i = 1; i < nr_cpu_ids; ++i)
Will Deaconeb504392012-01-20 12:01:12 +0100522 cpu_logical_map(i) = i == cpu ? 0 : i;
523
Ming Lei9394c1c2013-03-11 13:52:12 +0100524 /*
525 * clear __my_cpu_offset on boot CPU to avoid hang caused by
526 * using percpu variable early, for example, lockdep will
527 * access percpu variable inside lock_release
528 */
529 set_my_cpu_offset(0);
530
Olof Johansson1b0f6682013-12-05 18:29:35 +0100531 pr_info("Booting Linux on physical CPU 0x%x\n", mpidr);
Will Deaconeb504392012-01-20 12:01:12 +0100532}
533
Lorenzo Pieralisi8cf72172013-05-16 10:32:09 +0100534struct mpidr_hash mpidr_hash;
535#ifdef CONFIG_SMP
536/**
537 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
538 * level in order to build a linear index from an
539 * MPIDR value. Resulting algorithm is a collision
540 * free hash carried out through shifting and ORing
541 */
542static void __init smp_build_mpidr_hash(void)
543{
544 u32 i, affinity;
545 u32 fs[3], bits[3], ls, mask = 0;
546 /*
547 * Pre-scan the list of MPIDRS and filter out bits that do
548 * not contribute to affinity levels, ie they never toggle.
549 */
550 for_each_possible_cpu(i)
551 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
552 pr_debug("mask of set bits 0x%x\n", mask);
553 /*
554 * Find and stash the last and first bit set at all affinity levels to
555 * check how many bits are required to represent them.
556 */
557 for (i = 0; i < 3; i++) {
558 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
559 /*
560 * Find the MSB bit and LSB bits position
561 * to determine how many bits are required
562 * to express the affinity level.
563 */
564 ls = fls(affinity);
565 fs[i] = affinity ? ffs(affinity) - 1 : 0;
566 bits[i] = ls - fs[i];
567 }
568 /*
569 * An index can be created from the MPIDR by isolating the
570 * significant bits at each affinity level and by shifting
571 * them in order to compress the 24 bits values space to a
572 * compressed set of values. This is equivalent to hashing
573 * the MPIDR through shifting and ORing. It is a collision free
574 * hash though not minimal since some levels might contain a number
575 * of CPUs that is not an exact power of 2 and their bit
576 * representation might contain holes, eg MPIDR[7:0] = {0x2, 0x80}.
577 */
578 mpidr_hash.shift_aff[0] = fs[0];
579 mpidr_hash.shift_aff[1] = MPIDR_LEVEL_BITS + fs[1] - bits[0];
580 mpidr_hash.shift_aff[2] = 2*MPIDR_LEVEL_BITS + fs[2] -
581 (bits[1] + bits[0]);
582 mpidr_hash.mask = mask;
583 mpidr_hash.bits = bits[2] + bits[1] + bits[0];
584 pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] mask[0x%x] bits[%u]\n",
585 mpidr_hash.shift_aff[0],
586 mpidr_hash.shift_aff[1],
587 mpidr_hash.shift_aff[2],
588 mpidr_hash.mask,
589 mpidr_hash.bits);
590 /*
591 * 4x is an arbitrary value used to warn on a hash table much bigger
592 * than expected on most systems.
593 */
594 if (mpidr_hash_size() > 4 * num_possible_cpus())
595 pr_warn("Large number of MPIDR hash buckets detected\n");
596 sync_cache_w(&mpidr_hash);
597}
598#endif
599
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600static void __init setup_processor(void)
601{
602 struct proc_info_list *list;
603
604 /*
605 * locate processor in the list of supported processor
606 * types. The linker builds this table for us from the
607 * entries in arch/arm/mm/proc-*.S
608 */
Russell King0ba8b9b2008-08-10 18:08:10 +0100609 list = lookup_processor_type(read_cpuid_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610 if (!list) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100611 pr_err("CPU configuration botched (ID %08x), unable to continue.\n",
612 read_cpuid_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613 while (1);
614 }
615
616 cpu_name = list->cpu_name;
Dave Martin2ecccf92011-08-19 17:58:35 +0100617 __cpu_architecture = __get_cpu_architecture();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618
619#ifdef MULTI_CPU
620 processor = *list->proc;
621#endif
622#ifdef MULTI_TLB
623 cpu_tlb = *list->tlb;
624#endif
625#ifdef MULTI_USER
626 cpu_user = *list->user;
627#endif
628#ifdef MULTI_CACHE
629 cpu_cache = *list->cache;
630#endif
631
Olof Johansson1b0f6682013-12-05 18:29:35 +0100632 pr_info("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
633 cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
Russell King4585eaf2014-04-13 18:47:34 +0100634 proc_arch[cpu_architecture()], get_cr());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635
Will Deacona34dbfb2011-11-11 11:35:58 +0100636 snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
637 list->arch_name, ENDIANNESS);
638 snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
639 list->elf_name, ENDIANNESS);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 elf_hwcap = list->elf_hwcap;
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100641
642 cpuid_init_hwcaps();
643
Catalin Marinasadeff422006-04-10 21:32:35 +0100644#ifndef CONFIG_ARM_THUMB
Stephen Boydc40e3642013-03-18 19:44:14 +0100645 elf_hwcap &= ~(HWCAP_THUMB | HWCAP_IDIVT);
Catalin Marinasadeff422006-04-10 21:32:35 +0100646#endif
Russell Kingca8f0b02014-05-27 20:34:28 +0100647#ifdef CONFIG_MMU
648 init_default_cache_policy(list->__cpu_mm_mmu_flags);
649#endif
Rob Herring92871b92013-10-09 17:26:44 +0100650 erratum_a15_798181_init();
651
Russell King58171bf2014-07-04 16:41:21 +0100652 elf_hwcap_fixup();
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100653
Russell Kingc0e95872008-09-25 15:35:28 +0100654 cacheid_init();
Russell Kingb69874e2011-06-21 18:57:31 +0100655 cpu_init();
Russell Kingccea7a12005-05-31 22:22:32 +0100656}
657
Grant Likely93c02ab2011-04-28 14:27:21 -0600658void __init dump_machine_table(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659{
Russell Kingff69a4c2013-07-26 14:55:59 +0100660 const struct machine_desc *p;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661
Grant Likely62913192011-04-28 14:27:21 -0600662 early_print("Available machine support:\n\nID (hex)\tNAME\n");
663 for_each_machine_desc(p)
Nicolas Pitredce72dd2011-02-21 07:00:32 +0100664 early_print("%08x\t%s\n", p->nr, p->name);
665
666 early_print("\nPlease check your kernel config and/or bootloader.\n");
667
668 while (true)
669 /* can't use cpu_relax() here as it may require MMU setup */;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670}
671
Magnus Damm6a5014a2013-10-22 17:53:16 +0100672int __init arm_add_memory(u64 start, u64 size)
Russell King3a669412005-06-22 21:43:10 +0100673{
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100674 u64 aligned_start;
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400675
Russell King3a669412005-06-22 21:43:10 +0100676 /*
677 * Ensure that start/size are aligned to a page boundary.
Masahiro Yamada909ba292015-01-20 04:38:25 +0100678 * Size is rounded down, start is rounded up.
Russell King3a669412005-06-22 21:43:10 +0100679 */
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100680 aligned_start = PAGE_ALIGN(start);
Masahiro Yamada909ba292015-01-20 04:38:25 +0100681 if (aligned_start > start + size)
682 size = 0;
683 else
684 size -= aligned_start - start;
Will Deacone5ab8582012-04-12 17:15:08 +0100685
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100686#ifndef CONFIG_ARCH_PHYS_ADDR_T_64BIT
687 if (aligned_start > ULONG_MAX) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100688 pr_crit("Ignoring memory at 0x%08llx outside 32-bit physical address space\n",
689 (long long)start);
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100690 return -EINVAL;
691 }
692
693 if (aligned_start + size > ULONG_MAX) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100694 pr_crit("Truncating memory at 0x%08llx to fit in 32-bit physical address space\n",
695 (long long)start);
Will Deacone5ab8582012-04-12 17:15:08 +0100696 /*
697 * To ensure bank->start + bank->size is representable in
698 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
699 * This means we lose a page after masking.
700 */
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100701 size = ULONG_MAX - aligned_start;
Will Deacone5ab8582012-04-12 17:15:08 +0100702 }
703#endif
704
Russell King571b1432014-01-11 11:22:18 +0000705 if (aligned_start < PHYS_OFFSET) {
706 if (aligned_start + size <= PHYS_OFFSET) {
707 pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n",
708 aligned_start, aligned_start + size);
709 return -EINVAL;
710 }
711
712 pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n",
713 aligned_start, (u64)PHYS_OFFSET);
714
715 size -= PHYS_OFFSET - aligned_start;
716 aligned_start = PHYS_OFFSET;
717 }
718
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100719 start = aligned_start;
720 size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400721
722 /*
723 * Check whether this memory region has non-zero size or
724 * invalid node number.
725 */
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100726 if (size == 0)
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400727 return -EINVAL;
728
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100729 memblock_add(start, size);
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400730 return 0;
Russell King3a669412005-06-22 21:43:10 +0100731}
732
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733/*
734 * Pick out the memory size. We look for mem=size@start,
735 * where start and size are "size[KkMm]"
736 */
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100737
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100738static int __init early_mem(char *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739{
740 static int usermem __initdata = 0;
Magnus Damm6a5014a2013-10-22 17:53:16 +0100741 u64 size;
742 u64 start;
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100743 char *endp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744
745 /*
746 * If the user specifies memory size, we
747 * blow away any automatically generated
748 * size.
749 */
750 if (usermem == 0) {
751 usermem = 1;
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100752 memblock_remove(memblock_start_of_DRAM(),
753 memblock_end_of_DRAM() - memblock_start_of_DRAM());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754 }
755
756 start = PHYS_OFFSET;
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100757 size = memparse(p, &endp);
758 if (*endp == '@')
759 start = memparse(endp + 1, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760
Andrew Morton1c97b732006-04-20 21:41:18 +0100761 arm_add_memory(start, size);
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100762
763 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764}
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100765early_param("mem", early_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700766
Russell Kingff69a4c2013-07-26 14:55:59 +0100767static void __init request_standard_resources(const struct machine_desc *mdesc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768{
Dima Zavin11b93692011-01-14 23:05:14 +0100769 struct memblock_region *region;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771
Russell King37efe642008-12-01 11:53:07 +0000772 kernel_code.start = virt_to_phys(_text);
773 kernel_code.end = virt_to_phys(_etext - 1);
Russell King842eab42010-10-01 14:12:22 +0100774 kernel_data.start = virt_to_phys(_sdata);
Russell King37efe642008-12-01 11:53:07 +0000775 kernel_data.end = virt_to_phys(_end - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776
Dima Zavin11b93692011-01-14 23:05:14 +0100777 for_each_memblock(memory, region) {
Santosh Shilimkarca474402014-02-06 19:50:35 +0100778 res = memblock_virt_alloc(sizeof(*res), 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 res->name = "System RAM";
Dima Zavin11b93692011-01-14 23:05:14 +0100780 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
781 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
783
784 request_resource(&iomem_resource, res);
785
786 if (kernel_code.start >= res->start &&
787 kernel_code.end <= res->end)
788 request_resource(res, &kernel_code);
789 if (kernel_data.start >= res->start &&
790 kernel_data.end <= res->end)
791 request_resource(res, &kernel_data);
792 }
793
794 if (mdesc->video_start) {
795 video_ram.start = mdesc->video_start;
796 video_ram.end = mdesc->video_end;
797 request_resource(&iomem_resource, &video_ram);
798 }
799
800 /*
801 * Some machines don't have the possibility of ever
802 * possessing lp0, lp1 or lp2
803 */
804 if (mdesc->reserve_lp0)
805 request_resource(&ioport_resource, &lp0);
806 if (mdesc->reserve_lp1)
807 request_resource(&ioport_resource, &lp1);
808 if (mdesc->reserve_lp2)
809 request_resource(&ioport_resource, &lp2);
810}
811
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
813struct screen_info screen_info = {
814 .orig_video_lines = 30,
815 .orig_video_cols = 80,
816 .orig_video_mode = 0,
817 .orig_video_ega_bx = 0,
818 .orig_video_isVGA = 1,
819 .orig_video_points = 8
820};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821#endif
822
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823static int __init customize_machine(void)
824{
Arnd Bergmann883a1062013-01-31 17:51:18 +0000825 /*
826 * customizes platform devices, or adds new ones
827 * On DT based machines, we fall back to populating the
828 * machine from the device tree, if no callback is provided,
829 * otherwise we would always need an init_machine callback.
830 */
Will Deaconaf4dda72014-08-27 17:51:16 +0100831 of_iommu_init();
Russell King8ff14432010-12-20 10:18:36 +0000832 if (machine_desc->init_machine)
833 machine_desc->init_machine();
Arnd Bergmann883a1062013-01-31 17:51:18 +0000834#ifdef CONFIG_OF
835 else
836 of_platform_populate(NULL, of_default_bus_match_table,
837 NULL, NULL);
838#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839 return 0;
840}
841arch_initcall(customize_machine);
842
Shawn Guo90de4132012-04-25 22:24:44 +0800843static int __init init_machine_late(void)
844{
Paul Kocialkowski3f599872015-05-06 15:23:56 +0100845 struct device_node *root;
846 int ret;
847
Shawn Guo90de4132012-04-25 22:24:44 +0800848 if (machine_desc->init_late)
849 machine_desc->init_late();
Paul Kocialkowski3f599872015-05-06 15:23:56 +0100850
851 root = of_find_node_by_path("/");
852 if (root) {
853 ret = of_property_read_string(root, "serial-number",
854 &system_serial);
855 if (ret)
856 system_serial = NULL;
857 }
858
859 if (!system_serial)
860 system_serial = kasprintf(GFP_KERNEL, "%08x%08x",
861 system_serial_high,
862 system_serial_low);
863
Shawn Guo90de4132012-04-25 22:24:44 +0800864 return 0;
865}
866late_initcall(init_machine_late);
867
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100868#ifdef CONFIG_KEXEC
869static inline unsigned long long get_total_mem(void)
870{
871 unsigned long total;
872
873 total = max_low_pfn - min_low_pfn;
874 return total << PAGE_SHIFT;
875}
876
877/**
878 * reserve_crashkernel() - reserves memory are for crash kernel
879 *
880 * This function reserves memory area given in "crashkernel=" kernel command
881 * line parameter. The memory reserved is used by a dump capture kernel when
882 * primary kernel is crashing.
883 */
884static void __init reserve_crashkernel(void)
885{
886 unsigned long long crash_size, crash_base;
887 unsigned long long total_mem;
888 int ret;
889
890 total_mem = get_total_mem();
891 ret = parse_crashkernel(boot_command_line, total_mem,
892 &crash_size, &crash_base);
893 if (ret)
894 return;
895
Santosh Shilimkar84f452b2013-06-30 00:28:46 -0400896 ret = memblock_reserve(crash_base, crash_size);
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100897 if (ret < 0) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100898 pr_warn("crashkernel reservation failed - memory is in use (0x%lx)\n",
899 (unsigned long)crash_base);
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100900 return;
901 }
902
Olof Johansson1b0f6682013-12-05 18:29:35 +0100903 pr_info("Reserving %ldMB of memory at %ldMB for crashkernel (System RAM: %ldMB)\n",
904 (unsigned long)(crash_size >> 20),
905 (unsigned long)(crash_base >> 20),
906 (unsigned long)(total_mem >> 20));
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100907
908 crashk_res.start = crash_base;
909 crashk_res.end = crash_base + crash_size - 1;
910 insert_resource(&iomem_resource, &crashk_res);
911}
912#else
913static inline void reserve_crashkernel(void) {}
914#endif /* CONFIG_KEXEC */
915
Dave Martin4588c342012-02-17 16:54:28 +0000916void __init hyp_mode_check(void)
917{
918#ifdef CONFIG_ARM_VIRT_EXT
Mark Rutland8fbac212013-07-18 17:20:33 +0100919 sync_boot_mode();
920
Dave Martin4588c342012-02-17 16:54:28 +0000921 if (is_hyp_mode_available()) {
922 pr_info("CPU: All CPU(s) started in HYP mode.\n");
923 pr_info("CPU: Virtualization extensions available.\n");
924 } else if (is_hyp_mode_mismatched()) {
925 pr_warn("CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x%x)\n",
926 __boot_cpu_mode & MODE_MASK);
927 pr_warn("CPU: This may indicate a broken bootloader or firmware.\n");
928 } else
929 pr_info("CPU: All CPU(s) started in SVC mode.\n");
930#endif
931}
932
Grant Likely62913192011-04-28 14:27:21 -0600933void __init setup_arch(char **cmdline_p)
934{
Russell Kingff69a4c2013-07-26 14:55:59 +0100935 const struct machine_desc *mdesc;
Grant Likely62913192011-04-28 14:27:21 -0600936
Grant Likely62913192011-04-28 14:27:21 -0600937 setup_processor();
Grant Likely93c02ab2011-04-28 14:27:21 -0600938 mdesc = setup_machine_fdt(__atags_pointer);
939 if (!mdesc)
Alexander Shiyanb8b499c2012-12-12 08:32:11 +0100940 mdesc = setup_machine_tags(__atags_pointer, __machine_arch_type);
Grant Likely62913192011-04-28 14:27:21 -0600941 machine_desc = mdesc;
942 machine_name = mdesc->name;
Russell King719c9d12014-10-28 12:40:26 +0000943 dump_stack_set_arch_desc("%s", mdesc->name);
Grant Likely62913192011-04-28 14:27:21 -0600944
Robin Holt16d6d5b2013-07-08 16:01:39 -0700945 if (mdesc->reboot_mode != REBOOT_HARD)
946 reboot_mode = mdesc->reboot_mode;
Grant Likely62913192011-04-28 14:27:21 -0600947
Russell King37efe642008-12-01 11:53:07 +0000948 init_mm.start_code = (unsigned long) _text;
949 init_mm.end_code = (unsigned long) _etext;
950 init_mm.end_data = (unsigned long) _edata;
951 init_mm.brk = (unsigned long) _end;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952
Jeremy Kerr48ab7e02010-01-27 01:13:31 +0100953 /* populate cmd_line too for later use, preserving boot_command_line */
954 strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
955 *cmdline_p = cmd_line;
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100956
957 parse_early_param();
958
Russell King1221ed12015-04-04 17:25:20 +0100959#ifdef CONFIG_MMU
960 early_paging_init(mdesc);
961#endif
Santosh Shilimkar7c927322013-12-02 20:29:59 +0100962 setup_dma_zone(mdesc);
Russell King0371d3f2011-07-05 19:58:29 +0100963 sanity_check_meminfo();
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100964 arm_memblock_init(mdesc);
Russell King2778f622010-07-09 16:27:52 +0100965
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400966 paging_init(mdesc);
Dima Zavin11b93692011-01-14 23:05:14 +0100967 request_standard_resources(mdesc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968
Russell Kinga5287212011-11-04 15:05:24 +0000969 if (mdesc->restart)
970 arm_pm_restart = mdesc->restart;
971
Grant Likely93c02ab2011-04-28 14:27:21 -0600972 unflatten_device_tree();
973
Lorenzo Pieralisi55871642011-12-14 16:01:24 +0000974 arm_dt_init_cpu_maps();
Stefano Stabellini05774082013-05-21 14:24:11 +0000975 psci_init();
Stefano Stabellini5882bfe2015-05-06 14:13:31 +0000976 xen_early_init();
Russell King7bbb7942006-02-16 11:08:09 +0000977#ifdef CONFIG_SMP
Marc Zyngierabcee5f2011-09-08 09:06:10 +0100978 if (is_smp()) {
Jon Medhurstb382b942013-05-21 13:40:51 +0000979 if (!mdesc->smp_init || !mdesc->smp_init()) {
980 if (psci_smp_available())
981 smp_set_ops(&psci_smp_ops);
982 else if (mdesc->smp)
983 smp_set_ops(mdesc->smp);
984 }
Russell Kingf00ec482010-09-04 10:47:48 +0100985 smp_init_cpus();
Lorenzo Pieralisi8cf72172013-05-16 10:32:09 +0100986 smp_build_mpidr_hash();
Marc Zyngierabcee5f2011-09-08 09:06:10 +0100987 }
Russell King7bbb7942006-02-16 11:08:09 +0000988#endif
Dave Martin4588c342012-02-17 16:54:28 +0000989
990 if (!is_smp())
991 hyp_mode_check();
992
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100993 reserve_crashkernel();
Russell King7bbb7942006-02-16 11:08:09 +0000994
eric miao52108642010-12-13 09:42:34 +0100995#ifdef CONFIG_MULTI_IRQ_HANDLER
996 handle_arch_irq = mdesc->handle_irq;
997#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998
999#ifdef CONFIG_VT
1000#if defined(CONFIG_VGA_CONSOLE)
1001 conswitchp = &vga_con;
1002#elif defined(CONFIG_DUMMY_CONSOLE)
1003 conswitchp = &dummy_con;
1004#endif
1005#endif
Russell Kingdec12e62010-12-16 13:49:34 +00001006
1007 if (mdesc->init_early)
1008 mdesc->init_early();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009}
1010
1011
1012static int __init topology_init(void)
1013{
1014 int cpu;
1015
Russell King66fb8bd2007-03-13 09:54:21 +00001016 for_each_possible_cpu(cpu) {
1017 struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
1018 cpuinfo->cpu.hotpluggable = 1;
1019 register_cpu(&cpuinfo->cpu, cpu);
1020 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021
1022 return 0;
1023}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001024subsys_initcall(topology_init);
1025
Russell Kinge119bff2010-01-10 17:23:29 +00001026#ifdef CONFIG_HAVE_PROC_CPU
1027static int __init proc_cpu_init(void)
1028{
1029 struct proc_dir_entry *res;
1030
1031 res = proc_mkdir("cpu", NULL);
1032 if (!res)
1033 return -ENOMEM;
1034 return 0;
1035}
1036fs_initcall(proc_cpu_init);
1037#endif
1038
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039static const char *hwcap_str[] = {
1040 "swp",
1041 "half",
1042 "thumb",
1043 "26bit",
1044 "fastmult",
1045 "fpa",
1046 "vfp",
1047 "edsp",
1048 "java",
Paul Gortmaker8f7f9432006-10-27 05:13:19 +01001049 "iwmmxt",
Lennert Buytenhek99e4a6d2006-12-18 00:59:10 +01001050 "crunch",
Catalin Marinas4369ae12008-11-06 13:23:06 +00001051 "thumbee",
Catalin Marinas2bedbdf2008-11-06 13:23:07 +00001052 "neon",
Catalin Marinas7279dc32009-02-11 13:13:56 +01001053 "vfpv3",
1054 "vfpv3d16",
Will Deacon254cdf82011-06-03 14:15:22 +01001055 "tls",
1056 "vfpv4",
1057 "idiva",
1058 "idivt",
Tetsuyuki Kobayashiab8d46c02013-07-22 14:58:17 +01001059 "vfpd32",
Will Deacona469abd2013-04-08 17:13:12 +01001060 "lpae",
Sudeep KarkadaNageshae9faebc2013-08-13 14:30:32 +01001061 "evtstrm",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001062 NULL
1063};
1064
Ard Biesheuvelb342ea42014-02-19 22:28:40 +01001065static const char *hwcap2_str[] = {
Ard Biesheuvel8258a982014-02-19 22:29:40 +01001066 "aes",
1067 "pmull",
1068 "sha1",
1069 "sha2",
1070 "crc32",
Ard Biesheuvelb342ea42014-02-19 22:28:40 +01001071 NULL
1072};
1073
Linus Torvalds1da177e2005-04-16 15:20:36 -07001074static int c_show(struct seq_file *m, void *v)
1075{
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001076 int i, j;
1077 u32 cpuid;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001078
Linus Torvalds1da177e2005-04-16 15:20:36 -07001079 for_each_online_cpu(i) {
Russell King15559722005-11-06 21:41:08 +00001080 /*
1081 * glibc reads /proc/cpuinfo to determine the number of
1082 * online processors, looking for lines beginning with
1083 * "processor". Give glibc what it expects.
1084 */
1085 seq_printf(m, "processor\t: %d\n", i);
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001086 cpuid = is_smp() ? per_cpu(cpu_data, i).cpuid : read_cpuid_id();
1087 seq_printf(m, "model name\t: %s rev %d (%s)\n",
1088 cpu_name, cpuid & 15, elf_platform);
1089
Pavel Machek4bf96362015-01-04 20:01:23 +01001090#if defined(CONFIG_SMP)
1091 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
1092 per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
1093 (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
1094#else
1095 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
1096 loops_per_jiffy / (500000/HZ),
1097 (loops_per_jiffy / (5000/HZ)) % 100);
1098#endif
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001099 /* dump out the processor features */
1100 seq_puts(m, "Features\t: ");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001101
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001102 for (j = 0; hwcap_str[j]; j++)
1103 if (elf_hwcap & (1 << j))
1104 seq_printf(m, "%s ", hwcap_str[j]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001105
Ard Biesheuvelb342ea42014-02-19 22:28:40 +01001106 for (j = 0; hwcap2_str[j]; j++)
1107 if (elf_hwcap2 & (1 << j))
1108 seq_printf(m, "%s ", hwcap2_str[j]);
1109
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001110 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", cpuid >> 24);
1111 seq_printf(m, "CPU architecture: %s\n",
1112 proc_arch[cpu_architecture()]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001113
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001114 if ((cpuid & 0x0008f000) == 0x00000000) {
1115 /* pre-ARM7 */
1116 seq_printf(m, "CPU part\t: %07x\n", cpuid >> 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117 } else {
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001118 if ((cpuid & 0x0008f000) == 0x00007000) {
1119 /* ARM7 */
1120 seq_printf(m, "CPU variant\t: 0x%02x\n",
1121 (cpuid >> 16) & 127);
1122 } else {
1123 /* post-ARM7 */
1124 seq_printf(m, "CPU variant\t: 0x%x\n",
1125 (cpuid >> 20) & 15);
1126 }
1127 seq_printf(m, "CPU part\t: 0x%03x\n",
1128 (cpuid >> 4) & 0xfff);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129 }
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001130 seq_printf(m, "CPU revision\t: %d\n\n", cpuid & 15);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001131 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001132
1133 seq_printf(m, "Hardware\t: %s\n", machine_name);
1134 seq_printf(m, "Revision\t: %04x\n", system_rev);
Paul Kocialkowski3f599872015-05-06 15:23:56 +01001135 seq_printf(m, "Serial\t\t: %s\n", system_serial);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001136
1137 return 0;
1138}
1139
1140static void *c_start(struct seq_file *m, loff_t *pos)
1141{
1142 return *pos < 1 ? (void *)1 : NULL;
1143}
1144
1145static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1146{
1147 ++*pos;
1148 return NULL;
1149}
1150
1151static void c_stop(struct seq_file *m, void *v)
1152{
1153}
1154
Jan Engelhardt2ffd6e12008-01-22 20:41:07 +01001155const struct seq_operations cpuinfo_op = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156 .start = c_start,
1157 .next = c_next,
1158 .stop = c_stop,
1159 .show = c_show
1160};