Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 1 | /* linux/drivers/spi/spi_s3c24xx.c |
| 2 | * |
| 3 | * Copyright (c) 2006 Ben Dooks |
| 4 | * Copyright (c) 2006 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | */ |
| 12 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 13 | #include <linux/init.h> |
| 14 | #include <linux/spinlock.h> |
| 15 | #include <linux/workqueue.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/errno.h> |
| 19 | #include <linux/err.h> |
| 20 | #include <linux/clk.h> |
| 21 | #include <linux/platform_device.h> |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 22 | #include <linux/gpio.h> |
Ben Dooks | 1a0c220 | 2009-09-22 16:46:12 -0700 | [diff] [blame] | 23 | #include <linux/io.h> |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 24 | |
| 25 | #include <linux/spi/spi.h> |
| 26 | #include <linux/spi/spi_bitbang.h> |
| 27 | |
Ben Dooks | 1362270 | 2008-10-30 10:14:38 +0000 | [diff] [blame] | 28 | #include <plat/regs-spi.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 29 | #include <mach/spi.h> |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 30 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 31 | /** |
| 32 | * s3c24xx_spi_devstate - per device data |
| 33 | * @hz: Last frequency calculated for @sppre field. |
| 34 | * @mode: Last mode setting for the @spcon field. |
| 35 | * @spcon: Value to write to the SPCON register. |
| 36 | * @sppre: Value to write to the SPPRE register. |
| 37 | */ |
| 38 | struct s3c24xx_spi_devstate { |
| 39 | unsigned int hz; |
| 40 | unsigned int mode; |
| 41 | u8 spcon; |
| 42 | u8 sppre; |
| 43 | }; |
| 44 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 45 | struct s3c24xx_spi { |
| 46 | /* bitbang has to be first */ |
| 47 | struct spi_bitbang bitbang; |
| 48 | struct completion done; |
| 49 | |
| 50 | void __iomem *regs; |
| 51 | int irq; |
| 52 | int len; |
| 53 | int count; |
| 54 | |
Arnaud Patard (Rtp | 6c912a3 | 2007-03-16 13:38:36 -0800 | [diff] [blame] | 55 | void (*set_cs)(struct s3c2410_spi_info *spi, |
Ben Dooks | 8736b92 | 2007-01-26 00:56:43 -0800 | [diff] [blame] | 56 | int cs, int pol); |
| 57 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 58 | /* data buffers */ |
| 59 | const unsigned char *tx; |
| 60 | unsigned char *rx; |
| 61 | |
| 62 | struct clk *clk; |
| 63 | struct resource *ioarea; |
| 64 | struct spi_master *master; |
| 65 | struct spi_device *curdev; |
| 66 | struct device *dev; |
| 67 | struct s3c2410_spi_info *pdata; |
| 68 | }; |
| 69 | |
| 70 | #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT) |
| 71 | #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP) |
| 72 | |
| 73 | static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev) |
| 74 | { |
| 75 | return spi_master_get_devdata(sdev->master); |
| 76 | } |
| 77 | |
Ben Dooks | 8736b92 | 2007-01-26 00:56:43 -0800 | [diff] [blame] | 78 | static void s3c24xx_spi_gpiocs(struct s3c2410_spi_info *spi, int cs, int pol) |
| 79 | { |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 80 | gpio_set_value(spi->pin_cs, pol); |
Ben Dooks | 8736b92 | 2007-01-26 00:56:43 -0800 | [diff] [blame] | 81 | } |
| 82 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 83 | static void s3c24xx_spi_chipsel(struct spi_device *spi, int value) |
| 84 | { |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 85 | struct s3c24xx_spi_devstate *cs = spi->controller_state; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 86 | struct s3c24xx_spi *hw = to_hw(spi); |
| 87 | unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0; |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 88 | |
| 89 | /* change the chipselect state and the state of the spi engine clock */ |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 90 | |
| 91 | switch (value) { |
| 92 | case BITBANG_CS_INACTIVE: |
Ben Dooks | 3d2c5b4 | 2007-04-16 22:53:22 -0700 | [diff] [blame] | 93 | hw->set_cs(hw->pdata, spi->chip_select, cspol^1); |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 94 | writeb(cs->spcon, hw->regs + S3C2410_SPCON); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 95 | break; |
| 96 | |
| 97 | case BITBANG_CS_ACTIVE: |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 98 | writeb(cs->spcon | S3C2410_SPCON_ENSCK, |
| 99 | hw->regs + S3C2410_SPCON); |
Ben Dooks | 3d2c5b4 | 2007-04-16 22:53:22 -0700 | [diff] [blame] | 100 | hw->set_cs(hw->pdata, spi->chip_select, cspol); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 101 | break; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 102 | } |
| 103 | } |
| 104 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 105 | static int s3c24xx_spi_update_state(struct spi_device *spi, |
| 106 | struct spi_transfer *t) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 107 | { |
| 108 | struct s3c24xx_spi *hw = to_hw(spi); |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 109 | struct s3c24xx_spi_devstate *cs = spi->controller_state; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 110 | unsigned int bpw; |
| 111 | unsigned int hz; |
| 112 | unsigned int div; |
Ben Dooks | b897878 | 2009-08-18 14:11:16 -0700 | [diff] [blame] | 113 | unsigned long clk; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 114 | |
| 115 | bpw = t ? t->bits_per_word : spi->bits_per_word; |
| 116 | hz = t ? t->speed_hz : spi->max_speed_hz; |
| 117 | |
Ben Dooks | 1915297 | 2009-08-18 14:11:17 -0700 | [diff] [blame] | 118 | if (!bpw) |
| 119 | bpw = 8; |
| 120 | |
| 121 | if (!hz) |
| 122 | hz = spi->max_speed_hz; |
| 123 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 124 | if (bpw != 8) { |
| 125 | dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw); |
| 126 | return -EINVAL; |
| 127 | } |
| 128 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 129 | if (spi->mode != cs->mode) { |
| 130 | u8 spcon = SPCON_DEFAULT; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 131 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 132 | if (spi->mode & SPI_CPHA) |
| 133 | spcon |= S3C2410_SPCON_CPHA_FMTB; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 134 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 135 | if (spi->mode & SPI_CPOL) |
| 136 | spcon |= S3C2410_SPCON_CPOL_HIGH; |
Ben Dooks | b897878 | 2009-08-18 14:11:16 -0700 | [diff] [blame] | 137 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 138 | cs->mode = spi->mode; |
| 139 | cs->spcon = spcon; |
| 140 | } |
Ben Dooks | b897878 | 2009-08-18 14:11:16 -0700 | [diff] [blame] | 141 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 142 | if (cs->hz != hz) { |
| 143 | clk = clk_get_rate(hw->clk); |
| 144 | div = DIV_ROUND_UP(clk, hz * 2) - 1; |
| 145 | |
| 146 | if (div > 255) |
| 147 | div = 255; |
| 148 | |
| 149 | dev_dbg(&spi->dev, "pre-scaler=%d (wanted %d, got %ld)\n", |
| 150 | div, hz, clk / (2 * (div + 1))); |
| 151 | |
| 152 | cs->hz = hz; |
| 153 | cs->sppre = div; |
| 154 | } |
| 155 | |
| 156 | return 0; |
| 157 | } |
| 158 | |
| 159 | static int s3c24xx_spi_setupxfer(struct spi_device *spi, |
| 160 | struct spi_transfer *t) |
| 161 | { |
| 162 | struct s3c24xx_spi_devstate *cs = spi->controller_state; |
| 163 | struct s3c24xx_spi *hw = to_hw(spi); |
| 164 | int ret; |
| 165 | |
| 166 | ret = s3c24xx_spi_update_state(spi, t); |
| 167 | if (!ret) |
| 168 | writeb(cs->sppre, hw->regs + S3C2410_SPPRE); |
| 169 | |
| 170 | return ret; |
| 171 | } |
| 172 | |
| 173 | static int s3c24xx_spi_setup(struct spi_device *spi) |
| 174 | { |
| 175 | struct s3c24xx_spi_devstate *cs = spi->controller_state; |
| 176 | struct s3c24xx_spi *hw = to_hw(spi); |
| 177 | int ret; |
| 178 | |
| 179 | /* allocate settings on the first call */ |
| 180 | if (!cs) { |
| 181 | cs = kzalloc(sizeof(struct s3c24xx_spi_devstate), GFP_KERNEL); |
| 182 | if (!cs) { |
| 183 | dev_err(&spi->dev, "no memory for controller state\n"); |
| 184 | return -ENOMEM; |
| 185 | } |
| 186 | |
| 187 | cs->spcon = SPCON_DEFAULT; |
| 188 | cs->hz = -1; |
| 189 | spi->controller_state = cs; |
| 190 | } |
| 191 | |
| 192 | /* initialise the state from the device */ |
| 193 | ret = s3c24xx_spi_update_state(spi, NULL); |
| 194 | if (ret) |
| 195 | return ret; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 196 | |
| 197 | spin_lock(&hw->bitbang.lock); |
| 198 | if (!hw->bitbang.busy) { |
| 199 | hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE); |
| 200 | /* need to ndelay for 0.5 clocktick ? */ |
| 201 | } |
| 202 | spin_unlock(&hw->bitbang.lock); |
| 203 | |
| 204 | return 0; |
| 205 | } |
| 206 | |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 207 | static void s3c24xx_spi_cleanup(struct spi_device *spi) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 208 | { |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 209 | kfree(spi->controller_state); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count) |
| 213 | { |
David Brownell | 4b1badf | 2006-12-29 16:48:39 -0800 | [diff] [blame] | 214 | return hw->tx ? hw->tx[count] : 0; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 215 | } |
| 216 | |
| 217 | static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) |
| 218 | { |
| 219 | struct s3c24xx_spi *hw = to_hw(spi); |
| 220 | |
| 221 | dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", |
| 222 | t->tx_buf, t->rx_buf, t->len); |
| 223 | |
| 224 | hw->tx = t->tx_buf; |
| 225 | hw->rx = t->rx_buf; |
| 226 | hw->len = t->len; |
| 227 | hw->count = 0; |
| 228 | |
Ben Dooks | 4bb5eba | 2008-04-15 14:34:44 -0700 | [diff] [blame] | 229 | init_completion(&hw->done); |
| 230 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 231 | /* send the first byte */ |
| 232 | writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT); |
Ben Dooks | 4bb5eba | 2008-04-15 14:34:44 -0700 | [diff] [blame] | 233 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 234 | wait_for_completion(&hw->done); |
| 235 | |
| 236 | return hw->count; |
| 237 | } |
| 238 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 239 | static irqreturn_t s3c24xx_spi_irq(int irq, void *dev) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 240 | { |
| 241 | struct s3c24xx_spi *hw = dev; |
| 242 | unsigned int spsta = readb(hw->regs + S3C2410_SPSTA); |
| 243 | unsigned int count = hw->count; |
| 244 | |
| 245 | if (spsta & S3C2410_SPSTA_DCOL) { |
| 246 | dev_dbg(hw->dev, "data-collision\n"); |
| 247 | complete(&hw->done); |
| 248 | goto irq_done; |
| 249 | } |
| 250 | |
| 251 | if (!(spsta & S3C2410_SPSTA_READY)) { |
| 252 | dev_dbg(hw->dev, "spi not ready for tx?\n"); |
| 253 | complete(&hw->done); |
| 254 | goto irq_done; |
| 255 | } |
| 256 | |
| 257 | hw->count++; |
| 258 | |
| 259 | if (hw->rx) |
| 260 | hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT); |
| 261 | |
| 262 | count++; |
| 263 | |
| 264 | if (count < hw->len) |
| 265 | writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT); |
| 266 | else |
| 267 | complete(&hw->done); |
| 268 | |
| 269 | irq_done: |
| 270 | return IRQ_HANDLED; |
| 271 | } |
| 272 | |
Ben Dooks | 5aa6cf3 | 2008-08-04 13:41:10 -0700 | [diff] [blame] | 273 | static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw) |
| 274 | { |
| 275 | /* for the moment, permanently enable the clock */ |
| 276 | |
| 277 | clk_enable(hw->clk); |
| 278 | |
| 279 | /* program defaults into the registers */ |
| 280 | |
| 281 | writeb(0xff, hw->regs + S3C2410_SPPRE); |
| 282 | writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN); |
| 283 | writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON); |
Ben Dooks | cf46b97 | 2008-10-15 22:02:41 -0700 | [diff] [blame] | 284 | |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 285 | if (hw->pdata) { |
| 286 | if (hw->set_cs == s3c24xx_spi_gpiocs) |
| 287 | gpio_direction_output(hw->pdata->pin_cs, 1); |
| 288 | |
| 289 | if (hw->pdata->gpio_setup) |
| 290 | hw->pdata->gpio_setup(hw->pdata, 1); |
| 291 | } |
Ben Dooks | 5aa6cf3 | 2008-08-04 13:41:10 -0700 | [diff] [blame] | 292 | } |
| 293 | |
David Brownell | d1e44d9 | 2007-10-16 01:27:46 -0700 | [diff] [blame] | 294 | static int __init s3c24xx_spi_probe(struct platform_device *pdev) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 295 | { |
Ben Dooks | 50f426b | 2008-04-15 14:34:45 -0700 | [diff] [blame] | 296 | struct s3c2410_spi_info *pdata; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 297 | struct s3c24xx_spi *hw; |
| 298 | struct spi_master *master; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 299 | struct resource *res; |
| 300 | int err = 0; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 301 | |
| 302 | master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi)); |
| 303 | if (master == NULL) { |
| 304 | dev_err(&pdev->dev, "No memory for spi_master\n"); |
| 305 | err = -ENOMEM; |
| 306 | goto err_nomem; |
| 307 | } |
| 308 | |
| 309 | hw = spi_master_get_devdata(master); |
| 310 | memset(hw, 0, sizeof(struct s3c24xx_spi)); |
| 311 | |
| 312 | hw->master = spi_master_get(master); |
Ben Dooks | 50f426b | 2008-04-15 14:34:45 -0700 | [diff] [blame] | 313 | hw->pdata = pdata = pdev->dev.platform_data; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 314 | hw->dev = &pdev->dev; |
| 315 | |
Ben Dooks | 50f426b | 2008-04-15 14:34:45 -0700 | [diff] [blame] | 316 | if (pdata == NULL) { |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 317 | dev_err(&pdev->dev, "No platform data supplied\n"); |
| 318 | err = -ENOENT; |
| 319 | goto err_no_pdata; |
| 320 | } |
| 321 | |
| 322 | platform_set_drvdata(pdev, hw); |
| 323 | init_completion(&hw->done); |
| 324 | |
Ben Dooks | d1e7780 | 2008-04-15 14:34:46 -0700 | [diff] [blame] | 325 | /* setup the master state. */ |
| 326 | |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 327 | /* the spi->mode bits understood by this driver: */ |
| 328 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
| 329 | |
Ben Dooks | d1e7780 | 2008-04-15 14:34:46 -0700 | [diff] [blame] | 330 | master->num_chipselect = hw->pdata->num_cs; |
Ben Dooks | cb1d0a7 | 2008-07-28 15:46:33 -0700 | [diff] [blame] | 331 | master->bus_num = pdata->bus_num; |
Ben Dooks | d1e7780 | 2008-04-15 14:34:46 -0700 | [diff] [blame] | 332 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 333 | /* setup the state for the bitbang driver */ |
| 334 | |
| 335 | hw->bitbang.master = hw->master; |
| 336 | hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer; |
| 337 | hw->bitbang.chipselect = s3c24xx_spi_chipsel; |
| 338 | hw->bitbang.txrx_bufs = s3c24xx_spi_txrx; |
Ben Dooks | 570327d | 2009-09-22 16:46:14 -0700 | [diff] [blame] | 339 | |
| 340 | hw->master->setup = s3c24xx_spi_setup; |
| 341 | hw->master->cleanup = s3c24xx_spi_cleanup; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 342 | |
| 343 | dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang); |
| 344 | |
| 345 | /* find and map our resources */ |
| 346 | |
| 347 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 348 | if (res == NULL) { |
| 349 | dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n"); |
| 350 | err = -ENOENT; |
| 351 | goto err_no_iores; |
| 352 | } |
| 353 | |
Ben Dooks | b5e3afb | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 354 | hw->ioarea = request_mem_region(res->start, resource_size(res), |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 355 | pdev->name); |
| 356 | |
| 357 | if (hw->ioarea == NULL) { |
| 358 | dev_err(&pdev->dev, "Cannot reserve region\n"); |
| 359 | err = -ENXIO; |
| 360 | goto err_no_iores; |
| 361 | } |
| 362 | |
Ben Dooks | b5e3afb | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 363 | hw->regs = ioremap(res->start, resource_size(res)); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 364 | if (hw->regs == NULL) { |
| 365 | dev_err(&pdev->dev, "Cannot map IO\n"); |
| 366 | err = -ENXIO; |
| 367 | goto err_no_iomap; |
| 368 | } |
| 369 | |
| 370 | hw->irq = platform_get_irq(pdev, 0); |
| 371 | if (hw->irq < 0) { |
| 372 | dev_err(&pdev->dev, "No IRQ specified\n"); |
| 373 | err = -ENOENT; |
| 374 | goto err_no_irq; |
| 375 | } |
| 376 | |
| 377 | err = request_irq(hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw); |
| 378 | if (err) { |
| 379 | dev_err(&pdev->dev, "Cannot claim IRQ\n"); |
| 380 | goto err_no_irq; |
| 381 | } |
| 382 | |
| 383 | hw->clk = clk_get(&pdev->dev, "spi"); |
| 384 | if (IS_ERR(hw->clk)) { |
| 385 | dev_err(&pdev->dev, "No clock for device\n"); |
| 386 | err = PTR_ERR(hw->clk); |
| 387 | goto err_no_clk; |
| 388 | } |
| 389 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 390 | /* setup any gpio we can */ |
| 391 | |
Ben Dooks | 50f426b | 2008-04-15 14:34:45 -0700 | [diff] [blame] | 392 | if (!pdata->set_cs) { |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 393 | if (pdata->pin_cs < 0) { |
| 394 | dev_err(&pdev->dev, "No chipselect pin\n"); |
| 395 | goto err_register; |
| 396 | } |
Ben Dooks | 8736b92 | 2007-01-26 00:56:43 -0800 | [diff] [blame] | 397 | |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 398 | err = gpio_request(pdata->pin_cs, dev_name(&pdev->dev)); |
| 399 | if (err) { |
| 400 | dev_err(&pdev->dev, "Failed to get gpio for cs\n"); |
| 401 | goto err_register; |
| 402 | } |
| 403 | |
| 404 | hw->set_cs = s3c24xx_spi_gpiocs; |
| 405 | gpio_direction_output(pdata->pin_cs, 1); |
Ben Dooks | 8736b92 | 2007-01-26 00:56:43 -0800 | [diff] [blame] | 406 | } else |
Ben Dooks | 50f426b | 2008-04-15 14:34:45 -0700 | [diff] [blame] | 407 | hw->set_cs = pdata->set_cs; |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 408 | |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 409 | s3c24xx_spi_initialsetup(hw); |
| 410 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 411 | /* register our spi controller */ |
| 412 | |
| 413 | err = spi_bitbang_start(&hw->bitbang); |
| 414 | if (err) { |
| 415 | dev_err(&pdev->dev, "Failed to register SPI master\n"); |
| 416 | goto err_register; |
| 417 | } |
| 418 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 419 | return 0; |
| 420 | |
| 421 | err_register: |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 422 | if (hw->set_cs == s3c24xx_spi_gpiocs) |
| 423 | gpio_free(pdata->pin_cs); |
| 424 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 425 | clk_disable(hw->clk); |
| 426 | clk_put(hw->clk); |
| 427 | |
| 428 | err_no_clk: |
| 429 | free_irq(hw->irq, hw); |
| 430 | |
| 431 | err_no_irq: |
| 432 | iounmap(hw->regs); |
| 433 | |
| 434 | err_no_iomap: |
| 435 | release_resource(hw->ioarea); |
| 436 | kfree(hw->ioarea); |
| 437 | |
| 438 | err_no_iores: |
| 439 | err_no_pdata: |
Joe Perches | a419aef | 2009-08-18 11:18:35 -0700 | [diff] [blame] | 440 | spi_master_put(hw->master); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 441 | |
| 442 | err_nomem: |
| 443 | return err; |
| 444 | } |
| 445 | |
David Brownell | d1e44d9 | 2007-10-16 01:27:46 -0700 | [diff] [blame] | 446 | static int __exit s3c24xx_spi_remove(struct platform_device *dev) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 447 | { |
| 448 | struct s3c24xx_spi *hw = platform_get_drvdata(dev); |
| 449 | |
| 450 | platform_set_drvdata(dev, NULL); |
| 451 | |
| 452 | spi_unregister_master(hw->master); |
| 453 | |
| 454 | clk_disable(hw->clk); |
| 455 | clk_put(hw->clk); |
| 456 | |
| 457 | free_irq(hw->irq, hw); |
| 458 | iounmap(hw->regs); |
| 459 | |
Ben Dooks | ee9c1fb | 2009-01-06 14:41:44 -0800 | [diff] [blame] | 460 | if (hw->set_cs == s3c24xx_spi_gpiocs) |
| 461 | gpio_free(hw->pdata->pin_cs); |
| 462 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 463 | release_resource(hw->ioarea); |
| 464 | kfree(hw->ioarea); |
| 465 | |
| 466 | spi_master_put(hw->master); |
| 467 | return 0; |
| 468 | } |
| 469 | |
| 470 | |
| 471 | #ifdef CONFIG_PM |
| 472 | |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 473 | static int s3c24xx_spi_suspend(struct device *dev) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 474 | { |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 475 | struct s3c24xx_spi *hw = platform_get_drvdata(to_platform_device(dev)); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 476 | |
Ben Dooks | cf46b97 | 2008-10-15 22:02:41 -0700 | [diff] [blame] | 477 | if (hw->pdata && hw->pdata->gpio_setup) |
| 478 | hw->pdata->gpio_setup(hw->pdata, 0); |
| 479 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 480 | clk_disable(hw->clk); |
| 481 | return 0; |
| 482 | } |
| 483 | |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 484 | static int s3c24xx_spi_resume(struct device *dev) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 485 | { |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 486 | struct s3c24xx_spi *hw = platform_get_drvdata(to_platform_device(dev)); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 487 | |
Ben Dooks | 5aa6cf3 | 2008-08-04 13:41:10 -0700 | [diff] [blame] | 488 | s3c24xx_spi_initialsetup(hw); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 489 | return 0; |
| 490 | } |
| 491 | |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 492 | static struct dev_pm_ops s3c24xx_spi_pmops = { |
| 493 | .suspend = s3c24xx_spi_suspend, |
| 494 | .resume = s3c24xx_spi_resume, |
| 495 | }; |
| 496 | |
| 497 | #define S3C24XX_SPI_PMOPS &s3c24xx_spi_pmops |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 498 | #else |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 499 | #define S3C24XX_SPI_PMOPS NULL |
| 500 | #endif /* CONFIG_PM */ |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 501 | |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 502 | MODULE_ALIAS("platform:s3c2410-spi"); |
Ben Dooks | 42cde43 | 2008-09-13 02:33:24 -0700 | [diff] [blame] | 503 | static struct platform_driver s3c24xx_spi_driver = { |
David Brownell | d1e44d9 | 2007-10-16 01:27:46 -0700 | [diff] [blame] | 504 | .remove = __exit_p(s3c24xx_spi_remove), |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 505 | .driver = { |
| 506 | .name = "s3c2410-spi", |
| 507 | .owner = THIS_MODULE, |
Ben Dooks | 6d61320 | 2009-09-22 16:46:13 -0700 | [diff] [blame] | 508 | .pm = S3C24XX_SPI_PMOPS, |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 509 | }, |
| 510 | }; |
| 511 | |
| 512 | static int __init s3c24xx_spi_init(void) |
| 513 | { |
Ben Dooks | 42cde43 | 2008-09-13 02:33:24 -0700 | [diff] [blame] | 514 | return platform_driver_probe(&s3c24xx_spi_driver, s3c24xx_spi_probe); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | static void __exit s3c24xx_spi_exit(void) |
| 518 | { |
Ben Dooks | 42cde43 | 2008-09-13 02:33:24 -0700 | [diff] [blame] | 519 | platform_driver_unregister(&s3c24xx_spi_driver); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 520 | } |
| 521 | |
| 522 | module_init(s3c24xx_spi_init); |
| 523 | module_exit(s3c24xx_spi_exit); |
| 524 | |
| 525 | MODULE_DESCRIPTION("S3C24XX SPI Driver"); |
| 526 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
| 527 | MODULE_LICENSE("GPL"); |