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path: root/compiler/optimizing/instruction_simplifier_shared.cc
AgeCommit message (Expand)Author
2024-11-08Clean up after introducing `HRol`. Vladimir Marko
2024-09-13riscv64: Add node Rol, fix InstructionBuilder Anton Romanov
2024-09-11Revert "riscv64: Add node Rol, fix InstructionBuilder" Nicolas Geoffray
2024-09-10riscv64: Add node Rol, fix InstructionBuilder Anton Romanov
2024-06-12riscv: Expand BitwiseNegatedRight to riscv64, optimize Anton Romanov
2024-03-06Convert And+Sub into bic if possible Santiago Aboy Solanes
2023-10-30Replace `gUseReadBarrier` with compiler option in compiler. Vladimir Marko
2023-04-27Optimizing: Add `HInstruction::As##type()`. Vladimir Marko
2023-04-27Optimizing: Rename `As##type` to `As##type##OrNull`. Vladimir Marko
2022-11-07Reland "Make compiler/optimizing/ symbols hidden." Vladimír Marko
2022-08-10Convert kUseReadBarrier to static const from constexpr Lokesh Gidra
2020-06-19ART: Transform Sub+Sub into Sub+Add to merge Shl Evgeny Astigeevich
2019-10-14Revert "Make compiler/optimizing/ symbols hidden." Vladimir Marko
2019-10-14Make compiler/optimizing/ symbols hidden. Vladimir Marko
2018-10-25ARM64: Support interm. address for object arrays. Artem Serov
2017-11-02ART: Make InstructionSet an enum class and add kLast. Vladimir Marko
2017-10-09Use ScopedArenaAllocator for register allocation. Vladimir Marko
2017-10-06ART: Use ScopedArenaAllocator for pass-local data. Vladimir Marko
2017-09-25ART: Introduce compiler data type. Vladimir Marko
2017-08-14MIPS: Support MultiplyAccumulate for SIMD. Lena Djokic
2017-07-14Remove the old ARM code generator from ART's Optimizing compiler. Roland Levillain
2017-05-11ARM64: Share address computation across SIMD LDRs/STRs. Artem Serov
2017-04-26Merge "ARM64: Link-time generated thunks for ArrayGet Baker CC read barrier." Vladimir Marko
2017-04-25ARM64: Link-time generated thunks for ArrayGet Baker CC read barrier. Vladimir Marko
2017-04-20ARM64: Support MultiplyAccumulate for SIMD. Artem Serov
2016-11-04Revert "Revert "Enable IntermediateAddress for primitive arrays with read bar... Roland Levillain
2016-09-19Remove the `CanTriggerGC` side-effects on a few instructions. Alexandre Rames
2016-08-15Revert "Enable IntermediateAddress for primitive arrays with read barriers." Roland Levillain
2016-08-08Enable IntermediateAddress for primitive arrays with read barriers. Roland Levillain
2016-07-21ARM: Port instr simplification of array accesses. Artem Serov
2016-04-19Use iterators "before" the use node in HUserRecord<>. Vladimir Marko
2016-03-11Integrate BitwiseNegated into shared framework. Artem Serov
2016-02-25Revert "Revert "ARM/ARM64: Extend support of instruction combining."" Artem Udovichenko
2016-01-22Revert "ARM/ARM64: Extend support of instruction combining." Nicolas Geoffray
2016-01-21ARM/ARM64: Extend support of instruction combining. Ilmir Usmanov
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