diff options
| author | 2012-06-18 14:49:45 -0700 | |
|---|---|---|
| committer | 2012-06-20 15:12:44 -0700 | |
| commit | ad8f15e0b13383b2eaa2486b230debeae7a55661 (patch) | |
| tree | 0939aa6dee5f24dc4ae21dd2c06db0265d4682ca /src/compiler/codegen/RallocUtil.cc | |
| parent | 83c26f9c7ee42b0037d2679f6f37dd28a3f13af7 (diff) | |
Milestone: close Quick side channel communication
This CL elminates side-channel communication between the Quick
Compiler's Dex->MIR->LLVM-IR and LLVM-IR->LIR lowering stages by clearing
key data structures between the two stages.
The purpose if to flush out any hidden information transfer, and thus
ensure that the GreenlandIR representation of the program is sufficient.
Note that as of this change, we've lost all register promotion info
so the Quick compiler will generate non-promoted code. A near-future
CL will restore that info from the MethodInfo intrinsic.
Change-Id: I797845f1fc029bc03aac3ec20f8cd81f917817ca
Diffstat (limited to 'src/compiler/codegen/RallocUtil.cc')
| -rw-r--r-- | src/compiler/codegen/RallocUtil.cc | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/compiler/codegen/RallocUtil.cc b/src/compiler/codegen/RallocUtil.cc index e2f2cd683b..074fd26ca0 100644 --- a/src/compiler/codegen/RallocUtil.cc +++ b/src/compiler/codegen/RallocUtil.cc @@ -29,17 +29,6 @@ namespace art { -#define SREG(c, s) ((c)->regLocation[(s)].sRegLow) -/* - * Get the "real" sreg number associated with an sReg slot. In general, - * sReg values passed through codegen are the SSA names created by - * dataflow analysis and refer to slot numbers in the cUnit->regLocation - * array. However, renaming is accomplished by simply replacing RegLocation - * entries in the cUnit->reglocation[] array. Therefore, when location - * records for operands are first created, we need to ask the locRecord - * identified by the dataflow pass what it's new name is. - */ - /* * Free all allocated temps in the temp pools. Note that this does * not affect the "liveness" of a temp register, which will stay |