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| author | 2017-06-30 18:34:01 +0100 | |
|---|---|---|
| committer | 2017-07-13 16:41:07 +0100 | |
| commit | 6d729a789d3d7771e13d9445ee0be1d9d48a81b5 (patch) | |
| tree | 360b9af68920f411be5fe6753aaf7ab4976385ea /compiler/utils/assembler_thumb_test.cc | |
| parent | 8cfbbb826a3ab7bb680cfcd8a8148570b165d620 (diff) | |
Introduce a Marking Register in ARM code generation.
When generating code for ARM, maintain the status of
Thread::Current()->GetIsGcMarking() in register R8,
dubbed MR (Marking Register), and check the value of that
register (instead of loading and checking a read barrier
marking entrypoint) in read barriers.
Test: m test-art-target
Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false
Test: m test-art-host-gtest
Test: ARM device boot test
Bug: 37707231
Change-Id: I30b44254460d0bbb9f1b2adc65eca52ca3de3f53
Diffstat (limited to 'compiler/utils/assembler_thumb_test.cc')
| -rw-r--r-- | compiler/utils/assembler_thumb_test.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/compiler/utils/assembler_thumb_test.cc b/compiler/utils/assembler_thumb_test.cc index 4e9b619979..759ed38601 100644 --- a/compiler/utils/assembler_thumb_test.cc +++ b/compiler/utils/assembler_thumb_test.cc @@ -1643,6 +1643,10 @@ void EmitAndCheck(JniAssemblerType* assembler, const char* testname) { #define __ assembler. TEST_F(ArmVIXLAssemblerTest, VixlJniHelpers) { + // Run the test only with Baker read barriers, as the expected + // generated code contains a Marking Register refresh instruction. + TEST_DISABLED_WITHOUT_BAKER_READ_BARRIERS(); + const bool is_static = true; const bool is_synchronized = false; const bool is_critical_native = false; |