Add assembler for riscv64, part 1.

Test: m test-art-host-gtest

Bug: 271573990
Signed-off-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Wendong Wang <wangwd@xcvmbyte.com>
Signed-off-by: Cao Xia <caoxia@eswincomputing.com>
Change-Id: Ie1306521b8df28173b9be40f754e114bd849985b

1 files changed, 10 insertions, 0 deletions

diff --git a/compiler/utils/assembler_test_base.h b/compiler/utils/assembler_test_base.h
index 73f3657413..8b76643e98 100644
--- a/compiler/utils/assembler_test_base.h
+++ b/compiler/utils/assembler_test_base.h
@@ -141,6 +141,9 @@ class AssemblerTestBase : public testing::Test {
   virtual std::vector<std::string> GetAssemblerCommand() {
     InstructionSet isa = GetIsa();
     switch (isa) {
+      case InstructionSet::kRiscv64:
+        // TODO: Support compression (RV32C) in assembler and tests (add `c` to `-march=`).
+        return {FindTool("clang"), "--compile", "-target", "riscv64-linux-gnu", "-march=rv64imafd"};
       case InstructionSet::kX86:
         return {FindTool("clang"), "--compile", "-target", "i386-linux-gnu"};
       case InstructionSet::kX86_64:
@@ -159,6 +162,13 @@ class AssemblerTestBase : public testing::Test {
                 "--no-print-imm-hex",
                 "--triple",
                 "thumbv7a-linux-gnueabi"};
+      case InstructionSet::kRiscv64:
+        return {FindTool("llvm-objdump"),
+                "--disassemble",
+                "--no-print-imm-hex",
+                "--no-show-raw-insn",
+                "-M",
+                "no-aliases"};
       default:
         return {
             FindTool("llvm-objdump"), "--disassemble", "--no-print-imm-hex", "--no-show-raw-insn"};