From 60fdcb2b277e878eb3b2326ec516fe5d3d801174 Mon Sep 17 00:00:00 2001 From: Lifang Xia Date: Wed, 15 Mar 2023 13:36:40 +0800 Subject: Add assembler for riscv64, part 1. Test: m test-art-host-gtest Bug: 271573990 Signed-off-by: Lifang Xia Signed-off-by: Wendong Wang Signed-off-by: Cao Xia Change-Id: Ie1306521b8df28173b9be40f754e114bd849985b --- compiler/utils/assembler_test_base.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'compiler/utils/assembler_test_base.h') diff --git a/compiler/utils/assembler_test_base.h b/compiler/utils/assembler_test_base.h index 73f3657413..8b76643e98 100644 --- a/compiler/utils/assembler_test_base.h +++ b/compiler/utils/assembler_test_base.h @@ -141,6 +141,9 @@ class AssemblerTestBase : public testing::Test { virtual std::vector GetAssemblerCommand() { InstructionSet isa = GetIsa(); switch (isa) { + case InstructionSet::kRiscv64: + // TODO: Support compression (RV32C) in assembler and tests (add `c` to `-march=`). + return {FindTool("clang"), "--compile", "-target", "riscv64-linux-gnu", "-march=rv64imafd"}; case InstructionSet::kX86: return {FindTool("clang"), "--compile", "-target", "i386-linux-gnu"}; case InstructionSet::kX86_64: @@ -159,6 +162,13 @@ class AssemblerTestBase : public testing::Test { "--no-print-imm-hex", "--triple", "thumbv7a-linux-gnueabi"}; + case InstructionSet::kRiscv64: + return {FindTool("llvm-objdump"), + "--disassemble", + "--no-print-imm-hex", + "--no-show-raw-insn", + "-M", + "no-aliases"}; default: return { FindTool("llvm-objdump"), "--disassemble", "--no-print-imm-hex", "--no-show-raw-insn"}; -- cgit v1.2.3-59-g8ed1b