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| author | 2017-04-21 17:58:41 +0100 | |
|---|---|---|
| committer | 2017-05-05 12:51:11 +0100 | |
| commit | eee1c0ec2b08a6be642b329dc2fe885391127da3 (patch) | |
| tree | 960bb4df48b4a320df3c58682449abb24b5fb122 /compiler/utils/arm/assembler_arm.h | |
| parent | c7cee403ad9a3f7097f5157a621a6a8cb991222e (diff) | |
ARM: Link-time generated thunks for Baker CC read barrier.
Remaining work for follow-up CLs:
- use implicit null check in field thunk,
- use 16-bit LDRs for fields and GC roots.
Test: m test-art-target-gtest
Test: testrunner.py --target on Nexus 6P.
Test: testrunner.py --target on Nexus 6P with heap poisoning enabled.
Test: Repeat the above tests with ART_USE_OLD_ARM_BACKEND=true.
Bug: 29516974
Bug: 30126666
Bug: 36141117
Change-Id: Iad5addab72d790a9d61879f61f2e75b246bcdf5a
Diffstat (limited to 'compiler/utils/arm/assembler_arm.h')
| -rw-r--r-- | compiler/utils/arm/assembler_arm.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/compiler/utils/arm/assembler_arm.h b/compiler/utils/arm/assembler_arm.h index 0ed8a35338..0f24e81be2 100644 --- a/compiler/utils/arm/assembler_arm.h +++ b/compiler/utils/arm/assembler_arm.h @@ -652,6 +652,9 @@ class ArmAssembler : public Assembler { virtual void blx(Register rm, Condition cond = AL) = 0; virtual void bx(Register rm, Condition cond = AL) = 0; + // ADR instruction loading register for branching to the label. + virtual void AdrCode(Register rt, Label* label) = 0; + // Memory barriers. virtual void dmb(DmbOptions flavor) = 0; |