diff options
author | 2024-09-14 01:26:02 +0100 | |
---|---|---|
committer | 2024-10-15 16:29:45 +0000 | |
commit | 6127341b747ac26b361fd1779e155d940d49e39f (patch) | |
tree | e1c40de3dda7f6bc5048fff6ea5fb4deaffe6bbc /compiler/optimizing/codegen_test.cc | |
parent | b50d59f4ca5557a7719dc26157f8f2fd9006913a (diff) |
Arm64: fix VecPredToBoolean code generation for SVE
This patch fixes code generation for VecPredToBoolean so it updates
conditional flags itself based on its predicate input. Prior to this
patch, code generation for VecPredToBoolean (incorrectly) implicitly
assumed that the conditional flags were always updated by its input
HIR (VecPredWhile) and that it immediately followed that HIR.
Authors: Konstantin Baladurin <konstantin.baladurin@arm.com>
Chris Jones <christopher.jones@arm.com>
Test: env ART_FORCE_TRY_PREDICATED_SIMD=true
art/test.py --target --optimizing
Test: art/tools/run-gtests.sh
Change-Id: Id4c2494cdefd008509f9039e36081151aaf0e4a6
Diffstat (limited to 'compiler/optimizing/codegen_test.cc')
-rw-r--r-- | compiler/optimizing/codegen_test.cc | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc index 75b0ea2a08..4f8551ab87 100644 --- a/compiler/optimizing/codegen_test.cc +++ b/compiler/optimizing/codegen_test.cc @@ -932,6 +932,50 @@ TEST_F(CodegenTest, ARM64FrameSizeNoSIMD) { EXPECT_EQ(codegen.GetFpuSpillSize(), kExpectedFPSpillSize); } +// This test checks that the result of the VecPredToBoolean instruction doesn't depend on +// conditional flags that can be updated by other instructions. For example: +// +// VecPredWhile p0, opa, opb +// Below opb, opa +// VecPredToBoolean p0 +// +// where Below updates conditions flags after VecPredWhile. +TEST_F(CodegenTest, ARM64SvePredicateToBoolean) { + std::unique_ptr<CompilerOptions> compiler_options = + CommonCompilerTest::CreateCompilerOptions(InstructionSet::kArm64, "default", "sve"); + for (int i = 0; i < 2; i++) { + for (int j = 0; j < 2; j++) { + HBasicBlock* block = InitEntryMainExitGraph(); + TestCodeGeneratorARM64 codegen(graph_, *compiler_options); + if (!codegen.SupportsPredicatedSIMD()) { + GTEST_SKIP() << "Predicated SIMD is not supported."; + } + + HInstruction *opa = graph_->GetIntConstant(i); + HInstruction *opb = graph_->GetIntConstant(j); + HVecPredWhile *pred_while = MakeVecPredWhile(block, + opa, + opb, + HVecPredWhile::CondKind::kLO, + DataType::Type::kInt32); + // Update condition flags by using Below instruction. + MakeCondition(block, IfCondition::kCondB, opb, opa); + HVecPredToBoolean *boolean = MakeVecPredToBoolean(block, + pred_while, + HVecPredToBoolean::PCondKind::kNFirst, + DataType::Type::kInt32); + MakeReturn(block, boolean); + + graph_->SetHasPredicatedSIMD(true); + graph_->BuildDominatorTree(); + + if (CanExecute(codegen)) { + RunCode(&codegen, graph_, [](HGraph*) {}, true, i >= j); + } + } + } +} + #endif } // namespace art |