From 6127341b747ac26b361fd1779e155d940d49e39f Mon Sep 17 00:00:00 2001 From: Konstantin Baladurin Date: Sat, 14 Sep 2024 01:26:02 +0100 Subject: Arm64: fix VecPredToBoolean code generation for SVE This patch fixes code generation for VecPredToBoolean so it updates conditional flags itself based on its predicate input. Prior to this patch, code generation for VecPredToBoolean (incorrectly) implicitly assumed that the conditional flags were always updated by its input HIR (VecPredWhile) and that it immediately followed that HIR. Authors: Konstantin Baladurin Chris Jones Test: env ART_FORCE_TRY_PREDICATED_SIMD=true art/test.py --target --optimizing Test: art/tools/run-gtests.sh Change-Id: Id4c2494cdefd008509f9039e36081151aaf0e4a6 --- compiler/optimizing/codegen_test.cc | 44 +++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'compiler/optimizing/codegen_test.cc') diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc index 75b0ea2a08..4f8551ab87 100644 --- a/compiler/optimizing/codegen_test.cc +++ b/compiler/optimizing/codegen_test.cc @@ -932,6 +932,50 @@ TEST_F(CodegenTest, ARM64FrameSizeNoSIMD) { EXPECT_EQ(codegen.GetFpuSpillSize(), kExpectedFPSpillSize); } +// This test checks that the result of the VecPredToBoolean instruction doesn't depend on +// conditional flags that can be updated by other instructions. For example: +// +// VecPredWhile p0, opa, opb +// Below opb, opa +// VecPredToBoolean p0 +// +// where Below updates conditions flags after VecPredWhile. +TEST_F(CodegenTest, ARM64SvePredicateToBoolean) { + std::unique_ptr compiler_options = + CommonCompilerTest::CreateCompilerOptions(InstructionSet::kArm64, "default", "sve"); + for (int i = 0; i < 2; i++) { + for (int j = 0; j < 2; j++) { + HBasicBlock* block = InitEntryMainExitGraph(); + TestCodeGeneratorARM64 codegen(graph_, *compiler_options); + if (!codegen.SupportsPredicatedSIMD()) { + GTEST_SKIP() << "Predicated SIMD is not supported."; + } + + HInstruction *opa = graph_->GetIntConstant(i); + HInstruction *opb = graph_->GetIntConstant(j); + HVecPredWhile *pred_while = MakeVecPredWhile(block, + opa, + opb, + HVecPredWhile::CondKind::kLO, + DataType::Type::kInt32); + // Update condition flags by using Below instruction. + MakeCondition(block, IfCondition::kCondB, opb, opa); + HVecPredToBoolean *boolean = MakeVecPredToBoolean(block, + pred_while, + HVecPredToBoolean::PCondKind::kNFirst, + DataType::Type::kInt32); + MakeReturn(block, boolean); + + graph_->SetHasPredicatedSIMD(true); + graph_->BuildDominatorTree(); + + if (CanExecute(codegen)) { + RunCode(&codegen, graph_, [](HGraph*) {}, true, i >= j); + } + } + } +} + #endif } // namespace art -- cgit v1.2.3-59-g8ed1b