diff options
| author | 2014-01-31 19:00:56 +0000 | |
|---|---|---|
| committer | 2014-01-31 19:00:56 +0000 | |
| commit | 39a548933c7d083647ccb1d508240198ffff5a5c (patch) | |
| tree | fd10a2bdbb31eae70c35f16e24b8da7187157750 /compiler/dex/quick/codegen_util.cc | |
| parent | 9aeeeac4ba0b136652f213d60a5a1990a333a629 (diff) | |
| parent | 766e9295d2c34cd1846d81610c9045b5d5093ddd (diff) | |
Merge "Improve GenConstString, GenS{get,put} for x86"
Diffstat (limited to 'compiler/dex/quick/codegen_util.cc')
| -rw-r--r-- | compiler/dex/quick/codegen_util.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index 7f19ea1eb9..2d0fa03dd6 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1162,4 +1162,12 @@ bool Mir2Lir::BadOverlap(RegLocation rl_src, RegLocation rl_dest) { return (abs(mir_graph_->SRegToVReg(rl_src.s_reg_low) - mir_graph_->SRegToVReg(rl_dest.s_reg_low)) == 1); } +LIR *Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, int temp_reg, int base_reg, + int offset, int check_value, LIR* target) { + // Handle this for architectures that can't compare to memory. + LoadWordDisp(base_reg, offset, temp_reg); + LIR* branch = OpCmpImmBranch(cond, temp_reg, check_value, target); + return branch; +} + } // namespace art |