From 766e9295d2c34cd1846d81610c9045b5d5093ddd Mon Sep 17 00:00:00 2001 From: Mark Mendell Date: Mon, 27 Jan 2014 07:55:47 -0800 Subject: Improve GenConstString, GenS{get,put} for x86 Rewrite GenConstString for x86 to skip calling ResolveString when the string is already resolved. Also try to avoid a register copy if the Method* is in a promoted register. Implement the TODO for GenS{get,put} to use compare to memory for x86 by adding a new codegen function to compare directly to memory. Implement a default implementation that uses a temporary register for RISC architectures. Change-Id: Ie163cca3d3d841aa10c50dc6592ec30af7a7cbc9 Signed-off-by: Mark Mendell --- compiler/dex/quick/codegen_util.cc | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'compiler/dex/quick/codegen_util.cc') diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index 1eb79c98ac..d938af2c08 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1161,4 +1161,12 @@ bool Mir2Lir::BadOverlap(RegLocation rl_src, RegLocation rl_dest) { return (abs(mir_graph_->SRegToVReg(rl_src.s_reg_low) - mir_graph_->SRegToVReg(rl_dest.s_reg_low)) == 1); } +LIR *Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, int temp_reg, int base_reg, + int offset, int check_value, LIR* target) { + // Handle this for architectures that can't compare to memory. + LoadWordDisp(base_reg, offset, temp_reg); + LIR* branch = OpCmpImmBranch(cond, temp_reg, check_value, target); + return branch; +} + } // namespace art -- cgit v1.2.3-59-g8ed1b