buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | static bool genArithOpFloat(CompilationUnit* cUnit, MIR* mir, |
| 18 | RegLocation rlDest, RegLocation rlSrc1, |
| 19 | RegLocation rlSrc2) |
| 20 | { |
| 21 | int op = kThumbBkpt; |
| 22 | RegLocation rlResult; |
| 23 | |
| 24 | /* |
| 25 | * Don't attempt to optimize register usage since these opcodes call out to |
| 26 | * the handlers. |
| 27 | */ |
| 28 | switch (mir->dalvikInsn.opcode) { |
| 29 | case OP_ADD_FLOAT_2ADDR: |
| 30 | case OP_ADD_FLOAT: |
| 31 | op = kThumb2Vadds; |
| 32 | break; |
| 33 | case OP_SUB_FLOAT_2ADDR: |
| 34 | case OP_SUB_FLOAT: |
| 35 | op = kThumb2Vsubs; |
| 36 | break; |
| 37 | case OP_DIV_FLOAT_2ADDR: |
| 38 | case OP_DIV_FLOAT: |
| 39 | op = kThumb2Vdivs; |
| 40 | break; |
| 41 | case OP_MUL_FLOAT_2ADDR: |
| 42 | case OP_MUL_FLOAT: |
| 43 | op = kThumb2Vmuls; |
| 44 | break; |
| 45 | case OP_REM_FLOAT_2ADDR: |
| 46 | case OP_REM_FLOAT: |
| 47 | case OP_NEG_FLOAT: { |
| 48 | return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, |
| 49 | rlSrc2); |
| 50 | } |
| 51 | default: |
| 52 | return true; |
| 53 | } |
| 54 | rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg); |
| 55 | rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg); |
| 56 | rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true); |
| 57 | newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg, |
| 58 | rlSrc2.lowReg); |
| 59 | storeValue(cUnit, rlDest, rlResult); |
| 60 | return false; |
| 61 | } |
| 62 | |
| 63 | static bool genArithOpDouble(CompilationUnit* cUnit, MIR* mir, |
| 64 | RegLocation rlDest, RegLocation rlSrc1, |
| 65 | RegLocation rlSrc2) |
| 66 | { |
| 67 | int op = kThumbBkpt; |
| 68 | RegLocation rlResult; |
| 69 | |
| 70 | switch (mir->dalvikInsn.opcode) { |
| 71 | case OP_ADD_DOUBLE_2ADDR: |
| 72 | case OP_ADD_DOUBLE: |
| 73 | op = kThumb2Vaddd; |
| 74 | break; |
| 75 | case OP_SUB_DOUBLE_2ADDR: |
| 76 | case OP_SUB_DOUBLE: |
| 77 | op = kThumb2Vsubd; |
| 78 | break; |
| 79 | case OP_DIV_DOUBLE_2ADDR: |
| 80 | case OP_DIV_DOUBLE: |
| 81 | op = kThumb2Vdivd; |
| 82 | break; |
| 83 | case OP_MUL_DOUBLE_2ADDR: |
| 84 | case OP_MUL_DOUBLE: |
| 85 | op = kThumb2Vmuld; |
| 86 | break; |
| 87 | case OP_REM_DOUBLE_2ADDR: |
| 88 | case OP_REM_DOUBLE: |
| 89 | case OP_NEG_DOUBLE: { |
| 90 | return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, |
| 91 | rlSrc2); |
| 92 | } |
| 93 | default: |
| 94 | return true; |
| 95 | } |
| 96 | |
| 97 | rlSrc1 = loadValueWide(cUnit, rlSrc1, kFPReg); |
| 98 | assert(rlSrc1.wide); |
| 99 | rlSrc2 = loadValueWide(cUnit, rlSrc2, kFPReg); |
| 100 | assert(rlSrc2.wide); |
| 101 | rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true); |
| 102 | assert(rlDest.wide); |
| 103 | assert(rlResult.wide); |
| 104 | newLIR3(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg), |
| 105 | S2D(rlSrc1.lowReg, rlSrc1.highReg), |
| 106 | S2D(rlSrc2.lowReg, rlSrc2.highReg)); |
| 107 | storeValueWide(cUnit, rlDest, rlResult); |
| 108 | return false; |
| 109 | } |
| 110 | |
| 111 | static bool genConversion(CompilationUnit* cUnit, MIR* mir) |
| 112 | { |
| 113 | Opcode opcode = mir->dalvikInsn.opcode; |
| 114 | int op = kThumbBkpt; |
| 115 | bool longSrc = false; |
| 116 | bool longDest = false; |
| 117 | int srcReg; |
| 118 | RegLocation rlSrc; |
| 119 | RegLocation rlDest; |
| 120 | RegLocation rlResult; |
| 121 | |
| 122 | switch (opcode) { |
| 123 | case OP_INT_TO_FLOAT: |
| 124 | longSrc = false; |
| 125 | longDest = false; |
| 126 | op = kThumb2VcvtIF; |
| 127 | break; |
| 128 | case OP_FLOAT_TO_INT: |
| 129 | longSrc = false; |
| 130 | longDest = false; |
| 131 | op = kThumb2VcvtFI; |
| 132 | break; |
| 133 | case OP_DOUBLE_TO_FLOAT: |
| 134 | longSrc = true; |
| 135 | longDest = false; |
| 136 | op = kThumb2VcvtDF; |
| 137 | break; |
| 138 | case OP_FLOAT_TO_DOUBLE: |
| 139 | longSrc = false; |
| 140 | longDest = true; |
| 141 | op = kThumb2VcvtFd; |
| 142 | break; |
| 143 | case OP_INT_TO_DOUBLE: |
| 144 | longSrc = false; |
| 145 | longDest = true; |
| 146 | op = kThumb2VcvtID; |
| 147 | break; |
| 148 | case OP_DOUBLE_TO_INT: |
| 149 | longSrc = true; |
| 150 | longDest = false; |
| 151 | op = kThumb2VcvtDI; |
| 152 | break; |
| 153 | case OP_LONG_TO_DOUBLE: |
| 154 | case OP_FLOAT_TO_LONG: |
| 155 | case OP_LONG_TO_FLOAT: |
| 156 | case OP_DOUBLE_TO_LONG: |
| 157 | return genConversionPortable(cUnit, mir); |
| 158 | default: |
| 159 | return true; |
| 160 | } |
| 161 | if (longSrc) { |
| 162 | rlSrc = oatGetSrcWide(cUnit, mir, 0, 1); |
| 163 | rlSrc = loadValueWide(cUnit, rlSrc, kFPReg); |
| 164 | srcReg = S2D(rlSrc.lowReg, rlSrc.highReg); |
| 165 | } else { |
| 166 | rlSrc = oatGetSrc(cUnit, mir, 0); |
| 167 | rlSrc = loadValue(cUnit, rlSrc, kFPReg); |
| 168 | srcReg = rlSrc.lowReg; |
| 169 | } |
| 170 | if (longDest) { |
| 171 | rlDest = oatGetDestWide(cUnit, mir, 0, 1); |
| 172 | rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true); |
| 173 | newLIR2(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg), |
| 174 | srcReg); |
| 175 | storeValueWide(cUnit, rlDest, rlResult); |
| 176 | } else { |
| 177 | rlDest = oatGetDest(cUnit, mir, 0); |
| 178 | rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true); |
| 179 | newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcReg); |
| 180 | storeValue(cUnit, rlDest, rlResult); |
| 181 | } |
| 182 | return false; |
| 183 | } |
| 184 | |
| 185 | static bool genCmpFP(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest, |
| 186 | RegLocation rlSrc1, RegLocation rlSrc2) |
| 187 | { |
| 188 | bool isDouble; |
| 189 | int defaultResult; |
| 190 | RegLocation rlResult; |
| 191 | |
| 192 | switch(mir->dalvikInsn.opcode) { |
| 193 | case OP_CMPL_FLOAT: |
| 194 | isDouble = false; |
| 195 | defaultResult = -1; |
| 196 | break; |
| 197 | case OP_CMPG_FLOAT: |
| 198 | isDouble = false; |
| 199 | defaultResult = 1; |
| 200 | break; |
| 201 | case OP_CMPL_DOUBLE: |
| 202 | isDouble = true; |
| 203 | defaultResult = -1; |
| 204 | break; |
| 205 | case OP_CMPG_DOUBLE: |
| 206 | isDouble = true; |
| 207 | defaultResult = 1; |
| 208 | break; |
| 209 | default: |
| 210 | return true; |
| 211 | } |
| 212 | if (isDouble) { |
| 213 | rlSrc1 = loadValueWide(cUnit, rlSrc1, kFPReg); |
| 214 | rlSrc2 = loadValueWide(cUnit, rlSrc2, kFPReg); |
| 215 | oatClobberSReg(cUnit, rlDest.sRegLow); |
| 216 | rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true); |
| 217 | loadConstant(cUnit, rlResult.lowReg, defaultResult); |
| 218 | newLIR2(cUnit, kThumb2Vcmpd, S2D(rlSrc1.lowReg, r1Src2.highReg), |
| 219 | S2D(rlSrc2.lowReg, rlSrc2.highReg)); |
| 220 | } else { |
| 221 | rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg); |
| 222 | rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg); |
| 223 | oatClobberSReg(cUnit, rlDest.sRegLow); |
| 224 | rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true); |
| 225 | loadConstant(cUnit, rlResult.lowReg, defaultResult); |
| 226 | newLIR2(cUnit, kThumb2Vcmps, rlSrc1.lowReg, rlSrc2.lowReg); |
| 227 | } |
| 228 | assert(!FPREG(rlResult.lowReg)); |
| 229 | newLIR0(cUnit, kThumb2Fmstat); |
| 230 | |
| 231 | genIT(cUnit, (defaultResult == -1) ? kArmCondGt : kArmCondMi, ""); |
| 232 | newLIR2(cUnit, kThumb2MovImmShift, rlResult.lowReg, |
| 233 | modifiedImmediate(-defaultResult)); // Must not alter ccodes |
| 234 | genBarrier(cUnit); |
| 235 | |
| 236 | genIT(cUnit, kArmCondEq, ""); |
| 237 | loadConstant(cUnit, rlResult.lowReg, 0); |
| 238 | genBarrier(cUnit); |
| 239 | |
| 240 | storeValue(cUnit, rlDest, rlResult); |
| 241 | return false; |
| 242 | } |