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Alexandre Rames8626b742015-11-25 16:28:08 +00001/*
Anton Kirilov74234da2017-01-13 14:42:47 +00002 * Copyright (C) 2017 The Android Open Source Project
Alexandre Rames8626b742015-11-25 16:28:08 +00003 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "common_arm64.h"
Anton Kirilov74234da2017-01-13 14:42:47 +000018#include "nodes_shared.h"
Alexandre Rames8626b742015-11-25 16:28:08 +000019
20namespace art {
21
Anton Kirilov74234da2017-01-13 14:42:47 +000022using helpers::CanFitInShifterOperand;
Alexandre Rames8626b742015-11-25 16:28:08 +000023
Anton Kirilov74234da2017-01-13 14:42:47 +000024void HDataProcWithShifterOp::GetOpInfoFromInstruction(HInstruction* instruction,
25 /*out*/OpKind* op_kind,
26 /*out*/int* shift_amount) {
Alexandre Rames8626b742015-11-25 16:28:08 +000027 DCHECK(CanFitInShifterOperand(instruction));
28 if (instruction->IsShl()) {
29 *op_kind = kLSL;
30 *shift_amount = instruction->AsShl()->GetRight()->AsIntConstant()->GetValue();
31 } else if (instruction->IsShr()) {
32 *op_kind = kASR;
33 *shift_amount = instruction->AsShr()->GetRight()->AsIntConstant()->GetValue();
34 } else if (instruction->IsUShr()) {
35 *op_kind = kLSR;
36 *shift_amount = instruction->AsUShr()->GetRight()->AsIntConstant()->GetValue();
37 } else {
38 DCHECK(instruction->IsTypeConversion());
39 Primitive::Type result_type = instruction->AsTypeConversion()->GetResultType();
40 Primitive::Type input_type = instruction->AsTypeConversion()->GetInputType();
41 int result_size = Primitive::ComponentSize(result_type);
42 int input_size = Primitive::ComponentSize(input_type);
43 int min_size = std::min(result_size, input_size);
Alexandre Rames8626b742015-11-25 16:28:08 +000044 if (result_type == Primitive::kPrimInt && input_type == Primitive::kPrimLong) {
Anton Kirilov74234da2017-01-13 14:42:47 +000045 // There is actually nothing to do. On ARM the high register from the
46 // pair will be ignored. On ARM64 the register will be used as a W
47 // register, discarding the top bits. This is represented by the
48 // default encoding 'LSL 0'.
Alexandre Rames8626b742015-11-25 16:28:08 +000049 *op_kind = kLSL;
50 *shift_amount = 0;
51 } else if (result_type == Primitive::kPrimChar ||
52 (input_type == Primitive::kPrimChar && input_size < result_size)) {
53 *op_kind = kUXTH;
54 } else {
55 switch (min_size) {
56 case 1: *op_kind = kSXTB; break;
57 case 2: *op_kind = kSXTH; break;
58 case 4: *op_kind = kSXTW; break;
59 default:
60 LOG(FATAL) << "Unexpected min size " << min_size;
61 }
62 }
63 }
64}
65
Anton Kirilov74234da2017-01-13 14:42:47 +000066std::ostream& operator<<(std::ostream& os, const HDataProcWithShifterOp::OpKind op) {
Alexandre Rames8626b742015-11-25 16:28:08 +000067 switch (op) {
Anton Kirilov74234da2017-01-13 14:42:47 +000068 case HDataProcWithShifterOp::kLSL: return os << "LSL";
69 case HDataProcWithShifterOp::kLSR: return os << "LSR";
70 case HDataProcWithShifterOp::kASR: return os << "ASR";
71 case HDataProcWithShifterOp::kUXTB: return os << "UXTB";
72 case HDataProcWithShifterOp::kUXTH: return os << "UXTH";
73 case HDataProcWithShifterOp::kUXTW: return os << "UXTW";
74 case HDataProcWithShifterOp::kSXTB: return os << "SXTB";
75 case HDataProcWithShifterOp::kSXTH: return os << "SXTH";
76 case HDataProcWithShifterOp::kSXTW: return os << "SXTW";
Alexandre Rames8626b742015-11-25 16:28:08 +000077 default:
78 LOG(FATAL) << "Invalid OpKind " << static_cast<int>(op);
79 UNREACHABLE();
80 }
81}
82
83} // namespace art