Alexandre Rames | 8626b74 | 2015-11-25 16:28:08 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "common_arm64.h" |
| 18 | #include "nodes.h" |
| 19 | |
| 20 | namespace art { |
| 21 | |
| 22 | using arm64::helpers::CanFitInShifterOperand; |
| 23 | |
| 24 | void HArm64DataProcWithShifterOp::GetOpInfoFromInstruction(HInstruction* instruction, |
| 25 | /*out*/OpKind* op_kind, |
| 26 | /*out*/int* shift_amount) { |
| 27 | DCHECK(CanFitInShifterOperand(instruction)); |
| 28 | if (instruction->IsShl()) { |
| 29 | *op_kind = kLSL; |
| 30 | *shift_amount = instruction->AsShl()->GetRight()->AsIntConstant()->GetValue(); |
| 31 | } else if (instruction->IsShr()) { |
| 32 | *op_kind = kASR; |
| 33 | *shift_amount = instruction->AsShr()->GetRight()->AsIntConstant()->GetValue(); |
| 34 | } else if (instruction->IsUShr()) { |
| 35 | *op_kind = kLSR; |
| 36 | *shift_amount = instruction->AsUShr()->GetRight()->AsIntConstant()->GetValue(); |
| 37 | } else { |
| 38 | DCHECK(instruction->IsTypeConversion()); |
| 39 | Primitive::Type result_type = instruction->AsTypeConversion()->GetResultType(); |
| 40 | Primitive::Type input_type = instruction->AsTypeConversion()->GetInputType(); |
| 41 | int result_size = Primitive::ComponentSize(result_type); |
| 42 | int input_size = Primitive::ComponentSize(input_type); |
| 43 | int min_size = std::min(result_size, input_size); |
| 44 | // This follows the logic in |
| 45 | // `InstructionCodeGeneratorARM64::VisitTypeConversion()`. |
| 46 | if (result_type == Primitive::kPrimInt && input_type == Primitive::kPrimLong) { |
| 47 | // There is actually nothing to do. The register will be used as a W |
| 48 | // register, discarding the top bits. This is represented by the default |
| 49 | // encoding 'LSL 0'. |
| 50 | *op_kind = kLSL; |
| 51 | *shift_amount = 0; |
| 52 | } else if (result_type == Primitive::kPrimChar || |
| 53 | (input_type == Primitive::kPrimChar && input_size < result_size)) { |
| 54 | *op_kind = kUXTH; |
| 55 | } else { |
| 56 | switch (min_size) { |
| 57 | case 1: *op_kind = kSXTB; break; |
| 58 | case 2: *op_kind = kSXTH; break; |
| 59 | case 4: *op_kind = kSXTW; break; |
| 60 | default: |
| 61 | LOG(FATAL) << "Unexpected min size " << min_size; |
| 62 | } |
| 63 | } |
| 64 | } |
| 65 | } |
| 66 | |
| 67 | std::ostream& operator<<(std::ostream& os, const HArm64DataProcWithShifterOp::OpKind op) { |
| 68 | switch (op) { |
| 69 | case HArm64DataProcWithShifterOp::kLSL: return os << "LSL"; |
| 70 | case HArm64DataProcWithShifterOp::kLSR: return os << "LSR"; |
| 71 | case HArm64DataProcWithShifterOp::kASR: return os << "ASR"; |
| 72 | case HArm64DataProcWithShifterOp::kUXTB: return os << "UXTB"; |
| 73 | case HArm64DataProcWithShifterOp::kUXTH: return os << "UXTH"; |
| 74 | case HArm64DataProcWithShifterOp::kUXTW: return os << "UXTW"; |
| 75 | case HArm64DataProcWithShifterOp::kSXTB: return os << "SXTB"; |
| 76 | case HArm64DataProcWithShifterOp::kSXTH: return os << "SXTH"; |
| 77 | case HArm64DataProcWithShifterOp::kSXTW: return os << "SXTW"; |
| 78 | default: |
| 79 | LOG(FATAL) << "Invalid OpKind " << static_cast<int>(op); |
| 80 | UNREACHABLE(); |
| 81 | } |
| 82 | } |
| 83 | |
| 84 | } // namespace art |