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Elliott Hughes2faa5f12012-01-30 14:42:07 -08001/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070016
Ian Rogers2c8f6532011-09-02 17:16:34 -070017#include "assembler.h"
18
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070019#include <algorithm>
20#include <vector>
Ian Rogers2c8f6532011-09-02 17:16:34 -070021
Alex Light50fa9932015-08-10 15:30:07 -070022#ifdef ART_ENABLE_CODEGEN_arm
Dave Allison65fcc2c2014-04-28 13:45:27 -070023#include "arm/assembler_arm32.h"
24#include "arm/assembler_thumb2.h"
Alex Light50fa9932015-08-10 15:30:07 -070025#endif
26#ifdef ART_ENABLE_CODEGEN_arm64
Serban Constantinescued8dd492014-02-11 14:15:10 +000027#include "arm64/assembler_arm64.h"
Alex Light50fa9932015-08-10 15:30:07 -070028#endif
29#ifdef ART_ENABLE_CODEGEN_mips
jeffhao7fbee072012-08-24 17:56:54 -070030#include "mips/assembler_mips.h"
Alex Light50fa9932015-08-10 15:30:07 -070031#endif
32#ifdef ART_ENABLE_CODEGEN_mips64
Andreas Gampe57b34292015-01-14 15:45:59 -080033#include "mips64/assembler_mips64.h"
Alex Light50fa9932015-08-10 15:30:07 -070034#endif
35#ifdef ART_ENABLE_CODEGEN_x86
Ian Rogers57b86d42012-03-27 16:05:41 -070036#include "x86/assembler_x86.h"
Alex Light50fa9932015-08-10 15:30:07 -070037#endif
38#ifdef ART_ENABLE_CODEGEN_x86_64
Dmitry Petrochenkofca82202014-03-21 11:21:37 +070039#include "x86_64/assembler_x86_64.h"
Alex Light50fa9932015-08-10 15:30:07 -070040#endif
Vladimir Marko10ef6942015-10-22 15:25:54 +010041#include "base/casts.h"
Brian Carlstrom578bbdc2011-07-21 14:07:47 -070042#include "globals.h"
43#include "memory_region.h"
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070044
Carl Shapiro6b6b5f02011-06-21 15:05:09 -070045namespace art {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070046
Vladimir Marko93205e32016-04-13 11:59:46 +010047AssemblerBuffer::AssemblerBuffer(ArenaAllocator* arena)
48 : arena_(arena) {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070049 static const size_t kInitialBufferCapacity = 4 * KB;
Vladimir Marko93205e32016-04-13 11:59:46 +010050 contents_ = arena_->AllocArray<uint8_t>(kInitialBufferCapacity);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070051 cursor_ = contents_;
52 limit_ = ComputeLimit(contents_, kInitialBufferCapacity);
Mathieu Chartier2cebb242015-04-21 16:50:40 -070053 fixup_ = nullptr;
54 slow_path_ = nullptr;
Elliott Hughes31f1f4f2012-03-12 13:57:36 -070055#ifndef NDEBUG
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070056 has_ensured_capacity_ = false;
57 fixups_processed_ = false;
58#endif
59
60 // Verify internal state.
61 CHECK_EQ(Capacity(), kInitialBufferCapacity);
Elliott Hughes1f359b02011-07-17 14:27:17 -070062 CHECK_EQ(Size(), 0U);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070063}
64
65
66AssemblerBuffer::~AssemblerBuffer() {
Vladimir Marko93205e32016-04-13 11:59:46 +010067 if (arena_->IsRunningOnMemoryTool()) {
68 arena_->MakeInaccessible(contents_, Capacity());
69 }
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070070}
71
72
73void AssemblerBuffer::ProcessFixups(const MemoryRegion& region) {
74 AssemblerFixup* fixup = fixup_;
Mathieu Chartier2cebb242015-04-21 16:50:40 -070075 while (fixup != nullptr) {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070076 fixup->Process(region, fixup->position());
77 fixup = fixup->previous();
78 }
79}
80
81
82void AssemblerBuffer::FinalizeInstructions(const MemoryRegion& instructions) {
83 // Copy the instructions from the buffer.
84 MemoryRegion from(reinterpret_cast<void*>(contents()), Size());
85 instructions.CopyFrom(0, from);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070086 // Process fixups in the instructions.
87 ProcessFixups(instructions);
Elliott Hughes31f1f4f2012-03-12 13:57:36 -070088#ifndef NDEBUG
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070089 fixups_processed_ = true;
90#endif
91}
92
93
Vladimir Markocf93a5c2015-06-16 11:33:24 +000094void AssemblerBuffer::ExtendCapacity(size_t min_capacity) {
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070095 size_t old_size = Size();
96 size_t old_capacity = Capacity();
97 size_t new_capacity = std::min(old_capacity * 2, old_capacity + 1 * MB);
Vladimir Markocf93a5c2015-06-16 11:33:24 +000098 new_capacity = std::max(new_capacity, min_capacity);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -070099
100 // Allocate the new data area and copy contents of the old one to it.
Vladimir Marko93205e32016-04-13 11:59:46 +0100101 contents_ = reinterpret_cast<uint8_t*>(
102 arena_->Realloc(contents_, old_capacity, new_capacity, kArenaAllocAssembler));
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -0700103
104 // Update the cursor and recompute the limit.
Vladimir Marko93205e32016-04-13 11:59:46 +0100105 cursor_ = contents_ + old_size;
106 limit_ = ComputeLimit(contents_, new_capacity);
Carl Shapiroa5d5cfd2011-06-21 12:46:59 -0700107
108 // Verify internal state.
109 CHECK_EQ(Capacity(), new_capacity);
110 CHECK_EQ(Size(), old_size);
111}
112
David Srbeckydd973932015-04-07 20:29:48 +0100113void DebugFrameOpCodeWriterForAssembler::ImplicitlyAdvancePC() {
Vladimir Marko10ef6942015-10-22 15:25:54 +0100114 uint32_t pc = dchecked_integral_cast<uint32_t>(assembler_->CodeSize());
115 if (delay_emitting_advance_pc_) {
116 uint32_t stream_pos = dchecked_integral_cast<uint32_t>(opcodes_.size());
117 delayed_advance_pcs_.push_back(DelayedAdvancePC {stream_pos, pc});
118 } else {
119 AdvancePC(pc);
120 }
David Srbeckydd973932015-04-07 20:29:48 +0100121}
Ian Rogers2c8f6532011-09-02 17:16:34 -0700122
Vladimir Marko93205e32016-04-13 11:59:46 +0100123std::unique_ptr<Assembler> Assembler::Create(
124 ArenaAllocator* arena,
125 InstructionSet instruction_set,
126 const InstructionSetFeatures* instruction_set_features) {
jeffhao7fbee072012-08-24 17:56:54 -0700127 switch (instruction_set) {
Alex Light50fa9932015-08-10 15:30:07 -0700128#ifdef ART_ENABLE_CODEGEN_arm
jeffhao7fbee072012-08-24 17:56:54 -0700129 case kArm:
Vladimir Marko93205e32016-04-13 11:59:46 +0100130 return std::unique_ptr<Assembler>(new (arena) arm::Arm32Assembler(arena));
jeffhao7fbee072012-08-24 17:56:54 -0700131 case kThumb2:
Vladimir Marko93205e32016-04-13 11:59:46 +0100132 return std::unique_ptr<Assembler>(new (arena) arm::Thumb2Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700133#endif
134#ifdef ART_ENABLE_CODEGEN_arm64
Serban Constantinescued8dd492014-02-11 14:15:10 +0000135 case kArm64:
Vladimir Marko93205e32016-04-13 11:59:46 +0100136 return std::unique_ptr<Assembler>(new (arena) arm64::Arm64Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700137#endif
138#ifdef ART_ENABLE_CODEGEN_mips
jeffhao7fbee072012-08-24 17:56:54 -0700139 case kMips:
Vladimir Marko93205e32016-04-13 11:59:46 +0100140 return std::unique_ptr<Assembler>(new (arena) mips::MipsAssembler(
141 arena,
142 instruction_set_features != nullptr
143 ? instruction_set_features->AsMipsInstructionSetFeatures()
144 : nullptr));
Alex Light50fa9932015-08-10 15:30:07 -0700145#endif
146#ifdef ART_ENABLE_CODEGEN_mips64
Andreas Gampe57b34292015-01-14 15:45:59 -0800147 case kMips64:
Vladimir Marko93205e32016-04-13 11:59:46 +0100148 return std::unique_ptr<Assembler>(new (arena) mips64::Mips64Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700149#endif
150#ifdef ART_ENABLE_CODEGEN_x86
Dmitry Petrochenkofca82202014-03-21 11:21:37 +0700151 case kX86:
Vladimir Marko93205e32016-04-13 11:59:46 +0100152 return std::unique_ptr<Assembler>(new (arena) x86::X86Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700153#endif
154#ifdef ART_ENABLE_CODEGEN_x86_64
Dmitry Petrochenkofca82202014-03-21 11:21:37 +0700155 case kX86_64:
Vladimir Marko93205e32016-04-13 11:59:46 +0100156 return std::unique_ptr<Assembler>(new (arena) x86_64::X86_64Assembler(arena));
Alex Light50fa9932015-08-10 15:30:07 -0700157#endif
jeffhao7fbee072012-08-24 17:56:54 -0700158 default:
159 LOG(FATAL) << "Unknown InstructionSet: " << instruction_set;
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700160 return nullptr;
Ian Rogers2c8f6532011-09-02 17:16:34 -0700161 }
162}
163
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700164void Assembler::StoreImmediateToThread32(ThreadOffset<4> dest ATTRIBUTE_UNUSED,
165 uint32_t imm ATTRIBUTE_UNUSED,
166 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700167 UNIMPLEMENTED(FATAL);
168}
169
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700170void Assembler::StoreImmediateToThread64(ThreadOffset<8> dest ATTRIBUTE_UNUSED,
171 uint32_t imm ATTRIBUTE_UNUSED,
172 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700173 UNIMPLEMENTED(FATAL);
174}
175
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700176void Assembler::StoreStackOffsetToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
177 FrameOffset fr_offs ATTRIBUTE_UNUSED,
178 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700179 UNIMPLEMENTED(FATAL);
180}
181
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700182void Assembler::StoreStackOffsetToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
183 FrameOffset fr_offs ATTRIBUTE_UNUSED,
184 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700185 UNIMPLEMENTED(FATAL);
186}
187
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700188void Assembler::StoreStackPointerToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700189 UNIMPLEMENTED(FATAL);
190}
191
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700192void Assembler::StoreStackPointerToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700193 UNIMPLEMENTED(FATAL);
194}
195
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700196void Assembler::LoadFromThread32(ManagedRegister dest ATTRIBUTE_UNUSED,
197 ThreadOffset<4> src ATTRIBUTE_UNUSED,
198 size_t size ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700199 UNIMPLEMENTED(FATAL);
200}
201
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700202void Assembler::LoadFromThread64(ManagedRegister dest ATTRIBUTE_UNUSED,
203 ThreadOffset<8> src ATTRIBUTE_UNUSED,
204 size_t size ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700205 UNIMPLEMENTED(FATAL);
206}
207
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700208void Assembler::LoadRawPtrFromThread32(ManagedRegister dest ATTRIBUTE_UNUSED,
209 ThreadOffset<4> offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700210 UNIMPLEMENTED(FATAL);
211}
212
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700213void Assembler::LoadRawPtrFromThread64(ManagedRegister dest ATTRIBUTE_UNUSED,
214 ThreadOffset<8> offs ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700215 UNIMPLEMENTED(FATAL);
216}
217
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700218void Assembler::CopyRawPtrFromThread32(FrameOffset fr_offs ATTRIBUTE_UNUSED,
219 ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
220 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700221 UNIMPLEMENTED(FATAL);
222}
223
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700224void Assembler::CopyRawPtrFromThread64(FrameOffset fr_offs ATTRIBUTE_UNUSED,
225 ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
226 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700227 UNIMPLEMENTED(FATAL);
228}
229
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700230void Assembler::CopyRawPtrToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
231 FrameOffset fr_offs ATTRIBUTE_UNUSED,
232 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700233 UNIMPLEMENTED(FATAL);
234}
235
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700236void Assembler::CopyRawPtrToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
237 FrameOffset fr_offs ATTRIBUTE_UNUSED,
238 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700239 UNIMPLEMENTED(FATAL);
240}
241
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700242void Assembler::CallFromThread32(ThreadOffset<4> offset ATTRIBUTE_UNUSED,
243 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700244 UNIMPLEMENTED(FATAL);
245}
246
Ian Rogers6a3c1fc2014-10-31 00:33:20 -0700247void Assembler::CallFromThread64(ThreadOffset<8> offset ATTRIBUTE_UNUSED,
248 ManagedRegister scratch ATTRIBUTE_UNUSED) {
Ian Rogersdd7624d2014-03-14 17:43:00 -0700249 UNIMPLEMENTED(FATAL);
250}
251
Carl Shapiro6b6b5f02011-06-21 15:05:09 -0700252} // namespace art