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LeafOS / LeafOS-Project / android_art / 6324e2174e60e951f4e7dab22dc65bafd730e097 / . / src / compiler / dataflow.cc
blob: 7505f6c15a6c062e942d906d0d233888b7a3d305 [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
buzbeeeaf09bc2012-11-15 14:51:41 -0800[diff] [blame]17#include "compiler_internals.h"
buzbeeefc63692012-11-14 16:31:52 -0800[diff] [blame]18#include "dataflow.h"
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]19#include "bb_opt.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]20
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]21namespace art {
22
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]23/*
24 * Main table containing data flow attributes for each bytecode. The
25 * first kNumPackedOpcodes entries are for Dalvik bytecode
26 * instructions, where extended opcode at the MIR level are appended
27 * afterwards.
28 *
29 * TODO - many optimization flags are incomplete - they will only limit the
30 * scope of optimizations but will not cause mis-optimizations.
31 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]32const int oat_data_flow_attributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]33 // 00 NOP
34 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]35
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]36 // 01 MOVE vA, vB
37 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]38
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]39 // 02 MOVE_FROM16 vAA, vBBBB
40 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]41
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]42 // 03 MOVE_16 vAAAA, vBBBB
43 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]44
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]45 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]46 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]47
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]48 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]49 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]50
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]51 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]52 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]53
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]54 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]55 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]56
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]57 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]58 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]59
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]60 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]61 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]62
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]63 // 0A MOVE_RESULT vAA
64 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]65
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]66 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]67 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]68
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]69 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]70 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]71
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]72 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]73 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]74
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]75 // 0E RETURN_VOID
76 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]77
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]78 // 0F RETURN vAA
79 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]80
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]81 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]82 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]83
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]84 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]85 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]86
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]87 // 12 CONST_4 vA, #+B
88 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]89
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]90 // 13 CONST_16 vAA, #+BBBB
91 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]92
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]93 // 14 CONST vAA, #+BBBBBBBB
94 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]95
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]96 // 15 CONST_HIGH16 VAA, #+BBBB0000
97 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]98
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]99 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]100 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]101
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]102 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]103 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]104
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]105 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]106 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]107
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]108 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]109 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]110
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]111 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]112 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]113
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]114 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]115 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]116
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]117 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]118 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]119
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]120 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]121 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]122
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]123 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]124 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]125
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]126 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]127 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]128
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]129 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]130 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]131
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]132 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]133 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]134
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]135 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]136 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]137
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]138 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]139 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]140
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]141 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
142 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]143
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]144 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
145 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]146
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]147 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]148 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]149
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]150 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]151 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]152
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]153 // 28 GOTO
154 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]155
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]156 // 29 GOTO_16
157 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]158
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]159 // 2A GOTO_32
160 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]161
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]162 // 2B PACKED_SWITCH vAA, +BBBBBBBB
163 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]164
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]165 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
166 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]167
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]168 // 2D CMPL_FLOAT vAA, vBB, vCC
169 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]170
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]171 // 2E CMPG_FLOAT vAA, vBB, vCC
172 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]173
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]174 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]175 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]176
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]177 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]178 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]179
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]180 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]181 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]182
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]183 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]184 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]185
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]186 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]187 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]188
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]189 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]190 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]191
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]192 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]193 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]194
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]195 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]196 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]197
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]198 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]199 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]200
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]201 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]202 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]203
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]204 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]205 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]206
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]207 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]208 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]209
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]210 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]211 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]212
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]213 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]214 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]215
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]216 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]217 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]218
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]219 // 3E UNUSED_3E
220 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]221
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]222 // 3F UNUSED_3F
223 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]224
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]225 // 40 UNUSED_40
226 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]227
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]228 // 41 UNUSED_41
229 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]230
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]231 // 42 UNUSED_42
232 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]233
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]234 // 43 UNUSED_43
235 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]236
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]237 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]238 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]239
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]240 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]241 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]242
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]243 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]244 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]245
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]246 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]247 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]248
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]249 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]250 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]251
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]252 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]253 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]254
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]255 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]256 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]257
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]258 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]259 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]260
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]261 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]262 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]263
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]264 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]265 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]266
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]267 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]268 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]269
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]270 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]271 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]272
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]273 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]274 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]275
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]276 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]277 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]278
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]279 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]280 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]281
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]282 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]283 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]284
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]285 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]286 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]287
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]288 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]289 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]290
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]291 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]292 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]293
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]294 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]295 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]296
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]297 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]298 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]299
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]300 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]301 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]302
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]303 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]304 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]305
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]306 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]307 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]308
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]309 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]310 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]311
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]312 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]313 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]314
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]315 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]316 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]317
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]318 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]319 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]320
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]321 // 60 SGET vAA, field@BBBB
322 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]323
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]324 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]325 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]326
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]327 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]328 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]329
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]330 // 63 SGET_BOOLEAN vAA, field@BBBB
331 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]332
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]333 // 64 SGET_BYTE vAA, field@BBBB
334 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]335
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]336 // 65 SGET_CHAR vAA, field@BBBB
337 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]338
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]339 // 66 SGET_SHORT vAA, field@BBBB
340 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]341
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]342 // 67 SPUT vAA, field@BBBB
343 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]344
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]345 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]346 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]347
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]348 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]349 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]350
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]351 // 6A SPUT_BOOLEAN vAA, field@BBBB
352 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]353
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]354 // 6B SPUT_BYTE vAA, field@BBBB
355 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]356
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]357 // 6C SPUT_CHAR vAA, field@BBBB
358 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]359
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]360 // 6D SPUT_SHORT vAA, field@BBBB
361 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]362
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]363 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
364 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]365
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]366 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
367 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]368
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]369 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
370 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]371
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]372 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
373 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]374
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]375 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
376 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]377
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]378 // 73 UNUSED_73
379 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]380
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]381 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
382 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]383
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]384 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
385 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]386
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]387 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
388 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]389
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]390 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
391 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]392
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]393 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
394 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]395
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]396 // 79 UNUSED_79
397 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]398
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]399 // 7A UNUSED_7A
400 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]401
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]402 // 7B NEG_INT vA, vB
403 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]404
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]405 // 7C NOT_INT vA, vB
406 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]407
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]408 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]409 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]410
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]411 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]412 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]413
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]414 // 7F NEG_FLOAT vA, vB
415 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]416
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]417 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]418 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]419
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]420 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]421 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]422
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]423 // 82 INT_TO_FLOAT vA, vB
424 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]425
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]426 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]427 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]428
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]429 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]430 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]431
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]432 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]433 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]434
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]435 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]436 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]437
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]438 // 87 FLOAT_TO_INT vA, vB
439 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]440
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]441 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]442 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]443
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]444 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]445 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]446
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]447 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]448 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]449
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]450 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]451 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]452
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]453 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]454 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]455
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]456 // 8D INT_TO_BYTE vA, vB
457 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]458
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]459 // 8E INT_TO_CHAR vA, vB
460 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]461
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]462 // 8F INT_TO_SHORT vA, vB
463 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]464
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]465 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]466 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]467
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]468 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]469 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]470
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]471 // 92 MUL_INT vAA, vBB, vCC
472 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]473
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]474 // 93 DIV_INT vAA, vBB, vCC
475 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]476
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]477 // 94 REM_INT vAA, vBB, vCC
478 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]479
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]480 // 95 AND_INT vAA, vBB, vCC
481 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]482
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]483 // 96 OR_INT vAA, vBB, vCC
484 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]485
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]486 // 97 XOR_INT vAA, vBB, vCC
487 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]488
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]489 // 98 SHL_INT vAA, vBB, vCC
490 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]491
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]492 // 99 SHR_INT vAA, vBB, vCC
493 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]494
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]495 // 9A USHR_INT vAA, vBB, vCC
496 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]497
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]498 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]499 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]500
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]501 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]502 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]503
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]504 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]505 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]506
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]507 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]508 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]509
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]510 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]511 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]512
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]513 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]514 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]515
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]516 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]517 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]518
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]519 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]520 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]521
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]522 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]523 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]524
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]525 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]526 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]527
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]528 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]529 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]530
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]531 // A6 ADD_FLOAT vAA, vBB, vCC
532 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]533
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]534 // A7 SUB_FLOAT vAA, vBB, vCC
535 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]536
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]537 // A8 MUL_FLOAT vAA, vBB, vCC
538 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]539
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]540 // A9 DIV_FLOAT vAA, vBB, vCC
541 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]542
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]543 // AA REM_FLOAT vAA, vBB, vCC
544 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]545
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]546 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]547 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]548
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]549 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]550 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]551
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]552 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]553 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]554
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]555 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]556 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]557
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]558 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]559 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]560
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]561 // B0 ADD_INT_2ADDR vA, vB
562 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]563
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]564 // B1 SUB_INT_2ADDR vA, vB
565 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]566
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]567 // B2 MUL_INT_2ADDR vA, vB
568 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]569
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]570 // B3 DIV_INT_2ADDR vA, vB
571 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]572
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]573 // B4 REM_INT_2ADDR vA, vB
574 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]575
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]576 // B5 AND_INT_2ADDR vA, vB
577 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]578
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]579 // B6 OR_INT_2ADDR vA, vB
580 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]581
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]582 // B7 XOR_INT_2ADDR vA, vB
583 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]584
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]585 // B8 SHL_INT_2ADDR vA, vB
586 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]587
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]588 // B9 SHR_INT_2ADDR vA, vB
589 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]590
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]591 // BA USHR_INT_2ADDR vA, vB
592 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]593
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]594 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]595 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]596
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]597 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]598 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]599
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]600 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]601 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]602
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]603 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]604 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]605
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]606 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]607 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]608
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]609 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]610 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]611
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]612 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]613 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]614
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]615 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]616 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]617
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]618 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]619 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]620
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]621 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]622 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]623
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]624 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]625 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]626
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]627 // C6 ADD_FLOAT_2ADDR vA, vB
628 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]629
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]630 // C7 SUB_FLOAT_2ADDR vA, vB
631 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]632
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]633 // C8 MUL_FLOAT_2ADDR vA, vB
634 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]635
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]636 // C9 DIV_FLOAT_2ADDR vA, vB
637 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]638
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]639 // CA REM_FLOAT_2ADDR vA, vB
640 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]641
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]642 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]643 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]644
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]645 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]646 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]647
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]648 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]649 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]650
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]651 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]652 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]653
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]654 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]655 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]656
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]657 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
658 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]659
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]660 // D1 RSUB_INT vA, vB, #+CCCC
661 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]662
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]663 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
664 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]665
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]666 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
667 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]668
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]669 // D4 REM_INT_LIT16 vA, vB, #+CCCC
670 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]671
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]672 // D5 AND_INT_LIT16 vA, vB, #+CCCC
673 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]674
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]675 // D6 OR_INT_LIT16 vA, vB, #+CCCC
676 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]677
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]678 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
679 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]680
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]681 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]682 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]683
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]684 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
685 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]686
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]687 // DA MUL_INT_LIT8 vAA, vBB, #+CC
688 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]689
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]690 // DB DIV_INT_LIT8 vAA, vBB, #+CC
691 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]692
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]693 // DC REM_INT_LIT8 vAA, vBB, #+CC
694 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]695
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]696 // DD AND_INT_LIT8 vAA, vBB, #+CC
697 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]698
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]699 // DE OR_INT_LIT8 vAA, vBB, #+CC
700 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]701
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]702 // DF XOR_INT_LIT8 vAA, vBB, #+CC
703 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]704
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]705 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
706 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]707
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]708 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
709 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]710
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]711 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
712 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]713
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]714 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]715 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]716
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]717 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]718 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]719
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]720 // E5 SGET_VOLATILE
721 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]722
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]723 // E6 SPUT_VOLATILE
724 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]725
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]726 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]727 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]728
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]729 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]730 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]731
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]732 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]733 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]734
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]735 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]736 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]737
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]738 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]739 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]740
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]741 // EC BREAKPOINT
742 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]743
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]744 // ED THROW_VERIFICATION_ERROR
745 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]746
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]747 // EE EXECUTE_INLINE
748 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]749
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]750 // EF EXECUTE_INLINE_RANGE
751 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]752
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]753 // F0 INVOKE_OBJECT_INIT_RANGE
754 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]755
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]756 // F1 RETURN_VOID_BARRIER
757 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]758
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]759 // F2 IGET_QUICK
760 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]761
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]762 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]763 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]764
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]765 // F4 IGET_OBJECT_QUICK
766 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]767
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]768 // F5 IPUT_QUICK
769 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]770
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]771 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]772 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]773
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]774 // F7 IPUT_OBJECT_QUICK
775 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]776
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]777 // F8 INVOKE_VIRTUAL_QUICK
778 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]779
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]780 // F9 INVOKE_VIRTUAL_QUICK_RANGE
781 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]782
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]783 // FA INVOKE_SUPER_QUICK
784 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]785
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]786 // FB INVOKE_SUPER_QUICK_RANGE
787 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]788
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]789 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]790 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]791
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]792 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]793 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]794
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]795 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]796 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]797
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]798 // FF UNUSED_FF
799 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]800
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]801 // Beginning of extended MIR opcodes
802 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]803 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]804
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]805 // 101 MIR_COPY
806 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]807
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]808 // 102 MIR_FUSED_CMPL_FLOAT
809 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]810
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]811 // 103 MIR_FUSED_CMPG_FLOAT
812 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]813
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]814 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]815 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]816
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]817 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]818 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]819
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]820 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]821 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]822
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]823 // 107 MIR_NOP
824 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]825
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]826 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]827 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]828
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]829 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]830 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]831
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]832 // 110 MIR_DIV_ZERO_CHECK
833 0,
834
835 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]836 0,
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]837
838 // 112 MIR_CHECKPART2
839 0,
840
841 // 113 MIR_SELECT
842 DF_DA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]843};
844
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]845/* Return the base virtual register for a SSA name */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]846int SRegToVReg(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]847{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]848 DCHECK_LT(ssa_reg, static_cast<int>(cu->ssa_base_vregs->num_used));
849 return GET_ELEM_N(cu->ssa_base_vregs, int, ssa_reg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]850}
851
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]852int SRegToSubscript(const CompilationUnit* cu, int ssa_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]853{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]854 DCHECK(ssa_reg < static_cast<int>(cu->ssa_subscripts->num_used));
855 return GET_ELEM_N(cu->ssa_subscripts, int, ssa_reg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]856}
857
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]858static int GetSSAUseCount(CompilationUnit* cu, int s_reg)
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]859{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]860 DCHECK(s_reg < static_cast<int>(cu->raw_use_counts.num_used));
861 return cu->raw_use_counts.elem_list[s_reg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]862}
863
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]864static std::string GetSSAName(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]865{
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]866 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
867}
868
869// Similar to GetSSAName, but if ssa name represents an immediate show that as well.
870static std::string GetSSANameWithConst(const CompilationUnit* cu, int ssa_reg, bool singles_only)
871{
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]872 if (cu->reg_location == NULL) {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]873 // Pre-SSA - just use the standard name
874 return GetSSAName(cu, ssa_reg);
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]875 }
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]876 if (IsConst(cu, cu->reg_location[ssa_reg])) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]877 if (!singles_only && cu->reg_location[ssa_reg].wide) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]878 return StringPrintf("v%d_%d#0x%llx", SRegToVReg(cu, ssa_reg),
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]879 SRegToSubscript(cu, ssa_reg),
880 ConstantValueWide(cu, cu->reg_location[ssa_reg]));
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]881 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]882 return StringPrintf("v%d_%d#0x%x", SRegToVReg(cu, ssa_reg),
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]883 SRegToSubscript(cu, ssa_reg),
884 ConstantValue(cu, cu->reg_location[ssa_reg]));
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]885 }
886 } else {
887 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
888 }
889}
890
891
892char* GetDalvikDisassembly(CompilationUnit* cu, const MIR* mir)
893{
894 DecodedInstruction insn = mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]895 std::string str;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]896 int flags = 0;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]897 int opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]898 char* ret;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]899 bool nop = false;
900 SSARepresentation* ssa_rep = mir->ssa_rep;
901 Instruction::Format dalvik_format = Instruction::k10x; // Default to no-operand format
902 int defs = (ssa_rep != NULL) ? ssa_rep->num_defs : 0;
903 int uses = (ssa_rep != NULL) ? ssa_rep->num_uses : 0;
904
905 // Handle special cases.
906 if ((opcode == kMirOpCheck) || (opcode == kMirOpCheckPart2)) {
907 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
908 str.append(": ");
909 // Recover the original Dex instruction
910 insn = mir->meta.throw_insn->dalvikInsn;
911 ssa_rep = mir->meta.throw_insn->ssa_rep;
912 defs = ssa_rep->num_defs;
913 uses = ssa_rep->num_uses;
914 opcode = insn.opcode;
915 } else if (opcode == kMirOpNop) {
916 str.append("[");
917 insn.opcode = mir->meta.original_opcode;
918 opcode = mir->meta.original_opcode;
919 nop = true;
920 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]921
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]922 if (opcode >= kMirOpFirst) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]923 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]924 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]925 dalvik_format = Instruction::FormatOf(insn.opcode);
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]926 flags = Instruction::FlagsOf(insn.opcode);
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]927 str.append(Instruction::Name(insn.opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]928 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]929
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]930 if (opcode == kMirOpPhi) {
931 int* incoming = reinterpret_cast<int*>(insn.vB);
932 str.append(StringPrintf(" %s = (%s",
933 GetSSANameWithConst(cu, ssa_rep->defs[0], true).c_str(),
934 GetSSANameWithConst(cu, ssa_rep->uses[0], true).c_str()));
935 str.append(StringPrintf(":%d",incoming[0]));
936 int i;
937 for (i = 1; i < uses; i++) {
938 str.append(StringPrintf(", %s:%d",
939 GetSSANameWithConst(cu, ssa_rep->uses[i], true).c_str(),
940 incoming[i]));
941 }
942 str.append(")");
943 } else if (flags & Instruction::kBranch) {
944 // For branches, decode the instructions to print out the branch targets.
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]945 int offset = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]946 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]947 case Instruction::k21t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]948 str.append(StringPrintf(" %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]949 offset = insn.vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]950 break;
951 case Instruction::k22t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]952 str.append(StringPrintf(" %s, %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str(),
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]953 GetSSANameWithConst(cu, ssa_rep->uses[1], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]954 offset = insn.vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]955 break;
956 case Instruction::k10t:
957 case Instruction::k20t:
958 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]959 offset = insn.vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]960 break;
961 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]962 LOG(FATAL) << "Unexpected branch format " << dalvik_format << " from " << insn.opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]963 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]964 str.append(StringPrintf(" 0x%x (%c%x)", mir->offset + offset,
965 offset > 0 ? '+' : '-', offset > 0 ? offset : -offset));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]966 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]967 // For invokes-style formats, treat wide regs as a pair of singles
968 bool show_singles = ((dalvik_format == Instruction::k35c) ||
969 (dalvik_format == Instruction::k3rc));
970 if (defs != 0) {
971 str.append(StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->defs[0], false).c_str()));
972 if (uses != 0) {
973 str.append(", ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]974 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]975 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]976 for (int i = 0; i < uses; i++) {
977 str.append(
978 StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->uses[i], show_singles).c_str()));
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]979 if (!show_singles && (cu->reg_location != NULL) && cu->reg_location[i].wide) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]980 // For the listing, skip the high sreg.
981 i++;
982 }
983 if (i != (uses -1)) {
984 str.append(",");
985 }
986 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]987 switch (dalvik_format) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]988 case Instruction::k11n: // Add one immediate from vB
989 case Instruction::k21s:
990 case Instruction::k31i:
991 case Instruction::k21h:
992 str.append(StringPrintf(", #%d", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]993 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]994 case Instruction::k51l: // Add one wide immediate
995 str.append(StringPrintf(", #%lld", insn.vB_wide));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]996 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]997 case Instruction::k21c: // One register, one string/type/method index
998 case Instruction::k31c:
999 str.append(StringPrintf(", index #%d", insn.vB));
1000 break;
1001 case Instruction::k22c: // Two registers, one string/type/method index
1002 str.append(StringPrintf(", index #%d", insn.vC));
1003 break;
1004 case Instruction::k22s: // Add one immediate from vC
1005 case Instruction::k22b:
1006 str.append(StringPrintf(", #%d", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1007 break;
1008 default:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1009 ; // Nothing left to print
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1010 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1011 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1012 if (nop) {
1013 str.append("]--optimized away");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1014 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1015 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1016 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1017 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1018 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1019}
1020
1021/* Any register that is used before being defined is considered live-in */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1022static void HandleLiveInUse(CompilationUnit* cu, ArenaBitVector* use_v, ArenaBitVector* def_v,
1023 ArenaBitVector* live_in_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1024{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1025 SetBit(cu, use_v, dalvik_reg_id);
1026 if (!IsBitSet(def_v, dalvik_reg_id)) {
1027 SetBit(cu, live_in_v, dalvik_reg_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1028 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1029}
1030
1031/* Mark a reg as being defined */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1032static void HandleDef(CompilationUnit* cu, ArenaBitVector* def_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1033{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1034 SetBit(cu, def_v, dalvik_reg_id);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1035}
1036
1037/*
1038 * Find out live-in variables for natural loops. Variables that are live-in in
1039 * the main loop body are considered to be defined in the entry block.
1040 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1041bool FindLocalLiveIn(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1042{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1043 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1044 ArenaBitVector *use_v, *def_v, *live_in_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1045
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1046 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1047
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1048 use_v = bb->data_flow_info->use_v =
1049 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapUse);
1050 def_v = bb->data_flow_info->def_v =
1051 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapDef);
1052 live_in_v = bb->data_flow_info->live_in_v =
1053 AllocBitVector(cu, cu->num_dalvik_registers, false,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1054 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1055
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1056 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1057 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1058 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1059
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1060 if (df_attributes & DF_HAS_USES) {
1061 if (df_attributes & DF_UA) {
1062 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA);
1063 if (df_attributes & DF_A_WIDE) {
1064 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1065 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1066 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1067 if (df_attributes & DF_UB) {
1068 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB);
1069 if (df_attributes & DF_B_WIDE) {
1070 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1071 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1072 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1073 if (df_attributes & DF_UC) {
1074 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC);
1075 if (df_attributes & DF_C_WIDE) {
1076 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1077 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1078 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1079 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1080 if (df_attributes & DF_FORMAT_35C) {
1081 for (unsigned int i = 0; i < d_insn->vA; i++) {
1082 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->arg[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1083 }
1084 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1085 if (df_attributes & DF_FORMAT_3RC) {
1086 for (unsigned int i = 0; i < d_insn->vA; i++) {
1087 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1088 }
1089 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1090 if (df_attributes & DF_HAS_DEFS) {
1091 HandleDef(cu, def_v, d_insn->vA);
1092 if (df_attributes & DF_A_WIDE) {
1093 HandleDef(cu, def_v, d_insn->vA+1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1094 }
1095 }
1096 }
1097 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1098}
1099
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1100static int AddNewSReg(CompilationUnit* cu, int v_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1101{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1102 // Compiler temps always have a subscript of 0
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1103 int subscript = (v_reg < 0) ? 0 : ++cu->ssa_last_defs[v_reg];
1104 int ssa_reg = cu->num_ssa_regs++;
1105 InsertGrowableList(cu, cu->ssa_base_vregs, v_reg);
1106 InsertGrowableList(cu, cu->ssa_subscripts, subscript);
1107 std::string ssa_name = GetSSAName(cu, ssa_reg);
1108 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, false, kAllocDFInfo));
1109 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1110 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
1111 DCHECK_EQ(cu->ssa_base_vregs->num_used, cu->ssa_subscripts->num_used);
1112 return ssa_reg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1113}
1114
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1115/* Find out the latest SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1116static void HandleSSAUse(CompilationUnit* cu, int* uses, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1117{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1118 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1119 uses[reg_index] = cu->vreg_to_ssa_map[dalvik_reg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1120}
1121
1122/* Setup a new SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1123static void HandleSSADef(CompilationUnit* cu, int* defs, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1124{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1125 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1126 int ssa_reg = AddNewSReg(cu, dalvik_reg);
1127 cu->vreg_to_ssa_map[dalvik_reg] = ssa_reg;
1128 defs[reg_index] = ssa_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1129}
1130
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1131/* Look up new SSA names for format_35c instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1132static void DataFlowSSAFormat35C(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1133{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1134 DecodedInstruction *d_insn = &mir->dalvikInsn;
1135 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1136 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1137
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1138 mir->ssa_rep->num_uses = num_uses;
1139 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1140 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1141 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1142 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1143
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1144 for (i = 0; i < num_uses; i++) {
1145 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->arg[i], i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1146 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1147}
1148
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1149/* Look up new SSA names for format_3rc instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1150static void DataFlowSSAFormat3RC(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1151{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1152 DecodedInstruction *d_insn = &mir->dalvikInsn;
1153 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1154 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1155
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1156 mir->ssa_rep->num_uses = num_uses;
1157 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1158 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1159 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1160 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1161
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1162 for (i = 0; i < num_uses; i++) {
1163 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+i, i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1164 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1165}
1166
1167/* Entry function to convert a block into SSA representation */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1168bool DoSSAConversion(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1169{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1170 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1171
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1172 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1173
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1174 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1175 mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1176 true, kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1177
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1178 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1179
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1180 // If not a pseudo-op, note non-leaf or can throw
1181 if (static_cast<int>(mir->dalvikInsn.opcode) <
1182 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1183 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1184
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1185 if (flags & Instruction::kThrow) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1186 cu->attrs &= ~METHOD_IS_THROW_FREE;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1187 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1188
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1189 if (flags & Instruction::kInvoke) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1190 cu->attrs &= ~METHOD_IS_LEAF;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1191 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1192 }
1193
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1194 int num_uses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1195
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1196 if (df_attributes & DF_FORMAT_35C) {
1197 DataFlowSSAFormat35C(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1198 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1199 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1200
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1201 if (df_attributes & DF_FORMAT_3RC) {
1202 DataFlowSSAFormat3RC(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1203 continue;
1204 }
1205
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1206 if (df_attributes & DF_HAS_USES) {
1207 if (df_attributes & DF_UA) {
1208 num_uses++;
1209 if (df_attributes & DF_A_WIDE) {
1210 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1211 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1212 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1213 if (df_attributes & DF_UB) {
1214 num_uses++;
1215 if (df_attributes & DF_B_WIDE) {
1216 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1217 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1218 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1219 if (df_attributes & DF_UC) {
1220 num_uses++;
1221 if (df_attributes & DF_C_WIDE) {
1222 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1223 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1224 }
1225 }
1226
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1227 if (num_uses) {
1228 mir->ssa_rep->num_uses = num_uses;
1229 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1230 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1231 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1232 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1233 }
1234
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1235 int num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1236
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1237 if (df_attributes & DF_HAS_DEFS) {
1238 num_defs++;
1239 if (df_attributes & DF_A_WIDE) {
1240 num_defs++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1241 }
1242 }
1243
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1244 if (num_defs) {
1245 mir->ssa_rep->num_defs = num_defs;
1246 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1247 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1248 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1249 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1250 }
1251
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1252 DecodedInstruction *d_insn = &mir->dalvikInsn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1253
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1254 if (df_attributes & DF_HAS_USES) {
1255 num_uses = 0;
1256 if (df_attributes & DF_UA) {
1257 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1258 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA, num_uses++);
1259 if (df_attributes & DF_A_WIDE) {
1260 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1261 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1262 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1263 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1264 if (df_attributes & DF_UB) {
1265 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1266 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB, num_uses++);
1267 if (df_attributes & DF_B_WIDE) {
1268 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1269 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1270 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1271 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1272 if (df_attributes & DF_UC) {
1273 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1274 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC, num_uses++);
1275 if (df_attributes & DF_C_WIDE) {
1276 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1277 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1278 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1279 }
1280 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1281 if (df_attributes & DF_HAS_DEFS) {
1282 mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A;
1283 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA, 0);
1284 if (df_attributes & DF_A_WIDE) {
1285 mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A;
1286 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA+1, 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1287 }
1288 }
1289 }
1290
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1291 if (!cu->disable_dataflow) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1292 /*
1293 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1294 * input to PHI nodes can be derived from the snapshot of all
1295 * predecessor blocks.
1296 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1297 bb->data_flow_info->vreg_to_ssa_map =
1298 static_cast<int*>(NewMem(cu, sizeof(int) * cu->num_dalvik_registers, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1299 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1300
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1301 memcpy(bb->data_flow_info->vreg_to_ssa_map, cu->vreg_to_ssa_map,
1302 sizeof(int) * cu->num_dalvik_registers);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1303 }
1304 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1305}
1306
1307/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1308static void SetConstant(CompilationUnit* cu, int32_t ssa_reg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1309{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1310 SetBit(cu, cu->is_constant_v, ssa_reg);
1311 cu->constant_values[ssa_reg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1312}
1313
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1314static void SetConstantWide(CompilationUnit* cu, int ssa_reg, int64_t value)
1315{
1316 SetBit(cu, cu->is_constant_v, ssa_reg);
1317 cu->constant_values[ssa_reg] = Low32Bits(value);
1318 cu->constant_values[ssa_reg + 1] = High32Bits(value);
1319}
1320
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1321bool DoConstantPropogation(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1322{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1323 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1324 ArenaBitVector *is_constant_v = cu->is_constant_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1325
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1326 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1327 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1328
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1329 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1330
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1331 if (!(df_attributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1332
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1333 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1334 if (df_attributes & DF_SETS_CONST) {
1335 if (df_attributes & DF_DA) {
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1336 int32_t vB = static_cast<int32_t>(d_insn->vB);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1337 switch (d_insn->opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1338 case Instruction::CONST_4:
1339 case Instruction::CONST_16:
1340 case Instruction::CONST:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1341 SetConstant(cu, mir->ssa_rep->defs[0], vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1342 break;
1343 case Instruction::CONST_HIGH16:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1344 SetConstant(cu, mir->ssa_rep->defs[0], vB << 16);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1345 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1346 case Instruction::CONST_WIDE_16:
1347 case Instruction::CONST_WIDE_32:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1348 SetConstantWide(cu, mir->ssa_rep->defs[0], static_cast<int64_t>(vB));
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1349 break;
1350 case Instruction::CONST_WIDE:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1351 SetConstantWide(cu, mir->ssa_rep->defs[0],d_insn->vB_wide);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1352 break;
1353 case Instruction::CONST_WIDE_HIGH16:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1354 SetConstantWide(cu, mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1355 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1356 default:
1357 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1358 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1359 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1360 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1361 } else if (df_attributes & DF_IS_MOVE) {
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1362 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1363
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1364 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
1365 if (!IsBitSet(is_constant_v, mir->ssa_rep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1366 }
1367 /* Move a register holding a constant to another register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1368 if (i == mir->ssa_rep->num_uses) {
1369 SetConstant(cu, mir->ssa_rep->defs[0],
1370 cu->constant_values[mir->ssa_rep->uses[0]]);
1371 if (df_attributes & DF_A_WIDE) {
1372 SetConstant(cu, mir->ssa_rep->defs[1],
1373 cu->constant_values[mir->ssa_rep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1374 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1375 }
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1376 } else if (df_attributes & DF_NULL_TRANSFER_N) {
1377 /*
1378 * Mark const sregs that appear in merges. Need to flush those to home location.
1379 * TUNING: instead of flushing on def, we could insert a flush on the appropriate
1380 * edge[s].
1381 */
1382 DCHECK_EQ(static_cast<int32_t>(d_insn->opcode), kMirOpPhi);
1383 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
1384 if (IsConst(cu, mir->ssa_rep->uses[i])) {
1385 SetBit(cu, cu->must_flush_constant_v, mir->ssa_rep->uses[i]);
1386 }
1387 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1388 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1389 }
1390 /* TODO: implement code to handle arithmetic operations */
1391 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1392}
1393
1394/* Setup the basic data structures for SSA conversion */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1395void CompilerInitializeSSAConversion(CompilationUnit* cu)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1396{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1397 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1398 int num_dalvik_reg = cu->num_dalvik_registers;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1399
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1400 cu->ssa_base_vregs =
1401 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1402 cu->ssa_subscripts =
1403 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1404 cu->ssa_strings =
1405 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1406 // Create the ssa mappings, estimating the max size
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1407 CompilerInitGrowableList(cu, cu->ssa_base_vregs,
1408 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1409 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1410 CompilerInitGrowableList(cu, cu->ssa_subscripts,
1411 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1412 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1413 CompilerInitGrowableList(cu, cu->ssa_strings,
1414 num_dalvik_reg + cu->def_count + 128,
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1415 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1416 /*
1417 * Initial number of SSA registers is equal to the number of Dalvik
1418 * registers.
1419 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1420 cu->num_ssa_regs = num_dalvik_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1421
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1422 /*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1423 * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1424 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1425 * into "(0 << 16) | i"
1426 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1427 for (i = 0; i < num_dalvik_reg; i++) {
1428 InsertGrowableList(cu, cu->ssa_base_vregs, i);
1429 InsertGrowableList(cu, cu->ssa_subscripts, 0);
1430 std::string ssa_name = GetSSAName(cu, i);
1431 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, true, kAllocDFInfo));
1432 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1433 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1434 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1435
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1436 /*
1437 * Initialize the DalvikToSSAMap map. There is one entry for each
1438 * Dalvik register, and the SSA names for those are the same.
1439 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1440 cu->vreg_to_ssa_map =
1441 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1442 /* Keep track of the higest def for each dalvik reg */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1443 cu->ssa_last_defs =
1444 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1445
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1446 for (i = 0; i < num_dalvik_reg; i++) {
1447 cu->vreg_to_ssa_map[i] = i;
1448 cu->ssa_last_defs[i] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1449 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1450
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1451 /* Add ssa reg for Method* */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1452 cu->method_sreg = AddNewSReg(cu, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1453
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1454 /*
1455 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1456 */
1457 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1458
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1459 GrowableListIteratorInit(&cu->block_list, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1460
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1461 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1462 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1463 if (bb == NULL) break;
1464 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1465 if (bb->block_type == kDalvikByteCode ||
1466 bb->block_type == kEntryBlock ||
1467 bb->block_type == kExitBlock) {
1468 bb->data_flow_info = static_cast<BasicBlockDataFlow*>(NewMem(cu, sizeof(BasicBlockDataFlow),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1469 true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1470 }
1471 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1472}
1473
1474/* Clear the visited flag for each BB */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1475bool ClearVisitedFlag(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1476{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1477 bb->visited = false;
1478 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1479}
1480
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1481void DataFlowAnalysisDispatcher(CompilationUnit* cu,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1482 bool (*func)(CompilationUnit*, BasicBlock*),
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1483 DataFlowAnalysisMode dfa_mode,
1484 bool is_iterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1485{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1486 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1487
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1488 while (change) {
1489 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1490
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1491 switch (dfa_mode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1492 /* Scan all blocks and perform the operations specified in func */
1493 case kAllNodes:
1494 {
1495 GrowableListIterator iterator;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1496 GrowableListIteratorInit(&cu->block_list, &iterator);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1497 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1498 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1499 if (bb == NULL) break;
1500 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1501 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1502 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1503 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1504 break;
1505 /* Scan reachable blocks and perform the ops specified in func. */
1506 case kReachableNodes:
1507 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1508 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1509 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1510 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1511
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1512 for (idx = 0; idx < num_reachable_blocks; idx++) {
1513 int block_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1514 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1515 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, block_idx));
1516 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1517 }
1518 }
1519 break;
1520
1521 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1522 case kPreOrderDFSTraversal:
1523 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1524 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1525 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1526 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1527
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1528 for (idx = 0; idx < num_reachable_blocks; idx++) {
1529 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1530 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1531 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, dfs_idx));
1532 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1533 }
1534 }
1535 break;
1536 /* Scan reachable blocks post-order dfs and invoke func on each. */
1537 case kPostOrderDFSTraversal:
1538 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1539 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1540 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1541 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1542
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1543 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1544 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1545 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1546 reinterpret_cast<BasicBlock *>( GrowableListGetElement(block_list, dfs_idx));
1547 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1548 }
1549 }
1550 break;
1551 /* Scan reachable post-order dom tree and invoke func on each. */
1552 case kPostOrderDOMTraversal:
1553 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1554 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1555 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1556 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1557
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1558 for (idx = 0; idx < num_reachable_blocks; idx++) {
1559 int dom_idx = cu->dom_post_order_traversal.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1560 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1561 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, dom_idx));
1562 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1563 }
1564 }
1565 break;
1566 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1567 case kReversePostOrderTraversal:
1568 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1569 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1570 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1571 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1572
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1573 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1574 int rev_idx = cu->dfs_post_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1575 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1576 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, rev_idx));
1577 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1578 }
1579 }
1580 break;
1581 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1582 LOG(FATAL) << "Unknown traversal mode: " << dfa_mode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1583 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1584 /* If is_iterative is false, exit the loop after the first iteration */
1585 change &= is_iterative;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1586 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1587}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1588
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1589/* Advance to next strictly dominated MIR node in an extended basic block */
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1590static MIR* AdvanceMIR(CompilationUnit* cu, BasicBlock** p_bb, MIR* mir)
1591{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1592 BasicBlock* bb = *p_bb;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1593 if (mir != NULL) {
1594 mir = mir->next;
1595 if (mir == NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1596 bb = bb->fall_through;
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1597 if ((bb == NULL) || Predecessors(bb) != 1) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1598 mir = NULL;
1599 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1600 *p_bb = bb;
1601 mir = bb->first_mir_insn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1602 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1603 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1604 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1605 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1606}
1607
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1608/*
1609 * To be used at an invoke mir. If the logically next mir node represents
1610 * a move-result, return it. Else, return NULL. If a move-result exists,
1611 * it is required to immediately follow the invoke with no intervening
1612 * opcodes or incoming arcs. However, if the result of the invoke is not
1613 * used, a move-result may not be present.
1614 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1615MIR* FindMoveResult(CompilationUnit* cu, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1616{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1617 BasicBlock* tbb = bb;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1618 mir = AdvanceMIR(cu, &tbb, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1619 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1620 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1621 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1622 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1623 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1624 break;
1625 }
1626 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1627 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1628 mir = NULL;
1629 } else {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1630 mir = AdvanceMIR(cu, &tbb, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1631 }
1632 }
1633 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1634}
1635
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1636static BasicBlock* NextDominatedBlock(CompilationUnit* cu, BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1637{
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1638 if (bb->block_type == kDead) {
1639 return NULL;
1640 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1641 DCHECK((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
1642 || (bb->block_type == kExitBlock));
1643 bb = bb->fall_through;
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1644 if (bb == NULL || (Predecessors(bb) != 1)) {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1645 return NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1646 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1647 DCHECK((bb->block_type == kDalvikByteCode) || (bb->block_type == kExitBlock));
1648 return bb;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1649}
1650
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1651static MIR* FindPhi(CompilationUnit* cu, BasicBlock* bb, int ssa_name)
1652{
1653 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
1654 if (static_cast<int>(mir->dalvikInsn.opcode) == kMirOpPhi) {
1655 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
1656 if (mir->ssa_rep->uses[i] == ssa_name) {
1657 return mir;
1658 }
1659 }
1660 }
1661 }
1662 return NULL;
1663}
1664
1665static SelectInstructionKind SelectKind(MIR* mir)
1666{
1667 switch (mir->dalvikInsn.opcode) {
1668 case Instruction::MOVE:
1669 case Instruction::MOVE_OBJECT:
1670 case Instruction::MOVE_16:
1671 case Instruction::MOVE_OBJECT_16:
1672 case Instruction::MOVE_FROM16:
1673 case Instruction::MOVE_OBJECT_FROM16:
1674 return kSelectMove;
1675 case Instruction::CONST:
1676 case Instruction::CONST_4:
1677 case Instruction::CONST_16:
1678 return kSelectConst;
1679 case Instruction::GOTO:
1680 case Instruction::GOTO_16:
1681 case Instruction::GOTO_32:
1682 return kSelectGoto;
1683 default:;
1684 }
1685 return kSelectNone;
1686}
1687
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1688/* Do some MIR-level extended basic block optimizations */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1689static bool BasicBlockOpt(CompilationUnit* cu, BasicBlock* bb)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1690{
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1691 if (bb->block_type == kDead) {
1692 return true;
1693 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1694 int num_temps = 0;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1695 BBOpt bb_opt(cu);
1696 while (bb != NULL) {
1697 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
1698 // TUNING: use the returned value number for CSE.
1699 bb_opt.GetValueNumber(mir);
1700 // Look for interesting opcodes, skip otherwise
1701 Instruction::Code opcode = mir->dalvikInsn.opcode;
1702 switch (opcode) {
1703 case Instruction::CMPL_FLOAT:
1704 case Instruction::CMPL_DOUBLE:
1705 case Instruction::CMPG_FLOAT:
1706 case Instruction::CMPG_DOUBLE:
1707 case Instruction::CMP_LONG:
1708 if (cu->gen_bitcode) {
1709 // Bitcode doesn't allow this optimization.
1710 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1711 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1712 if (mir->next != NULL) {
1713 MIR* mir_next = mir->next;
1714 Instruction::Code br_opcode = mir_next->dalvikInsn.opcode;
1715 ConditionCode ccode = kCondNv;
1716 switch(br_opcode) {
1717 case Instruction::IF_EQZ:
1718 ccode = kCondEq;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1719 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1720 case Instruction::IF_NEZ:
1721 ccode = kCondNe;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1722 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1723 case Instruction::IF_LTZ:
1724 ccode = kCondLt;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1725 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1726 case Instruction::IF_GEZ:
1727 ccode = kCondGe;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1728 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1729 case Instruction::IF_GTZ:
1730 ccode = kCondGt;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1731 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1732 case Instruction::IF_LEZ:
1733 ccode = kCondLe;
1734 break;
1735 default:
1736 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1737 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1738 // Make sure result of cmp is used by next insn and nowhere else
1739 if ((ccode != kCondNv) &&
1740 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
1741 (GetSSAUseCount(cu, mir->ssa_rep->defs[0]) == 1)) {
1742 mir_next->dalvikInsn.arg[0] = ccode;
1743 switch(opcode) {
1744 case Instruction::CMPL_FLOAT:
1745 mir_next->dalvikInsn.opcode =
1746 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1747 break;
1748 case Instruction::CMPL_DOUBLE:
1749 mir_next->dalvikInsn.opcode =
1750 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1751 break;
1752 case Instruction::CMPG_FLOAT:
1753 mir_next->dalvikInsn.opcode =
1754 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1755 break;
1756 case Instruction::CMPG_DOUBLE:
1757 mir_next->dalvikInsn.opcode =
1758 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1759 break;
1760 case Instruction::CMP_LONG:
1761 mir_next->dalvikInsn.opcode =
1762 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1763 break;
1764 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
1765 }
1766 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1767 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
1768 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
1769 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
1770 mir_next->ssa_rep->num_defs = 0;
1771 mir->ssa_rep->num_uses = 0;
1772 mir->ssa_rep->num_defs = 0;
1773 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1774 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1775 break;
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1776 case Instruction::GOTO:
1777 case Instruction::GOTO_16:
1778 case Instruction::GOTO_32:
1779 case Instruction::IF_EQ:
1780 case Instruction::IF_NE:
1781 case Instruction::IF_LT:
1782 case Instruction::IF_GE:
1783 case Instruction::IF_GT:
1784 case Instruction::IF_LE:
1785 case Instruction::IF_EQZ:
1786 case Instruction::IF_NEZ:
1787 case Instruction::IF_LTZ:
1788 case Instruction::IF_GEZ:
1789 case Instruction::IF_GTZ:
1790 case Instruction::IF_LEZ:
1791 if (bb->taken->dominates_return) {
1792 mir->optimization_flags |= MIR_IGNORE_SUSPEND_CHECK;
1793 if (cu->verbose) {
1794 LOG(INFO) << "Suppressed suspend check at 0x" << std::hex << mir->offset;
1795 }
1796 }
1797 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1798 default:
1799 break;
1800 }
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1801 // Is this the select pattern?
1802 // TODO: flesh out support for Mips and X86. NOTE: llvm's select op doesn't quite work here.
1803 // TUNING: expand to support IF_xx compare & branches
1804 if (!cu->gen_bitcode && (cu->instruction_set == kThumb2) &&
1805 ((mir->dalvikInsn.opcode == Instruction::IF_EQZ) ||
1806 (mir->dalvikInsn.opcode == Instruction::IF_NEZ))) {
1807 BasicBlock* ft = bb->fall_through;
1808 DCHECK(ft != NULL);
1809 BasicBlock* ft_ft = ft->fall_through;
1810 BasicBlock* ft_tk = ft->taken;
1811
1812 BasicBlock* tk = bb->taken;
1813 DCHECK(tk != NULL);
1814 BasicBlock* tk_ft = tk->fall_through;
1815 BasicBlock* tk_tk = tk->taken;
1816
1817 /*
1818 * In the select pattern, the taken edge goes to a block that unconditionally
1819 * transfers to the rejoin block and the fall_though edge goes to a block that
1820 * unconditionally falls through to the rejoin block.
1821 */
1822
1823 if ((tk_ft == NULL) && (ft_tk == NULL) && (tk_tk == ft_ft) &&
1824 (Predecessors(tk) == 1) && (Predecessors(ft) == 1)) {
1825 // Okay - we have the basic diamond shape. Are the block bodies something we can handle?
1826 if ((ft->first_mir_insn == ft->last_mir_insn) &&
1827 (tk->first_mir_insn != tk->last_mir_insn) &&
1828 (tk->first_mir_insn->next == tk->last_mir_insn) &&
1829 ((SelectKind(ft->first_mir_insn) == kSelectMove) ||
1830 (SelectKind(ft->first_mir_insn) == kSelectConst)) &&
1831 (SelectKind(ft->first_mir_insn) == SelectKind(tk->first_mir_insn)) &&
1832 (SelectKind(tk->last_mir_insn) == kSelectGoto)) {
1833 // Almost there. Are the instructions targeting the same vreg?
1834 MIR* if_true = tk->first_mir_insn;
1835 MIR* if_false = ft->first_mir_insn;
1836 if (if_true->dalvikInsn.vA == if_false->dalvikInsn.vA) {
1837 /*
1838 * We'll convert the IF_EQZ/IF_NEZ to a SELECT. We need to find the
1839 * Phi node in the merge block and delete it (while using the SSA name
1840 * of the merge as the target of the SELECT. Delete both taken and
1841 * fallthrough blocks, and set fallthrough to merge block.
1842 * NOTE: not updating other dataflow info (no longer used at this point).
1843 * If this changes, need to update i_dom, etc. here (and in CombineBlocks).
1844 */
1845 if (opcode == Instruction::IF_NEZ) {
1846 // Normalize.
1847 MIR* tmp_mir = if_true;
1848 if_true = if_false;
1849 if_false = tmp_mir;
1850 }
1851 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpSelect);
1852 bool const_form = (SelectKind(if_true) == kSelectConst);
1853 if ((SelectKind(if_true) == kSelectMove)) {
1854 if (IsConst(cu, if_true->ssa_rep->uses[0]) &&
1855 IsConst(cu, if_false->ssa_rep->uses[0])) {
1856 const_form = true;
1857 if_true->dalvikInsn.vB = ConstantValue(cu, if_true->ssa_rep->uses[0]);
1858 if_false->dalvikInsn.vB = ConstantValue(cu, if_false->ssa_rep->uses[0]);
1859 }
1860 }
1861 if (const_form) {
1862 // "true" set val in vB
1863 mir->dalvikInsn.vB = if_true->dalvikInsn.vB;
1864 // "false" set val in vC
1865 mir->dalvikInsn.vC = if_false->dalvikInsn.vB;
1866 } else {
1867 DCHECK_EQ(SelectKind(if_true), kSelectMove);
1868 DCHECK_EQ(SelectKind(if_false), kSelectMove);
1869 int* src_ssa = static_cast<int*>(NewMem(cu, sizeof(int) * 3, false,
1870 kAllocDFInfo));
1871 src_ssa[0] = mir->ssa_rep->uses[0];
1872 src_ssa[1] = if_true->ssa_rep->uses[0];
1873 src_ssa[2] = if_false->ssa_rep->uses[0];
1874 mir->ssa_rep->uses = src_ssa;
1875 mir->ssa_rep->num_uses = 3;
1876 }
1877 mir->ssa_rep->num_defs = 1;
1878 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * 1, false,
1879 kAllocDFInfo));
1880 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * 1, false,
1881 kAllocDFInfo));
1882 mir->ssa_rep->fp_def[0] = if_true->ssa_rep->fp_def[0];
1883 /*
1884 * There is usually a Phi node in the join block for our two cases. If the
1885 * Phi node only contains our two cases as input, we will use the result
1886 * SSA name of the Phi node as our select result and delete the Phi. If
1887 * the Phi node has more than two operands, we will arbitrarily use the SSA
1888 * name of the "true" path, delete the SSA name of the "false" path from the
1889 * Phi node (and fix up the incoming arc list).
1890 */
1891 MIR* phi = FindPhi(cu, tk_tk, if_true->ssa_rep->defs[0]);
1892 if (phi != NULL) {
1893 if (phi->ssa_rep->num_uses == 2) {
1894 mir->ssa_rep->defs[0] = phi->ssa_rep->defs[0];
1895 phi->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1896 } else {
1897 int dead_def = if_false->ssa_rep->defs[0];
1898 int live_def = if_true->ssa_rep->defs[0];
1899 mir->ssa_rep->defs[0] = live_def;
1900 int* incoming = reinterpret_cast<int*>(phi->dalvikInsn.vB);
1901 for (int i = 0; i < phi->ssa_rep->num_uses; i++) {
1902 if (phi->ssa_rep->uses[i] == live_def) {
1903 incoming[i] = bb->id;
1904 }
1905 }
1906 for (int i = 0; i < phi->ssa_rep->num_uses; i++) {
1907 if (phi->ssa_rep->uses[i] == dead_def) {
1908 int last_slot = phi->ssa_rep->num_uses - 1;
1909 phi->ssa_rep->uses[i] = phi->ssa_rep->uses[last_slot];
1910 incoming[i] = incoming[last_slot];
1911 }
1912 }
1913 }
1914 phi->ssa_rep->num_uses--;
1915 }
1916 bb->taken = NULL;
1917 tk->block_type = kDead;
1918 for (MIR* tmir = ft->first_mir_insn; tmir != NULL; tmir = tmir->next) {
1919 tmir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1920 }
1921 } else {
1922 // At least we can eliminate the suspend check on the backwards branch.
1923 tk->last_mir_insn->optimization_flags |= (MIR_IGNORE_SUSPEND_CHECK);
1924 }
1925 }
1926 }
1927 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1928 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1929 bb = NextDominatedBlock(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1930 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1931
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1932 if (num_temps > cu->num_compiler_temps) {
1933 cu->num_compiler_temps = num_temps;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1934 }
1935 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1936}
1937
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1938static bool NullCheckEliminationInit(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1939{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1940 if (bb->data_flow_info == NULL) return false;
1941 bb->data_flow_info->ending_null_check_v =
1942 AllocBitVector(cu, cu->num_ssa_regs, false, kBitMapNullCheck);
1943 ClearAllBits(bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1944 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1945}
1946
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1947/* Collect stats on number of checks removed */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1948static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1949{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1950 if (bb->data_flow_info == NULL) return false;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1951 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1952 if (mir->ssa_rep == NULL) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1953 continue;
1954 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1955 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1956 if (df_attributes & DF_HAS_NULL_CHKS) {
1957 cu->checkstats->null_checks++;
1958 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
1959 cu->checkstats->null_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1960 }
1961 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1962 if (df_attributes & DF_HAS_RANGE_CHKS) {
1963 cu->checkstats->range_checks++;
1964 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
1965 cu->checkstats->range_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1966 }
1967 }
1968 }
1969 return false;
1970}
1971
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1972/* Try to make common case the fallthrough path */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1973static bool LayoutBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1974{
1975 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1976 if (!bb->explicit_throw) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1977 return false;
1978 }
1979 BasicBlock* walker = bb;
1980 while (true) {
1981 // Check termination conditions
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]1982 if ((walker->block_type == kEntryBlock) || (Predecessors(walker) != 1)) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1983 break;
1984 }
1985 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1986 if (prev->conditional_branch) {
1987 if (prev->fall_through == walker) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1988 // Already done - return
1989 break;
1990 }
1991 DCHECK_EQ(walker, prev->taken);
1992 // Got one. Flip it and exit
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1993 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1994 switch (opcode) {
1995 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1996 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1997 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1998 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1999 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
2000 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
2001 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
2002 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
2003 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
2004 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
2005 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
2006 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2007 default: LOG(FATAL) << "Unexpected opcode " << opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2008 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2009 prev->last_mir_insn->dalvikInsn.opcode = opcode;
2010 BasicBlock* t_bb = prev->taken;
2011 prev->taken = prev->fall_through;
2012 prev->fall_through = t_bb;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2013 break;
2014 }
2015 walker = prev;
2016 }
2017 return false;
2018}
2019
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2020/* Combine any basic blocks terminated by instructions that we now know can't throw */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2021static bool CombineBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2022{
2023 // Loop here to allow combining a sequence of blocks
2024 while (true) {
2025 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2026 if ((bb->first_mir_insn == NULL)
2027 || (bb->data_flow_info == NULL)
2028 || (bb->block_type == kExceptionHandling)
2029 || (bb->block_type == kExitBlock)
2030 || (bb->block_type == kDead)
2031 || ((bb->taken == NULL) || (bb->taken->block_type != kExceptionHandling))
2032 || (bb->successor_block_list.block_list_type != kNotUsed)
2033 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2034 break;
2035 }
2036
2037 // Test the kMirOpCheck instruction
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2038 MIR* mir = bb->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2039 // Grab the attributes from the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2040 MIR* throw_insn = mir->meta.throw_insn;
2041 int df_attributes = oat_data_flow_attributes[throw_insn->dalvikInsn.opcode];
2042 bool can_combine = true;
2043 if (df_attributes & DF_HAS_NULL_CHKS) {
2044 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2045 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2046 if (df_attributes & DF_HAS_RANGE_CHKS) {
2047 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2048 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2049 if (!can_combine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2050 break;
2051 }
2052 // OK - got one. Combine
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2053 BasicBlock* bb_next = bb->fall_through;
2054 DCHECK(!bb_next->catch_entry);
buzbeef662a7c2013-02-12 16:19:43 -0800[diff] [blame]2055 DCHECK_EQ(Predecessors(bb_next), 1U);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2056 MIR* t_mir = bb->last_mir_insn->prev;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2057 // Overwrite the kOpCheck insn with the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2058 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
2059 *bb->last_mir_insn = *throw_insn;
2060 bb->last_mir_insn->prev = t_mir;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2061 // Use the successor info from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2062 bb->successor_block_list = bb_next->successor_block_list;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2063 // Use the ending block linkage from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2064 bb->fall_through = bb_next->fall_through;
2065 bb->taken->block_type = kDead; // Kill the unused exception block
2066 bb->taken = bb_next->taken;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2067 // Include the rest of the instructions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2068 bb->last_mir_insn = bb_next->last_mir_insn;
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2069 /*
2070 * If lower-half of pair of blocks to combine contained a return, move the flag
2071 * to the newly combined block.
2072 */
2073 bb->terminated_by_return = bb_next->terminated_by_return;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2074
2075 /*
2076 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2077 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2078 */
2079
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2080 // Kill bb_next and remap now-dead id to parent
2081 bb_next->block_type = kDead;
2082 cu->block_id_map.Overwrite(bb_next->id, bb->id);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2083
2084 // Now, loop back and see if we can keep going
2085 }
2086 return false;
2087}
2088
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2089/* Eliminate unnecessary null checks for a basic block. */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2090static bool EliminateNullChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2091{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2092 if (bb->data_flow_info == NULL) return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2093
2094 /*
2095 * Set initial state. Be conservative with catch
2096 * blocks and start with no assumptions about null check
2097 * status (except for "this").
2098 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2099 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
2100 ClearAllBits(cu->temp_ssa_register_v);
2101 if ((cu->access_flags & kAccStatic) == 0) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2102 // If non-static method, mark "this" as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2103 int this_reg = cu->num_dalvik_registers - cu->num_ins;
2104 SetBit(cu, cu->temp_ssa_register_v, this_reg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2105 }
2106 } else {
2107 // Starting state is intesection of all incoming arcs
2108 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2109 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2110 BasicBlock* pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
2111 DCHECK(pred_bb != NULL);
2112 CopyBitVector(cu->temp_ssa_register_v,
2113 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2114 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2115 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
2116 if (!pred_bb) break;
2117 if ((pred_bb->data_flow_info == NULL) ||
2118 (pred_bb->data_flow_info->ending_null_check_v == NULL)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2119 continue;
2120 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2121 IntersectBitVectors(cu->temp_ssa_register_v,
2122 cu->temp_ssa_register_v,
2123 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2124 }
2125 }
2126
2127 // Walk through the instruction in the block, updating as necessary
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2128 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2129 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2130 continue;
2131 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2132 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2133
2134 // Mark target of NEW* as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2135 if (df_attributes & DF_NON_NULL_DST) {
2136 SetBit(cu, cu->temp_ssa_register_v, mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2137 }
2138
2139 // Mark non-null returns from invoke-style NEW*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2140 if (df_attributes & DF_NON_NULL_RET) {
2141 MIR* next_mir = mir->next;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2142 // Next should be an MOVE_RESULT_OBJECT
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2143 if (next_mir &&
2144 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2145 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2146 SetBit(cu, cu->temp_ssa_register_v, next_mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2147 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2148 if (next_mir) {
2149 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
2150 } else if (bb->fall_through) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2151 // Look in next basic block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2152 struct BasicBlock* next_bb = bb->fall_through;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2153 for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2154 tmir =tmir->next) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2155 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2156 continue;
2157 }
2158 // First non-pseudo should be MOVE_RESULT_OBJECT
2159 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2160 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2161 SetBit(cu, cu->temp_ssa_register_v, tmir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2162 } else {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2163 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2164 }
2165 break;
2166 }
2167 }
2168 }
2169 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]2170
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2171 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2172 * Propagate nullcheck state on register copies (including
2173 * Phi pseudo copies. For the latter, nullcheck state is
2174 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2175 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2176 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2177 int tgt_sreg = mir->ssa_rep->defs[0];
2178 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
2179 mir->ssa_rep->num_uses;
2180 bool null_checked = true;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2181 for (int i = 0; i < operands; i++) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2182 null_checked &= IsBitSet(cu->temp_ssa_register_v,
2183 mir->ssa_rep->uses[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2184 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2185 if (null_checked) {
2186 SetBit(cu, cu->temp_ssa_register_v, tgt_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2187 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2188 }
2189
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2190 // Already nullchecked?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2191 if ((df_attributes & DF_HAS_NULL_CHKS) && !(mir->optimization_flags & MIR_IGNORE_NULL_CHECK)) {
2192 int src_idx;
2193 if (df_attributes & DF_NULL_CHK_1) {
2194 src_idx = 1;
2195 } else if (df_attributes & DF_NULL_CHK_2) {
2196 src_idx = 2;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2197 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2198 src_idx = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2199 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2200 int src_sreg = mir->ssa_rep->uses[src_idx];
2201 if (IsBitSet(cu->temp_ssa_register_v, src_sreg)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2202 // Eliminate the null check
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2203 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2204 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2205 // Mark s_reg as null-checked
2206 SetBit(cu, cu->temp_ssa_register_v, src_sreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2207 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2208 }
2209 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2210
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2211 // Did anything change?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2212 bool res = CompareBitVectors(bb->data_flow_info->ending_null_check_v,
2213 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2214 if (res) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2215 CopyBitVector(bb->data_flow_info->ending_null_check_v,
2216 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2217 }
2218 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2219}
2220
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2221void NullCheckElimination(CompilationUnit *cu)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2222{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2223 if (!(cu->disable_opt & (1 << kNullCheckElimination))) {
2224 DCHECK(cu->temp_ssa_register_v != NULL);
2225 DataFlowAnalysisDispatcher(cu, NullCheckEliminationInit, kAllNodes,
2226 false /* is_iterative */);
2227 DataFlowAnalysisDispatcher(cu, EliminateNullChecks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2228 kPreOrderDFSTraversal,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2229 true /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2230 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2231}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2232
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2233void BasicBlockCombine(CompilationUnit* cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2234{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2235 DataFlowAnalysisDispatcher(cu, CombineBlocks, kPreOrderDFSTraversal, false);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2236}
2237
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2238void CodeLayout(CompilationUnit* cu)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2239{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2240 DataFlowAnalysisDispatcher(cu, LayoutBlocks, kAllNodes, false);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2241}
2242
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2243void DumpCheckStats(CompilationUnit *cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2244{
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2245 Checkstats* stats =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2246 static_cast<Checkstats*>(NewMem(cu, sizeof(Checkstats), true, kAllocDFInfo));
2247 cu->checkstats = stats;
2248 DataFlowAnalysisDispatcher(cu, CountChecks, kAllNodes, false /* is_iterative */);
2249 if (stats->null_checks > 0) {
2250 float eliminated = static_cast<float>(stats->null_checks_eliminated);
2251 float checks = static_cast<float>(stats->null_checks);
2252 LOG(INFO) << "Null Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2253 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2254 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2255 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2256 if (stats->range_checks > 0) {
2257 float eliminated = static_cast<float>(stats->range_checks_eliminated);
2258 float checks = static_cast<float>(stats->range_checks);
2259 LOG(INFO) << "Range Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2260 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2261 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2262 }
2263}
2264
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2265bool BuildExtendedBBList(struct CompilationUnit* cu, struct BasicBlock* bb)
2266{
2267 if (bb->visited) return false;
2268 if (!((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
2269 || (bb->block_type == kExitBlock))) {
2270 // Ignore special blocks
2271 bb->visited = true;
2272 return false;
2273 }
2274 // Must be head of extended basic block.
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]2275 BasicBlock* start_bb = bb;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2276 cu->extended_basic_blocks.push_back(bb);
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2277 bool terminated_by_return = false;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2278 // Visit blocks strictly dominated by this head.
2279 while (bb != NULL) {
2280 bb->visited = true;
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2281 terminated_by_return |= bb->terminated_by_return;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2282 bb = NextDominatedBlock(cu, bb);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2283 }
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2284 if (terminated_by_return) {
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]2285 // This extended basic block contains a return, so mark all members.
2286 bb = start_bb;
2287 while (bb != NULL) {
2288 bb->dominates_return = true;
2289 bb = NextDominatedBlock(cu, bb);
2290 }
2291 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2292 return false; // Not iterative - return value will be ignored
2293}
2294
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2295void BasicBlockOptimization(CompilationUnit *cu)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2296{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2297 if (!(cu->disable_opt & (1 << kBBOpt))) {
2298 CompilerInitGrowableList(cu, &cu->compiler_temps, 6, kListMisc);
2299 DCHECK_EQ(cu->num_compiler_temps, 0);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2300 // Mark all blocks as not visited
2301 DataFlowAnalysisDispatcher(cu, ClearVisitedFlag,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2302 kAllNodes, false /* is_iterative */);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2303 DataFlowAnalysisDispatcher(cu, BuildExtendedBBList,
2304 kPreOrderDFSTraversal,
2305 false /* is_iterative */);
2306 // Perform extended basic block optimizations.
2307 for (unsigned int i = 0; i < cu->extended_basic_blocks.size(); i++) {
2308 BasicBlockOpt(cu, cu->extended_basic_blocks[i]);
2309 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2310 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2311}
2312
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2313static void AddLoopHeader(CompilationUnit* cu, BasicBlock* header,
2314 BasicBlock* back_edge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2315{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2316 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2317 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2318 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2319 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2320 if (loop->header == header) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2321 InsertGrowableList(cu, &loop->incoming_back_edges,
2322 reinterpret_cast<uintptr_t>(back_edge));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2323 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2324 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2325 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2326 LoopInfo* info = static_cast<LoopInfo*>(NewMem(cu, sizeof(LoopInfo), true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2327 info->header = header;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2328 CompilerInitGrowableList(cu, &info->incoming_back_edges, 2, kListMisc);
2329 InsertGrowableList(cu, &info->incoming_back_edges, reinterpret_cast<uintptr_t>(back_edge));
2330 InsertGrowableList(cu, &cu->loop_headers, reinterpret_cast<uintptr_t>(info));
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2331}
2332
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2333static bool FindBackEdges(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2334{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2335 if ((bb->data_flow_info == NULL) || (bb->last_mir_insn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2336 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2337 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2338 Instruction::Code opcode = bb->last_mir_insn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2339 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2340 if (bb->taken && (bb->taken->start_offset <= bb->start_offset)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2341 DCHECK(bb->dominators != NULL);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2342 if (IsBitSet(bb->dominators, bb->taken->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2343 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2344 LOG(INFO) << "Loop backedge from 0x"
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2345 << std::hex << bb->last_mir_insn->offset
2346 << " to 0x" << std::hex << bb->taken->start_offset;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2347 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2348 AddLoopHeader(cu, bb->taken, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2349 }
2350 }
2351 }
2352 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2353}
2354
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2355static void AddBlocksToLoop(CompilationUnit* cu, ArenaBitVector* blocks,
2356 BasicBlock* bb, int head_id)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2357{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2358 if (!IsBitSet(bb->dominators, head_id) ||
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2359 IsBitSet(blocks, bb->id)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2360 return;
2361 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2362 SetBit(cu, blocks, bb->id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2363 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2364 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2365 BasicBlock* pred_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2366 for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2367 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2368 AddBlocksToLoop(cu, blocks, pred_bb, head_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2369 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2370}
2371
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2372static void DumpLoops(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2373{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2374 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2375 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2376 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2377 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2378 LOG(INFO) << "Loop head block id " << loop->header->id
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2379 << ", offset 0x" << std::hex << loop->header->start_offset
2380 << ", Depth: " << loop->header->nesting_depth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2381 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2382 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2383 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2384 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2385 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2386 LOG(INFO) << " Backedge block id " << edge_bb->id
2387 << ", offset 0x" << std::hex << edge_bb->start_offset;
2388 ArenaBitVectorIterator b_iter;
2389 BitVectorIteratorInit(loop->blocks, &b_iter);
2390 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2391 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2392 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2393 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2394 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2395 << bb->start_offset << ")";
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2396 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2397 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2398 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2399}
2400
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2401void LoopDetection(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2402{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2403 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2404 return;
2405 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2406 CompilerInitGrowableList(cu, &cu->loop_headers, 6, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2407 // Find the loop headers
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2408 DataFlowAnalysisDispatcher(cu, FindBackEdges, kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2409 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2410 GrowableListIteratorInit(&cu->loop_headers, &iter);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2411 // Add blocks to each header
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2412 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2413 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2414 loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2415 kBitMapMisc);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2416 SetBit(cu, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2417 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2418 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2419 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2420 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2421 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2422 AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2423 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2424 }
2425 // Compute the nesting depth of each header
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2426 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2427 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2428 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2429 GrowableListIterator iter2;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2430 GrowableListIteratorInit(&cu->loop_headers, &iter2);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2431 LoopInfo* loop2;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2432 for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2433 loop2 != NULL; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2434 if (IsBitSet(loop2->blocks, loop->header->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2435 loop->header->nesting_depth++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2436 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2437 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2438 }
2439 // Assign nesting depth to each block in all loops
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2440 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2441 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2442 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2443 ArenaBitVectorIterator b_iter;
2444 BitVectorIteratorInit(loop->blocks, &b_iter);
2445 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2446 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2447 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2448 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
2449 bb->nesting_depth = std::max(bb->nesting_depth,
2450 loop->header->nesting_depth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2451 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2452 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2453 if (cu->verbose) {
2454 DumpLoops(cu);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2455 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2456}
2457
2458/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2459 * This function will make a best guess at whether the invoke will
2460 * end up using Method*. It isn't critical to get it exactly right,
2461 * and attempting to do would involve more complexity than it's
2462 * worth.
2463 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2464static bool InvokeUsesMethodStar(CompilationUnit* cu, MIR* mir)
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2465{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2466 InvokeType type;
2467 Instruction::Code opcode = mir->dalvikInsn.opcode;
2468 switch (opcode) {
2469 case Instruction::INVOKE_STATIC:
2470 case Instruction::INVOKE_STATIC_RANGE:
2471 type = kStatic;
2472 break;
2473 case Instruction::INVOKE_DIRECT:
2474 case Instruction::INVOKE_DIRECT_RANGE:
2475 type = kDirect;
2476 break;
2477 case Instruction::INVOKE_VIRTUAL:
2478 case Instruction::INVOKE_VIRTUAL_RANGE:
2479 type = kVirtual;
2480 break;
2481 case Instruction::INVOKE_INTERFACE:
2482 case Instruction::INVOKE_INTERFACE_RANGE:
2483 return false;
2484 case Instruction::INVOKE_SUPER_RANGE:
2485 case Instruction::INVOKE_SUPER:
2486 type = kSuper;
2487 break;
2488 default:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2489 LOG(WARNING) << "Unexpected invoke op: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2490 return false;
2491 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2492 OatCompilationUnit m_unit(cu->class_loader, cu->class_linker,
TDYa127dc5daa02013-01-09 21:31:37 +0800[diff] [blame]2493 *cu->dex_file, cu->code_item,
2494 cu->class_def_idx, cu->method_idx,
2495 cu->access_flags);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2496 // TODO: add a flag so we don't counts the stats for this twice
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2497 uint32_t dex_method_idx = mir->dalvikInsn.vB;
2498 int vtable_idx;
2499 uintptr_t direct_code;
2500 uintptr_t direct_method;
2501 bool fast_path =
2502 cu->compiler->ComputeInvokeInfo(dex_method_idx, &m_unit, type,
2503 vtable_idx, direct_code,
2504 direct_method) &&
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2505 !SLOW_INVOKE_PATH;
2506 return (((type == kDirect) || (type == kStatic)) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2507 fast_path && ((direct_code == 0) || (direct_method == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2508}
2509
2510/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2511 * Count uses, weighting by loop nesting depth. This code only
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2512 * counts explicitly used s_regs. A later phase will add implicit
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2513 * counts for things such as Method*, null-checked references, etc.
2514 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2515static bool CountUses(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2516{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2517 if (bb->block_type != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2518 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2519 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2520 for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) {
2521 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2522 continue;
2523 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2524 uint32_t weight = std::min(16U, static_cast<uint32_t>(bb->nesting_depth));
2525 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
2526 int s_reg = mir->ssa_rep->uses[i];
2527 DCHECK_LT(s_reg, static_cast<int>(cu->use_counts.num_used));
2528 cu->raw_use_counts.elem_list[s_reg]++;
2529 cu->use_counts.elem_list[s_reg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2530 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2531 if (!(cu->disable_opt & (1 << kPromoteCompilerTemps))) {
2532 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2533 // Implicit use of Method* ? */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2534 if (df_attributes & DF_UMS) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2535 /*
2536 * Some invokes will not use Method* - need to perform test similar
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2537 * to that found in GenInvoke() to decide whether to count refs
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2538 * for Method* on invoke-class opcodes.
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2539 * TODO: refactor for common test here, save results for GenInvoke
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2540 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2541 int uses_method_star = true;
2542 if ((df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2543 !(df_attributes & DF_NON_NULL_RET)) {
2544 uses_method_star &= InvokeUsesMethodStar(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2545 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2546 if (uses_method_star) {
2547 cu->raw_use_counts.elem_list[cu->method_sreg]++;
2548 cu->use_counts.elem_list[cu->method_sreg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2549 }
2550 }
2551 }
2552 }
2553 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2554}
2555
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2556void MethodUseCount(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2557{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2558 CompilerInitGrowableList(cu, &cu->use_counts, cu->num_ssa_regs + 32, kListMisc);
2559 CompilerInitGrowableList(cu, &cu->raw_use_counts, cu->num_ssa_regs + 32, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2560 // Initialize list
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2561 for (int i = 0; i < cu->num_ssa_regs; i++) {
2562 InsertGrowableList(cu, &cu->use_counts, 0);
2563 InsertGrowableList(cu, &cu->raw_use_counts, 0);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2564 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2565 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2566 return;
2567 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2568 DataFlowAnalysisDispatcher(cu, CountUses,
2569 kAllNodes, false /* is_iterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2570}
2571
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2572} // namespace art