commit dd7624d2b9e599d57762d12031b10b89defc9807
author Ian Rogers <irogers@google.com> Fri Mar 14 17:43:00 2014 -0700
committer Ian Rogers <irogers@google.com> Tue Apr 01 08:24:16 2014 -0700
tree c972296737f992a84b1552561f823991d28403f0
parent 8464a64a50190c06e95015a932eda9511fa6473d

Allow mixing of thread offsets between 32 and 64bit architectures.

Begin a more full implementation x86-64 REX prefixes.
Doesn't implement 64bit thread offset support for the JNI compiler.

Change-Id: If9af2f08a1833c21ddb4b4077f9b03add1a05147

compiler/utils/x86/assembler_x86.cc

diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index ebbb43a..aac8b01 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -1478,12 +1478,12 @@
   movl(Address(ESP, dest), Immediate(imm));
 }
 
-void X86Assembler::StoreImmediateToThread(ThreadOffset dest, uint32_t imm,
+void X86Assembler::StoreImmediateToThread32(ThreadOffset<4> dest, uint32_t imm,
                                           ManagedRegister) {
   fs()->movl(Address::Absolute(dest), Immediate(imm));
 }
 
-void X86Assembler::StoreStackOffsetToThread(ThreadOffset thr_offs,
+void X86Assembler::StoreStackOffsetToThread32(ThreadOffset<4> thr_offs,
                                             FrameOffset fr_offs,
                                             ManagedRegister mscratch) {
   X86ManagedRegister scratch = mscratch.AsX86();
@@ -1492,14 +1492,10 @@
   fs()->movl(Address::Absolute(thr_offs), scratch.AsCpuRegister());
 }
 
-void X86Assembler::StoreStackPointerToThread(ThreadOffset thr_offs) {
+void X86Assembler::StoreStackPointerToThread32(ThreadOffset<4> thr_offs) {
   fs()->movl(Address::Absolute(thr_offs), ESP);
 }
 
-void X86Assembler::StoreLabelToThread(ThreadOffset thr_offs, Label* lbl) {
-  fs()->movl(Address::Absolute(thr_offs), lbl);
-}
-
 void X86Assembler::StoreSpanning(FrameOffset /*dst*/, ManagedRegister /*src*/,
                                  FrameOffset /*in_off*/, ManagedRegister /*scratch*/) {
   UNIMPLEMENTED(FATAL);  // this case only currently exists for ARM
@@ -1532,7 +1528,7 @@
   }
 }
 
-void X86Assembler::Load(ManagedRegister mdest, ThreadOffset src, size_t size) {
+void X86Assembler::LoadFromThread32(ManagedRegister mdest, ThreadOffset<4> src, size_t size) {
   X86ManagedRegister dest = mdest.AsX86();
   if (dest.IsNoRegister()) {
     CHECK_EQ(0u, size);
@@ -1542,7 +1538,7 @@
   } else if (dest.IsRegisterPair()) {
     CHECK_EQ(8u, size);
     fs()->movl(dest.AsRegisterPairLow(), Address::Absolute(src));
-    fs()->movl(dest.AsRegisterPairHigh(), Address::Absolute(ThreadOffset(src.Int32Value()+4)));
+    fs()->movl(dest.AsRegisterPairHigh(), Address::Absolute(ThreadOffset<4>(src.Int32Value()+4)));
   } else if (dest.IsX87Register()) {
     if (size == 4) {
       fs()->flds(Address::Absolute(src));
@@ -1582,8 +1578,8 @@
   movl(dest.AsCpuRegister(), Address(base.AsX86().AsCpuRegister(), offs));
 }
 
-void X86Assembler::LoadRawPtrFromThread(ManagedRegister mdest,
-                                        ThreadOffset offs) {
+void X86Assembler::LoadRawPtrFromThread32(ManagedRegister mdest,
+                                        ThreadOffset<4> offs) {
   X86ManagedRegister dest = mdest.AsX86();
   CHECK(dest.IsCpuRegister());
   fs()->movl(dest.AsCpuRegister(), Address::Absolute(offs));
@@ -1645,8 +1641,8 @@
   movl(Address(ESP, dest), scratch.AsCpuRegister());
 }
 
-void X86Assembler::CopyRawPtrFromThread(FrameOffset fr_offs,
-                                        ThreadOffset thr_offs,
+void X86Assembler::CopyRawPtrFromThread32(FrameOffset fr_offs,
+                                        ThreadOffset<4> thr_offs,
                                         ManagedRegister mscratch) {
   X86ManagedRegister scratch = mscratch.AsX86();
   CHECK(scratch.IsCpuRegister());
@@ -1654,7 +1650,7 @@
   Store(fr_offs, scratch, 4);
 }
 
-void X86Assembler::CopyRawPtrToThread(ThreadOffset thr_offs,
+void X86Assembler::CopyRawPtrToThread32(ThreadOffset<4> thr_offs,
                                       FrameOffset fr_offs,
                                       ManagedRegister mscratch) {
   X86ManagedRegister scratch = mscratch.AsX86();
@@ -1804,26 +1800,26 @@
   call(Address(scratch, offset));
 }
 
-void X86Assembler::Call(ThreadOffset offset, ManagedRegister /*mscratch*/) {
+void X86Assembler::CallFromThread32(ThreadOffset<4> offset, ManagedRegister /*mscratch*/) {
   fs()->call(Address::Absolute(offset));
 }
 
 void X86Assembler::GetCurrentThread(ManagedRegister tr) {
   fs()->movl(tr.AsX86().AsCpuRegister(),
-             Address::Absolute(Thread::SelfOffset()));
+             Address::Absolute(Thread::SelfOffset<4>()));
 }
 
 void X86Assembler::GetCurrentThread(FrameOffset offset,
                                     ManagedRegister mscratch) {
   X86ManagedRegister scratch = mscratch.AsX86();
-  fs()->movl(scratch.AsCpuRegister(), Address::Absolute(Thread::SelfOffset()));
+  fs()->movl(scratch.AsCpuRegister(), Address::Absolute(Thread::SelfOffset<4>()));
   movl(Address(ESP, offset), scratch.AsCpuRegister());
 }
 
 void X86Assembler::ExceptionPoll(ManagedRegister /*scratch*/, size_t stack_adjust) {
   X86ExceptionSlowPath* slow = new X86ExceptionSlowPath(stack_adjust);
   buffer_.EnqueueSlowPath(slow);
-  fs()->cmpl(Address::Absolute(Thread::ExceptionOffset()), Immediate(0));
+  fs()->cmpl(Address::Absolute(Thread::ExceptionOffset<4>()), Immediate(0));
   j(kNotEqual, slow->Entry());
 }
 
@@ -1836,8 +1832,8 @@
     __ DecreaseFrameSize(stack_adjust_);
   }
   // Pass exception as argument in EAX
-  __ fs()->movl(EAX, Address::Absolute(Thread::ExceptionOffset()));
-  __ fs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(pDeliverException)));
+  __ fs()->movl(EAX, Address::Absolute(Thread::ExceptionOffset<4>()));
+  __ fs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(4, pDeliverException)));
   // this call should never return
   __ int3();
 #undef __