ART: Change temporaries to positive names
Changes compiler temporaries to have positive names. The numbering now
puts them above the code VRs (locals + ins, in that order). The patch also
introduces APIs to query the number of temporaries, locals and ins.
The compiler temp infrastructure suffered from several issues
which are also addressed by this patch:
-There is no longer a queue of compiler temps. This would be polluted
with Method* when post opts were called multiple times.
-Sanity checks have been added to allow requesting of temps from BE
and to prevent temps after frame is committed.
-None of the structures holding temps can overflow because they are
allocated to allow holding maximum temps. Thus temps can be requested
by BE with no problem.
-Since the queue of compiler temps is no longer maintained, it is no
longer possible to refer to a temp that has invalid ssa (because it
was requested before ssa was run).
-The BE can now request temps after all ME allocations and it is guaranteed
to actually receive them.
-ME temps are now treated like normal VRs in all cases with no special
handling. Only the BE temps are handled specially because there are no
references to them from MIRs.
-Deprecated and removed several fields in CompilationUnit that saved
register information and updated callsites to call the new interface from
MIRGraph.
Change-Id: Ia8b1fec9384a1a83017800a59e5b0498dfb2698c
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
diff --git a/compiler/dex/quick/ralloc_util.cc b/compiler/dex/quick/ralloc_util.cc
index 4021c95..0a737a9 100644
--- a/compiler/dex/quick/ralloc_util.cc
+++ b/compiler/dex/quick/ralloc_util.cc
@@ -252,20 +252,7 @@
DCHECK_LT(s_reg, mir_graph_->GetNumSSARegs());
DCHECK_GE(s_reg, 0);
int v_reg = mir_graph_->SRegToVReg(s_reg);
- if (v_reg >= 0) {
- DCHECK_LT(v_reg, cu_->num_dalvik_registers);
- return v_reg;
- } else {
- /*
- * It must be the case that the v_reg for temporary is less than or equal to the
- * base reg for temps. For that reason, "position" must be zero or positive.
- */
- unsigned int position = std::abs(v_reg) - std::abs(static_cast<int>(kVRegTempBaseReg));
-
- // The temporaries are placed after dalvik registers in the promotion map
- DCHECK_LT(position, mir_graph_->GetNumUsedCompilerTemps());
- return cu_->num_dalvik_registers + position;
- }
+ return v_reg;
}
// TODO: refactor following Alloc/Record routines - much commonality.
@@ -1211,8 +1198,7 @@
* optimization is disabled.
*/
void Mir2Lir::DoPromotion() {
- int dalvik_regs = cu_->num_dalvik_registers;
- int num_regs = dalvik_regs + mir_graph_->GetNumUsedCompilerTemps();
+ int num_regs = mir_graph_->GetNumOfCodeAndTempVRs();
const int promotion_threshold = 1;
// Allocate the promotion map - one entry for each Dalvik vReg or compiler temp
promotion_map_ = static_cast<PromotionMap*>
@@ -1241,17 +1227,10 @@
static_cast<RefCounts *>(arena_->Alloc(sizeof(RefCounts) * fp_reg_count_size,
kArenaAllocRegAlloc));
// Set ssa names for original Dalvik registers
- for (int i = 0; i < dalvik_regs; i++) {
+ for (int i = 0; i < num_regs; i++) {
core_regs[i].s_reg = fp_regs[i].s_reg = i;
}
- // Set ssa names for compiler temporaries
- for (unsigned int ct_idx = 0; ct_idx < mir_graph_->GetNumUsedCompilerTemps(); ct_idx++) {
- CompilerTemp* ct = mir_graph_->GetCompilerTemp(ct_idx);
- core_regs[dalvik_regs + ct_idx].s_reg = ct->s_reg_low;
- fp_regs[dalvik_regs + ct_idx].s_reg = ct->s_reg_low;
- }
-
// Duplicate in upper half to represent possible wide starting sregs.
for (size_t i = num_regs; i < fp_reg_count_size; i++) {
fp_regs[i].s_reg = fp_regs[i - num_regs].s_reg | STARTING_WIDE_SREG;