Semi-pruned SSA support for sea-ir.
Added the following:
Per file:
sea_ir/sea.*: IDominator pass, dominance frontiers, global variables for ssa
transformation, phi-function insertion pass, SSA renaming pass.
sea_ir/instruction_tools.*: These tools provide info needed by dataflow analysis
that is dependent on dex format.
compiler/utils/scoped_hashtable.h: Scoped hashtable implementation that
allows fast SSA renaming.
src/compiler/utils/scoped_hashtable_test.cc: Test for scoped_hashtable.h.
dex_instruction.cc: Changed semantics of the VRegA,B,C function
to return NO_REGISTER instead
of aborting if the instruction does not
have register operands.
Android.common.mk: Added support for scoped_hashtable test.
Change-Id: I990fe4c213d241a033e43a04a67c6083fca4b347
diff --git a/src/dex_instruction.cc b/src/dex_instruction.cc
index 6527f10..427baf2 100644
--- a/src/dex_instruction.cc
+++ b/src/dex_instruction.cc
@@ -82,54 +82,84 @@
return insns[offset] | ((uint32_t) insns[offset+1] << 16);
}
+
+bool Instruction::HasVRegC() const {
+ switch (FormatOf(Opcode())) {
+ case k23x: return true;
+ case k35c: return true;
+ case k3rc: return true;
+ default: return false;
+ }
+}
+
+bool Instruction::HasVRegB() const {
+ switch (FormatOf(Opcode())) {
+ case k12x: return true;
+ case k22b: return true;
+ case k22c: return true;
+ case k22s: return true;
+ case k22t: return true;
+ case k22x: return true;
+ case k32x: return true;
+ default: return false;
+ }
+}
+
+bool Instruction::HasVRegA() const {
+ switch (FormatOf(Opcode())) {
+ case k11n: return true;
+ case k11x: return true;
+ case k12x: return true;
+ case k21c: return true;
+ case k21h: return true;
+ case k21s: return true;
+ case k21t: return true;
+ case k22b: return true;
+ case k22c: return true;
+ case k22s: return true;
+ case k22t: return true;
+ case k22x: return true;
+ case k23x: return true;
+ case k31c: return true;
+ case k31i: return true;
+ case k31t: return true;
+ case k32x: return true;
+ case k51l: return true;
+ default: return false;
+ }
+}
+
int32_t Instruction::VRegC() const {
switch (FormatOf(Opcode())) {
- case k22b: return VRegC_22b();
- case k22c: return VRegC_22c();
- case k22s: return VRegC_22s();
- case k22t: return VRegC_22t();
case k23x: return VRegC_23x();
case k35c: return VRegC_35c();
case k3rc: return VRegC_3rc();
default: LOG(FATAL) << "Tried to access vC of instruction " << Name() <<
" which has no C operand.";
}
- return 0;
+ return -1;
}
int32_t Instruction::VRegB() const {
switch (FormatOf(Opcode())) {
- case k11n: return VRegB_11n();
case k12x: return VRegB_12x();
- case k21c: return VRegB_21c();
- case k21h: return VRegB_21h();
- case k21t: return VRegB_21t();
case k22b: return VRegB_22b();
case k22c: return VRegB_22c();
case k22s: return VRegB_22s();
case k22t: return VRegB_22t();
case k22x: return VRegB_22x();
- case k31c: return VRegB_31c();
- case k31i: return VRegB_31i();
- case k31t: return VRegB_31t();
case k32x: return VRegB_32x();
- case k35c: return VRegB_35c();
- case k3rc: return VRegB_3rc();
- case k51l: return VRegB_51l();
default: LOG(FATAL) << "Tried to access vB of instruction " << Name() <<
" which has no B operand.";
}
- return 0;
+ return -1;
}
int32_t Instruction::VRegA() const {
switch (FormatOf(Opcode())) {
- case k10t: return VRegA_10t();
- case k10x: return VRegA_10x();
case k11n: return VRegA_11n();
case k11x: return VRegA_11x();
case k12x: return VRegA_12x();
- case k20t: return VRegA_20t();
case k21c: return VRegA_21c();
case k21h: return VRegA_21h();
case k21s: return VRegA_21s();
@@ -140,18 +170,15 @@
case k22t: return VRegA_22t();
case k22x: return VRegA_22x();
case k23x: return VRegA_23x();
- case k30t: return VRegA_30t();
case k31c: return VRegA_31c();
case k31i: return VRegA_31i();
case k31t: return VRegA_31t();
case k32x: return VRegA_32x();
- case k35c: return VRegA_35c();
- case k3rc: return VRegA_3rc();
case k51l: return VRegA_51l();
- default: LOG(FATAL) << "Tried to access vA of instruction "<< Name() <<
+ default: LOG(FATAL) << "Tried to access vA of instruction " << Name() <<
" which has no A operand.";
}
- return 0;
+ return -1;
}
int32_t Instruction::GetTargetOffset() const {