Fix our x86 mfence macro.
The newly-enabled debugging caught this deviation from the usual style.
Change-Id: I322e6f5d60102103e8970a4c851da656eb80d6e1
diff --git a/src/assembler_x86.cc b/src/assembler_x86.cc
index 18dd1a7..d2fc708 100644
--- a/src/assembler_x86.cc
+++ b/src/assembler_x86.cc
@@ -1202,6 +1202,13 @@
EmitOperand(reg, address);
}
+void X86Assembler::mfence() {
+ AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ EmitUint8(0x0F);
+ EmitUint8(0xAE);
+ EmitUint8(0xF0);
+}
+
X86Assembler* X86Assembler::fs() {
// TODO: fs is a prefix and not an instruction
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
@@ -1665,9 +1672,7 @@
void X86Assembler::MemoryBarrier(ManagedRegister) {
#if ANDROID_SMP != 0
- EmitUint8(0x0F); // mfence
- EmitUint8(0xAE);
- EmitUint8(0xF0);
+ mfence();
#endif
}