commit 79ab9e32c6880e7b342c192a479c858c9dccf496
author Elliott Hughes <enh@google.com> Mon Mar 12 15:41:35 2012 -0700
committer Elliott Hughes <enh@google.com> Mon Mar 12 15:41:35 2012 -0700
tree c8766c37b81150206ebd26eec9207bc3b03d9029
parent 85dff22e42eb9bceafe3a232bbf20a84847d8c17

Fix our x86 mfence macro.

The newly-enabled debugging caught this deviation from the usual style.

Change-Id: I322e6f5d60102103e8970a4c851da656eb80d6e1

src/assembler_x86.cc

diff --git a/src/assembler_x86.cc b/src/assembler_x86.cc
index 18dd1a7..d2fc708 100644
--- a/src/assembler_x86.cc
+++ b/src/assembler_x86.cc
@@ -1202,6 +1202,13 @@
   EmitOperand(reg, address);
 }
 
+void X86Assembler::mfence() {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0xAE);
+  EmitUint8(0xF0);
+}
+
 X86Assembler* X86Assembler::fs() {
   // TODO: fs is a prefix and not an instruction
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
@@ -1665,9 +1672,7 @@
 
 void X86Assembler::MemoryBarrier(ManagedRegister) {
 #if ANDROID_SMP != 0
-  EmitUint8(0x0F);  // mfence
-  EmitUint8(0xAE);
-  EmitUint8(0xF0);
+  mfence();
 #endif
 }
 

src/assembler_x86.h

diff --git a/src/assembler_x86.h b/src/assembler_x86.h
index e87ce34..2fc486d 100644
--- a/src/assembler_x86.h
+++ b/src/assembler_x86.h
@@ -431,6 +431,8 @@
   X86Assembler* lock();
   void cmpxchgl(const Address& address, Register reg);
 
+  void mfence();
+
   X86Assembler* fs();
 
   //