ART: More warnings
Enable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general,
and -Wunused-but-set-parameter for GCC builds.
Change-Id: I81bbdd762213444673c65d85edae594a523836e5
diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h
index b5bf31b..de4e6de 100644
--- a/compiler/utils/x86/assembler_x86.h
+++ b/compiler/utils/x86/assembler_x86.h
@@ -31,7 +31,7 @@
class Immediate : public ValueObject {
public:
- explicit Immediate(int32_t value) : value_(value) {}
+ explicit Immediate(int32_t value_in) : value_(value_in) {}
int32_t value() const { return value_; }
@@ -90,16 +90,16 @@
// Operand can be sub classed (e.g: Address).
Operand() : length_(0) { }
- void SetModRM(int mod, Register rm) {
- CHECK_EQ(mod & ~3, 0);
- encoding_[0] = (mod << 6) | rm;
+ void SetModRM(int mod_in, Register rm_in) {
+ CHECK_EQ(mod_in & ~3, 0);
+ encoding_[0] = (mod_in << 6) | rm_in;
length_ = 1;
}
- void SetSIB(ScaleFactor scale, Register index, Register base) {
+ void SetSIB(ScaleFactor scale_in, Register index_in, Register base_in) {
CHECK_EQ(length_, 1);
- CHECK_EQ(scale & ~3, 0);
- encoding_[1] = (scale << 6) | (index << 3) | base;
+ CHECK_EQ(scale_in & ~3, 0);
+ encoding_[1] = (scale_in << 6) | (index_in << 3) | base_in;
length_ = 2;
}
@@ -122,10 +122,10 @@
explicit Operand(Register reg) { SetModRM(3, reg); }
// Get the operand encoding byte at the given index.
- uint8_t encoding_at(int index) const {
- CHECK_GE(index, 0);
- CHECK_LT(index, length_);
- return encoding_[index];
+ uint8_t encoding_at(int index_in) const {
+ CHECK_GE(index_in, 0);
+ CHECK_LT(index_in, length_);
+ return encoding_[index_in];
}
friend class X86Assembler;
@@ -134,57 +134,57 @@
class Address : public Operand {
public:
- Address(Register base, int32_t disp) {
- Init(base, disp);
+ Address(Register base_in, int32_t disp) {
+ Init(base_in, disp);
}
- Address(Register base, Offset disp) {
- Init(base, disp.Int32Value());
+ Address(Register base_in, Offset disp) {
+ Init(base_in, disp.Int32Value());
}
- Address(Register base, FrameOffset disp) {
- CHECK_EQ(base, ESP);
+ Address(Register base_in, FrameOffset disp) {
+ CHECK_EQ(base_in, ESP);
Init(ESP, disp.Int32Value());
}
- Address(Register base, MemberOffset disp) {
- Init(base, disp.Int32Value());
+ Address(Register base_in, MemberOffset disp) {
+ Init(base_in, disp.Int32Value());
}
- void Init(Register base, int32_t disp) {
- if (disp == 0 && base != EBP) {
- SetModRM(0, base);
- if (base == ESP) SetSIB(TIMES_1, ESP, base);
+ void Init(Register base_in, int32_t disp) {
+ if (disp == 0 && base_in != EBP) {
+ SetModRM(0, base_in);
+ if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
} else if (disp >= -128 && disp <= 127) {
- SetModRM(1, base);
- if (base == ESP) SetSIB(TIMES_1, ESP, base);
+ SetModRM(1, base_in);
+ if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
SetDisp8(disp);
} else {
- SetModRM(2, base);
- if (base == ESP) SetSIB(TIMES_1, ESP, base);
+ SetModRM(2, base_in);
+ if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
SetDisp32(disp);
}
}
- Address(Register index, ScaleFactor scale, int32_t disp) {
- CHECK_NE(index, ESP); // Illegal addressing mode.
+ Address(Register index_in, ScaleFactor scale_in, int32_t disp) {
+ CHECK_NE(index_in, ESP); // Illegal addressing mode.
SetModRM(0, ESP);
- SetSIB(scale, index, EBP);
+ SetSIB(scale_in, index_in, EBP);
SetDisp32(disp);
}
- Address(Register base, Register index, ScaleFactor scale, int32_t disp) {
- CHECK_NE(index, ESP); // Illegal addressing mode.
- if (disp == 0 && base != EBP) {
+ Address(Register base_in, Register index_in, ScaleFactor scale_in, int32_t disp) {
+ CHECK_NE(index_in, ESP); // Illegal addressing mode.
+ if (disp == 0 && base_in != EBP) {
SetModRM(0, ESP);
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
} else if (disp >= -128 && disp <= 127) {
SetModRM(1, ESP);
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
SetDisp8(disp);
} else {
SetModRM(2, ESP);
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
SetDisp32(disp);
}
}