ART: More warnings
Enable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general,
and -Wunused-but-set-parameter for GCC builds.
Change-Id: I81bbdd762213444673c65d85edae594a523836e5
diff --git a/compiler/utils/arm/assembler_arm.cc b/compiler/utils/arm/assembler_arm.cc
index e9788f9..591d461 100644
--- a/compiler/utils/arm/assembler_arm.cc
+++ b/compiler/utils/arm/assembler_arm.cc
@@ -301,11 +301,11 @@
CHECK(IsAbsoluteUint(10, offset)); // In the range -1020 to +1020.
CHECK_ALIGNED(offset, 2); // Multiple of 4.
CHECK((am_ == Offset) || (am_ == NegOffset));
- uint32_t vencoding = (encoding & (0xf << kRnShift)) | (offset >> 2);
+ uint32_t vencoding_value = (encoding & (0xf << kRnShift)) | (offset >> 2);
if (am_ == Offset) {
- vencoding |= 1 << 23;
+ vencoding_value |= 1 << 23;
}
- return vencoding;
+ return vencoding_value;
}
diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc
index fd2613a..71d6e7e 100644
--- a/compiler/utils/arm/assembler_thumb2.cc
+++ b/compiler/utils/arm/assembler_thumb2.cc
@@ -2121,8 +2121,8 @@
branch->ResetSize(Branch::k16Bit);
// Now add a compare instruction in the place the branch was.
- int16_t cmp = B13 | B11 | static_cast<int16_t>(branch->GetRegister()) << 8;
- buffer_.Store<int16_t>(branch_location, cmp);
+ buffer_.Store<int16_t>(branch_location,
+ B13 | B11 | static_cast<int16_t>(branch->GetRegister()) << 8);
// Since have moved made a hole in the code we need to reload the
// current pc.
diff --git a/compiler/utils/arm64/assembler_arm64.h b/compiler/utils/arm64/assembler_arm64.h
index 1b1d121..a69be25 100644
--- a/compiler/utils/arm64/assembler_arm64.h
+++ b/compiler/utils/arm64/assembler_arm64.h
@@ -27,8 +27,13 @@
#include "utils/assembler.h"
#include "offsets.h"
#include "utils.h"
+
+// TODO: make vixl clean wrt -Wshadow.
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wshadow"
#include "a64/macro-assembler-a64.h"
#include "a64/disasm-a64.h"
+#pragma GCC diagnostic pop
namespace art {
namespace arm64 {
diff --git a/compiler/utils/array_ref.h b/compiler/utils/array_ref.h
index c137e46..1a7f2e8 100644
--- a/compiler/utils/array_ref.h
+++ b/compiler/utils/array_ref.h
@@ -73,8 +73,8 @@
: array_(array), size_(size) {
}
- constexpr ArrayRef(T* array, size_t size)
- : array_(array), size_(size) {
+ constexpr ArrayRef(T* array_in, size_t size_in)
+ : array_(array_in), size_(size_in) {
}
template <typename Alloc>
diff --git a/compiler/utils/assembler.h b/compiler/utils/assembler.h
index e1b6d7c..ad7e98d 100644
--- a/compiler/utils/assembler.h
+++ b/compiler/utils/assembler.h
@@ -56,9 +56,9 @@
class ExternalLabel {
public:
- ExternalLabel(const char* name, uintptr_t address)
- : name_(name), address_(address) {
- DCHECK(name != nullptr);
+ ExternalLabel(const char* name_in, uintptr_t address_in)
+ : name_(name_in), address_(address_in) {
+ DCHECK(name_in != nullptr);
}
const char* name() const { return name_; }
@@ -140,10 +140,10 @@
int position_;
AssemblerFixup* previous() const { return previous_; }
- void set_previous(AssemblerFixup* previous) { previous_ = previous; }
+ void set_previous(AssemblerFixup* previous_in) { previous_ = previous_in; }
int position() const { return position_; }
- void set_position(int position) { position_ = position; }
+ void set_position(int position_in) { position_ = position_in; }
friend class AssemblerBuffer;
};
diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h
index b5bf31b..de4e6de 100644
--- a/compiler/utils/x86/assembler_x86.h
+++ b/compiler/utils/x86/assembler_x86.h
@@ -31,7 +31,7 @@
class Immediate : public ValueObject {
public:
- explicit Immediate(int32_t value) : value_(value) {}
+ explicit Immediate(int32_t value_in) : value_(value_in) {}
int32_t value() const { return value_; }
@@ -90,16 +90,16 @@
// Operand can be sub classed (e.g: Address).
Operand() : length_(0) { }
- void SetModRM(int mod, Register rm) {
- CHECK_EQ(mod & ~3, 0);
- encoding_[0] = (mod << 6) | rm;
+ void SetModRM(int mod_in, Register rm_in) {
+ CHECK_EQ(mod_in & ~3, 0);
+ encoding_[0] = (mod_in << 6) | rm_in;
length_ = 1;
}
- void SetSIB(ScaleFactor scale, Register index, Register base) {
+ void SetSIB(ScaleFactor scale_in, Register index_in, Register base_in) {
CHECK_EQ(length_, 1);
- CHECK_EQ(scale & ~3, 0);
- encoding_[1] = (scale << 6) | (index << 3) | base;
+ CHECK_EQ(scale_in & ~3, 0);
+ encoding_[1] = (scale_in << 6) | (index_in << 3) | base_in;
length_ = 2;
}
@@ -122,10 +122,10 @@
explicit Operand(Register reg) { SetModRM(3, reg); }
// Get the operand encoding byte at the given index.
- uint8_t encoding_at(int index) const {
- CHECK_GE(index, 0);
- CHECK_LT(index, length_);
- return encoding_[index];
+ uint8_t encoding_at(int index_in) const {
+ CHECK_GE(index_in, 0);
+ CHECK_LT(index_in, length_);
+ return encoding_[index_in];
}
friend class X86Assembler;
@@ -134,57 +134,57 @@
class Address : public Operand {
public:
- Address(Register base, int32_t disp) {
- Init(base, disp);
+ Address(Register base_in, int32_t disp) {
+ Init(base_in, disp);
}
- Address(Register base, Offset disp) {
- Init(base, disp.Int32Value());
+ Address(Register base_in, Offset disp) {
+ Init(base_in, disp.Int32Value());
}
- Address(Register base, FrameOffset disp) {
- CHECK_EQ(base, ESP);
+ Address(Register base_in, FrameOffset disp) {
+ CHECK_EQ(base_in, ESP);
Init(ESP, disp.Int32Value());
}
- Address(Register base, MemberOffset disp) {
- Init(base, disp.Int32Value());
+ Address(Register base_in, MemberOffset disp) {
+ Init(base_in, disp.Int32Value());
}
- void Init(Register base, int32_t disp) {
- if (disp == 0 && base != EBP) {
- SetModRM(0, base);
- if (base == ESP) SetSIB(TIMES_1, ESP, base);
+ void Init(Register base_in, int32_t disp) {
+ if (disp == 0 && base_in != EBP) {
+ SetModRM(0, base_in);
+ if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
} else if (disp >= -128 && disp <= 127) {
- SetModRM(1, base);
- if (base == ESP) SetSIB(TIMES_1, ESP, base);
+ SetModRM(1, base_in);
+ if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
SetDisp8(disp);
} else {
- SetModRM(2, base);
- if (base == ESP) SetSIB(TIMES_1, ESP, base);
+ SetModRM(2, base_in);
+ if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
SetDisp32(disp);
}
}
- Address(Register index, ScaleFactor scale, int32_t disp) {
- CHECK_NE(index, ESP); // Illegal addressing mode.
+ Address(Register index_in, ScaleFactor scale_in, int32_t disp) {
+ CHECK_NE(index_in, ESP); // Illegal addressing mode.
SetModRM(0, ESP);
- SetSIB(scale, index, EBP);
+ SetSIB(scale_in, index_in, EBP);
SetDisp32(disp);
}
- Address(Register base, Register index, ScaleFactor scale, int32_t disp) {
- CHECK_NE(index, ESP); // Illegal addressing mode.
- if (disp == 0 && base != EBP) {
+ Address(Register base_in, Register index_in, ScaleFactor scale_in, int32_t disp) {
+ CHECK_NE(index_in, ESP); // Illegal addressing mode.
+ if (disp == 0 && base_in != EBP) {
SetModRM(0, ESP);
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
} else if (disp >= -128 && disp <= 127) {
SetModRM(1, ESP);
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
SetDisp8(disp);
} else {
SetModRM(2, ESP);
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
SetDisp32(disp);
}
}
diff --git a/compiler/utils/x86_64/assembler_x86_64.h b/compiler/utils/x86_64/assembler_x86_64.h
index 2de3ce5..5b16f08 100644
--- a/compiler/utils/x86_64/assembler_x86_64.h
+++ b/compiler/utils/x86_64/assembler_x86_64.h
@@ -38,7 +38,7 @@
// conversion rules in expressions regarding negation, especially size_t on 32b.
class Immediate : public ValueObject {
public:
- explicit Immediate(int64_t value) : value_(value) {}
+ explicit Immediate(int64_t value_in) : value_(value_in) {}
int64_t value() const { return value_; }
@@ -105,26 +105,26 @@
// Operand can be sub classed (e.g: Address).
Operand() : rex_(0), length_(0) { }
- void SetModRM(uint8_t mod, CpuRegister rm) {
- CHECK_EQ(mod & ~3, 0);
- if (rm.NeedsRex()) {
+ void SetModRM(uint8_t mod_in, CpuRegister rm_in) {
+ CHECK_EQ(mod_in & ~3, 0);
+ if (rm_in.NeedsRex()) {
rex_ |= 0x41; // REX.000B
}
- encoding_[0] = (mod << 6) | rm.LowBits();
+ encoding_[0] = (mod_in << 6) | rm_in.LowBits();
length_ = 1;
}
- void SetSIB(ScaleFactor scale, CpuRegister index, CpuRegister base) {
+ void SetSIB(ScaleFactor scale_in, CpuRegister index_in, CpuRegister base_in) {
CHECK_EQ(length_, 1);
- CHECK_EQ(scale & ~3, 0);
- if (base.NeedsRex()) {
+ CHECK_EQ(scale_in & ~3, 0);
+ if (base_in.NeedsRex()) {
rex_ |= 0x41; // REX.000B
}
- if (index.NeedsRex()) {
+ if (index_in.NeedsRex()) {
rex_ |= 0x42; // REX.00X0
}
- encoding_[1] = (scale << 6) | (static_cast<uint8_t>(index.LowBits()) << 3) |
- static_cast<uint8_t>(base.LowBits());
+ encoding_[1] = (scale_in << 6) | (static_cast<uint8_t>(index_in.LowBits()) << 3) |
+ static_cast<uint8_t>(base_in.LowBits());
length_ = 2;
}
@@ -148,10 +148,10 @@
explicit Operand(CpuRegister reg) : rex_(0), length_(0) { SetModRM(3, reg); }
// Get the operand encoding byte at the given index.
- uint8_t encoding_at(int index) const {
- CHECK_GE(index, 0);
- CHECK_LT(index, length_);
- return encoding_[index];
+ uint8_t encoding_at(int index_in) const {
+ CHECK_GE(index_in, 0);
+ CHECK_LT(index_in, length_);
+ return encoding_[index_in];
}
friend class X86_64Assembler;
@@ -160,64 +160,64 @@
class Address : public Operand {
public:
- Address(CpuRegister base, int32_t disp) {
- Init(base, disp);
+ Address(CpuRegister base_in, int32_t disp) {
+ Init(base_in, disp);
}
- Address(CpuRegister base, Offset disp) {
- Init(base, disp.Int32Value());
+ Address(CpuRegister base_in, Offset disp) {
+ Init(base_in, disp.Int32Value());
}
- Address(CpuRegister base, FrameOffset disp) {
- CHECK_EQ(base.AsRegister(), RSP);
+ Address(CpuRegister base_in, FrameOffset disp) {
+ CHECK_EQ(base_in.AsRegister(), RSP);
Init(CpuRegister(RSP), disp.Int32Value());
}
- Address(CpuRegister base, MemberOffset disp) {
- Init(base, disp.Int32Value());
+ Address(CpuRegister base_in, MemberOffset disp) {
+ Init(base_in, disp.Int32Value());
}
- void Init(CpuRegister base, int32_t disp) {
- if (disp == 0 && base.AsRegister() != RBP) {
- SetModRM(0, base);
- if (base.AsRegister() == RSP) {
- SetSIB(TIMES_1, CpuRegister(RSP), base);
+ void Init(CpuRegister base_in, int32_t disp) {
+ if (disp == 0 && base_in.AsRegister() != RBP) {
+ SetModRM(0, base_in);
+ if (base_in.AsRegister() == RSP) {
+ SetSIB(TIMES_1, CpuRegister(RSP), base_in);
}
} else if (disp >= -128 && disp <= 127) {
- SetModRM(1, base);
- if (base.AsRegister() == RSP) {
- SetSIB(TIMES_1, CpuRegister(RSP), base);
+ SetModRM(1, base_in);
+ if (base_in.AsRegister() == RSP) {
+ SetSIB(TIMES_1, CpuRegister(RSP), base_in);
}
SetDisp8(disp);
} else {
- SetModRM(2, base);
- if (base.AsRegister() == RSP) {
- SetSIB(TIMES_1, CpuRegister(RSP), base);
+ SetModRM(2, base_in);
+ if (base_in.AsRegister() == RSP) {
+ SetSIB(TIMES_1, CpuRegister(RSP), base_in);
}
SetDisp32(disp);
}
}
- Address(CpuRegister index, ScaleFactor scale, int32_t disp) {
- CHECK_NE(index.AsRegister(), RSP); // Illegal addressing mode.
+ Address(CpuRegister index_in, ScaleFactor scale_in, int32_t disp) {
+ CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode.
SetModRM(0, CpuRegister(RSP));
- SetSIB(scale, index, CpuRegister(RBP));
+ SetSIB(scale_in, index_in, CpuRegister(RBP));
SetDisp32(disp);
}
- Address(CpuRegister base, CpuRegister index, ScaleFactor scale, int32_t disp) {
- CHECK_NE(index.AsRegister(), RSP); // Illegal addressing mode.
- if (disp == 0 && base.AsRegister() != RBP) {
+ Address(CpuRegister base_in, CpuRegister index_in, ScaleFactor scale_in, int32_t disp) {
+ CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode.
+ if (disp == 0 && base_in.AsRegister() != RBP) {
SetModRM(0, CpuRegister(RSP));
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
} else if (disp >= -128 && disp <= 127) {
SetModRM(1, CpuRegister(RSP));
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
SetDisp8(disp);
} else {
SetModRM(2, CpuRegister(RSP));
- SetSIB(scale, index, base);
+ SetSIB(scale_in, index_in, base_in);
SetDisp32(disp);
}
}