Add a prepare for register allocation pass.
- Currently the pass just changes the uses of checks to the
actual values.
- Also optimize array access, now that inputs can be constants.
- And fix another bug in the register allocator reveiled by
this change.
Change-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index f888d46..a2cbd8b 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -243,6 +243,17 @@
}
+void X86Assembler::movw(const Address& dst, const Immediate& imm) {
+ AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ EmitOperandSizeOverride();
+ EmitUint8(0xC7);
+ EmitOperand(0, dst);
+ CHECK(imm.is_int16());
+ EmitUint8(imm.value() & 0xFF);
+ EmitUint8(imm.value() >> 8);
+}
+
+
void X86Assembler::leal(Register dst, const Address& src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x8D);
diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h
index ec983d9..2113c85 100644
--- a/compiler/utils/x86/assembler_x86.h
+++ b/compiler/utils/x86/assembler_x86.h
@@ -37,6 +37,7 @@
bool is_int8() const { return IsInt(8, value_); }
bool is_uint8() const { return IsUint(8, value_); }
+ bool is_int16() const { return IsInt(16, value_); }
bool is_uint16() const { return IsUint(16, value_); }
private:
@@ -251,6 +252,7 @@
void movsxw(Register dst, const Address& src);
void movw(Register dst, const Address& src);
void movw(const Address& dst, Register src);
+ void movw(const Address& dst, const Immediate& imm);
void leal(Register dst, const Address& src);
diff --git a/compiler/utils/x86_64/assembler_x86_64.cc b/compiler/utils/x86_64/assembler_x86_64.cc
index f432e66..ade7a13 100644
--- a/compiler/utils/x86_64/assembler_x86_64.cc
+++ b/compiler/utils/x86_64/assembler_x86_64.cc
@@ -234,6 +234,7 @@
void X86_64Assembler::movb(const Address& dst, const Immediate& imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ EmitOptionalRex32(dst);
EmitUint8(0xC6);
EmitOperand(Register::RAX, dst);
CHECK(imm.is_int8());
@@ -291,6 +292,18 @@
}
+void X86_64Assembler::movw(const Address& dst, const Immediate& imm) {
+ AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ EmitOperandSizeOverride();
+ EmitOptionalRex32(dst);
+ EmitUint8(0xC7);
+ EmitOperand(Register::RAX, dst);
+ CHECK(imm.is_int16());
+ EmitUint8(imm.value() & 0xFF);
+ EmitUint8(imm.value() >> 8);
+}
+
+
void X86_64Assembler::leaq(CpuRegister dst, const Address& src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitRex64(dst, src);
diff --git a/compiler/utils/x86_64/assembler_x86_64.h b/compiler/utils/x86_64/assembler_x86_64.h
index 1fd65c2..c3e6e3b 100644
--- a/compiler/utils/x86_64/assembler_x86_64.h
+++ b/compiler/utils/x86_64/assembler_x86_64.h
@@ -44,6 +44,7 @@
bool is_int8() const { return IsInt(8, value_); }
bool is_uint8() const { return IsUint(8, value_); }
+ bool is_int16() const { return IsInt(16, value_); }
bool is_uint16() const { return IsUint(16, value_); }
bool is_int32() const {
// This does not work on 32b machines: return IsInt(32, value_);
@@ -295,6 +296,7 @@
void movsxw(CpuRegister dst, const Address& src);
void movw(CpuRegister dst, const Address& src);
void movw(const Address& dst, CpuRegister src);
+ void movw(const Address& dst, const Immediate& imm);
void leaq(CpuRegister dst, const Address& src);