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Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
Paul Mackerras14cf11a2005-09-26 16:04:21 +10002 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
Paul Mackerras14cf11a2005-09-26 16:04:21 +100017#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100022#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100028#include <linux/prctl.h>
29#include <linux/init_task.h>
Paul Gortmaker4b16f8e2011-07-22 18:24:23 -040030#include <linux/export.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100031#include <linux/kallsyms.h>
32#include <linux/mqueue.h>
33#include <linux/hardirq.h>
Paul Mackerras06d67d52005-10-10 22:29:05 +100034#include <linux/utsname.h>
Steven Rostedt6794c782009-02-09 21:10:27 -080035#include <linux/ftrace.h>
Martin Schwidefsky79741dd2008-12-31 15:11:38 +010036#include <linux/kernel_stat.h>
Anton Blanchardd8390882009-02-22 01:50:03 +000037#include <linux/personality.h>
38#include <linux/random.h>
K.Prasad5aae8a52010-06-15 11:35:19 +053039#include <linux/hw_breakpoint.h>
Anton Blanchard7b051f62014-10-13 20:27:15 +110040#include <linux/uaccess.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100041
42#include <asm/pgtable.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100043#include <asm/io.h>
44#include <asm/processor.h>
45#include <asm/mmu.h>
46#include <asm/prom.h>
Michael Ellerman76032de2005-11-07 13:12:03 +110047#include <asm/machdep.h>
Paul Mackerrasc6622f62006-02-24 10:06:59 +110048#include <asm/time.h>
David Howellsae3a1972012-03-28 18:30:02 +010049#include <asm/runlatch.h>
Arnd Bergmanna7f31842006-03-23 00:00:08 +010050#include <asm/syscalls.h>
David Howellsae3a1972012-03-28 18:30:02 +010051#include <asm/switch_to.h>
Michael Neulingfb096922013-02-13 16:21:37 +000052#include <asm/tm.h>
David Howellsae3a1972012-03-28 18:30:02 +010053#include <asm/debug.h>
Paul Mackerras06d67d52005-10-10 22:29:05 +100054#ifdef CONFIG_PPC64
55#include <asm/firmware.h>
Paul Mackerras06d67d52005-10-10 22:29:05 +100056#endif
Anton Blanchard7cedd602014-02-04 16:08:51 +110057#include <asm/code-patching.h>
Luis Machadod6a61bf2008-07-24 02:10:41 +100058#include <linux/kprobes.h>
59#include <linux/kdebug.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100060
Michael Neuling8b3c34c2013-02-13 16:21:32 +000061/* Transactional Memory debug */
62#ifdef TM_DEBUG_SW
63#define TM_DEBUG(x...) printk(KERN_INFO x)
64#else
65#define TM_DEBUG(x...) do { } while(0)
66#endif
67
Paul Mackerras14cf11a2005-09-26 16:04:21 +100068extern unsigned long _get_SP(void);
69
70#ifndef CONFIG_SMP
71struct task_struct *last_task_used_math = NULL;
72struct task_struct *last_task_used_altivec = NULL;
Michael Neulingce48b212008-06-25 14:07:18 +100073struct task_struct *last_task_used_vsx = NULL;
Paul Mackerras14cf11a2005-09-26 16:04:21 +100074struct task_struct *last_task_used_spe = NULL;
75#endif
76
Paul Mackerrasd31626f2014-01-13 15:56:29 +110077#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
78void giveup_fpu_maybe_transactional(struct task_struct *tsk)
79{
80 /*
81 * If we are saving the current thread's registers, and the
82 * thread is in a transactional state, set the TIF_RESTORE_TM
83 * bit so that we know to restore the registers before
84 * returning to userspace.
85 */
86 if (tsk == current && tsk->thread.regs &&
87 MSR_TM_ACTIVE(tsk->thread.regs->msr) &&
88 !test_thread_flag(TIF_RESTORE_TM)) {
89 tsk->thread.tm_orig_msr = tsk->thread.regs->msr;
90 set_thread_flag(TIF_RESTORE_TM);
91 }
92
93 giveup_fpu(tsk);
94}
95
96void giveup_altivec_maybe_transactional(struct task_struct *tsk)
97{
98 /*
99 * If we are saving the current thread's registers, and the
100 * thread is in a transactional state, set the TIF_RESTORE_TM
101 * bit so that we know to restore the registers before
102 * returning to userspace.
103 */
104 if (tsk == current && tsk->thread.regs &&
105 MSR_TM_ACTIVE(tsk->thread.regs->msr) &&
106 !test_thread_flag(TIF_RESTORE_TM)) {
107 tsk->thread.tm_orig_msr = tsk->thread.regs->msr;
108 set_thread_flag(TIF_RESTORE_TM);
109 }
110
111 giveup_altivec(tsk);
112}
113
114#else
115#define giveup_fpu_maybe_transactional(tsk) giveup_fpu(tsk)
116#define giveup_altivec_maybe_transactional(tsk) giveup_altivec(tsk)
117#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
118
Kevin Hao037f0ee2013-07-14 17:02:05 +0800119#ifdef CONFIG_PPC_FPU
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000120/*
121 * Make sure the floating-point register state in the
122 * the thread_struct is up to date for task tsk.
123 */
124void flush_fp_to_thread(struct task_struct *tsk)
125{
126 if (tsk->thread.regs) {
127 /*
128 * We need to disable preemption here because if we didn't,
129 * another process could get scheduled after the regs->msr
130 * test but before we have finished saving the FP registers
131 * to the thread_struct. That process could take over the
132 * FPU, and then when we get scheduled again we would store
133 * bogus values for the remaining FP registers.
134 */
135 preempt_disable();
136 if (tsk->thread.regs->msr & MSR_FP) {
137#ifdef CONFIG_SMP
138 /*
139 * This should only ever be called for current or
140 * for a stopped child process. Since we save away
141 * the FP register state on context switch on SMP,
142 * there is something wrong if a stopped child appears
143 * to still have its FP state in the CPU registers.
144 */
145 BUG_ON(tsk != current);
146#endif
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100147 giveup_fpu_maybe_transactional(tsk);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000148 }
149 preempt_enable();
150 }
151}
Paul Mackerrasde56a942011-06-29 00:21:34 +0000152EXPORT_SYMBOL_GPL(flush_fp_to_thread);
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100153#endif /* CONFIG_PPC_FPU */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000154
155void enable_kernel_fp(void)
156{
157 WARN_ON(preemptible());
158
159#ifdef CONFIG_SMP
160 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100161 giveup_fpu_maybe_transactional(current);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000162 else
163 giveup_fpu(NULL); /* just enables FP for kernel */
164#else
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100165 giveup_fpu_maybe_transactional(last_task_used_math);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000166#endif /* CONFIG_SMP */
167}
168EXPORT_SYMBOL(enable_kernel_fp);
169
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000170#ifdef CONFIG_ALTIVEC
171void enable_kernel_altivec(void)
172{
173 WARN_ON(preemptible());
174
175#ifdef CONFIG_SMP
176 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100177 giveup_altivec_maybe_transactional(current);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000178 else
Anton Blanchard35000872012-04-15 20:56:45 +0000179 giveup_altivec_notask();
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000180#else
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100181 giveup_altivec_maybe_transactional(last_task_used_altivec);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000182#endif /* CONFIG_SMP */
183}
184EXPORT_SYMBOL(enable_kernel_altivec);
185
186/*
187 * Make sure the VMX/Altivec register state in the
188 * the thread_struct is up to date for task tsk.
189 */
190void flush_altivec_to_thread(struct task_struct *tsk)
191{
192 if (tsk->thread.regs) {
193 preempt_disable();
194 if (tsk->thread.regs->msr & MSR_VEC) {
195#ifdef CONFIG_SMP
196 BUG_ON(tsk != current);
197#endif
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100198 giveup_altivec_maybe_transactional(tsk);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000199 }
200 preempt_enable();
201 }
202}
Paul Mackerrasde56a942011-06-29 00:21:34 +0000203EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000204#endif /* CONFIG_ALTIVEC */
205
Michael Neulingce48b212008-06-25 14:07:18 +1000206#ifdef CONFIG_VSX
207#if 0
208/* not currently used, but some crazy RAID module might want to later */
209void enable_kernel_vsx(void)
210{
211 WARN_ON(preemptible());
212
213#ifdef CONFIG_SMP
214 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
215 giveup_vsx(current);
216 else
217 giveup_vsx(NULL); /* just enable vsx for kernel - force */
218#else
219 giveup_vsx(last_task_used_vsx);
220#endif /* CONFIG_SMP */
221}
222EXPORT_SYMBOL(enable_kernel_vsx);
223#endif
224
Michael Neuling7c292172008-07-11 16:29:12 +1000225void giveup_vsx(struct task_struct *tsk)
226{
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100227 giveup_fpu_maybe_transactional(tsk);
228 giveup_altivec_maybe_transactional(tsk);
Michael Neuling7c292172008-07-11 16:29:12 +1000229 __giveup_vsx(tsk);
230}
Anton Blancharde1802b02014-08-20 08:00:02 +1000231EXPORT_SYMBOL(giveup_vsx);
Michael Neuling7c292172008-07-11 16:29:12 +1000232
Michael Neulingce48b212008-06-25 14:07:18 +1000233void flush_vsx_to_thread(struct task_struct *tsk)
234{
235 if (tsk->thread.regs) {
236 preempt_disable();
237 if (tsk->thread.regs->msr & MSR_VSX) {
238#ifdef CONFIG_SMP
239 BUG_ON(tsk != current);
240#endif
241 giveup_vsx(tsk);
242 }
243 preempt_enable();
244 }
245}
Paul Mackerrasde56a942011-06-29 00:21:34 +0000246EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
Michael Neulingce48b212008-06-25 14:07:18 +1000247#endif /* CONFIG_VSX */
248
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000249#ifdef CONFIG_SPE
250
251void enable_kernel_spe(void)
252{
253 WARN_ON(preemptible());
254
255#ifdef CONFIG_SMP
256 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
257 giveup_spe(current);
258 else
259 giveup_spe(NULL); /* just enable SPE for kernel - force */
260#else
261 giveup_spe(last_task_used_spe);
262#endif /* __SMP __ */
263}
264EXPORT_SYMBOL(enable_kernel_spe);
265
266void flush_spe_to_thread(struct task_struct *tsk)
267{
268 if (tsk->thread.regs) {
269 preempt_disable();
270 if (tsk->thread.regs->msr & MSR_SPE) {
271#ifdef CONFIG_SMP
272 BUG_ON(tsk != current);
273#endif
yu liu685659e2011-06-14 18:34:25 -0500274 tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
Kumar Gala0ee6c152007-08-28 21:15:53 -0500275 giveup_spe(tsk);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000276 }
277 preempt_enable();
278 }
279}
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000280#endif /* CONFIG_SPE */
281
Paul Mackerras5388fb12006-01-11 22:11:39 +1100282#ifndef CONFIG_SMP
Paul Mackerras48abec02005-11-30 13:20:54 +1100283/*
284 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
285 * and the current task has some state, discard it.
286 */
Paul Mackerras5388fb12006-01-11 22:11:39 +1100287void discard_lazy_cpu_state(void)
Paul Mackerras48abec02005-11-30 13:20:54 +1100288{
Paul Mackerras48abec02005-11-30 13:20:54 +1100289 preempt_disable();
290 if (last_task_used_math == current)
291 last_task_used_math = NULL;
292#ifdef CONFIG_ALTIVEC
293 if (last_task_used_altivec == current)
294 last_task_used_altivec = NULL;
295#endif /* CONFIG_ALTIVEC */
Michael Neulingce48b212008-06-25 14:07:18 +1000296#ifdef CONFIG_VSX
297 if (last_task_used_vsx == current)
298 last_task_used_vsx = NULL;
299#endif /* CONFIG_VSX */
Paul Mackerras48abec02005-11-30 13:20:54 +1100300#ifdef CONFIG_SPE
301 if (last_task_used_spe == current)
302 last_task_used_spe = NULL;
303#endif
304 preempt_enable();
Paul Mackerras48abec02005-11-30 13:20:54 +1100305}
Paul Mackerras5388fb12006-01-11 22:11:39 +1100306#endif /* CONFIG_SMP */
Paul Mackerras48abec02005-11-30 13:20:54 +1100307
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000308#ifdef CONFIG_PPC_ADV_DEBUG_REGS
309void do_send_trap(struct pt_regs *regs, unsigned long address,
310 unsigned long error_code, int signal_code, int breakpt)
311{
312 siginfo_t info;
313
Ananth N Mavinakayanahalli41ab5262012-08-23 21:27:09 +0000314 current->thread.trap_nr = signal_code;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000315 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
316 11, SIGSEGV) == NOTIFY_STOP)
317 return;
318
319 /* Deliver the signal to userspace */
320 info.si_signo = SIGTRAP;
321 info.si_errno = breakpt; /* breakpoint or watchpoint id */
322 info.si_code = signal_code;
323 info.si_addr = (void __user *)address;
324 force_sig_info(SIGTRAP, &info, current);
325}
326#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
Michael Neuling9422de32012-12-20 14:06:44 +0000327void do_break (struct pt_regs *regs, unsigned long address,
Luis Machadod6a61bf2008-07-24 02:10:41 +1000328 unsigned long error_code)
329{
330 siginfo_t info;
331
Ananth N Mavinakayanahalli41ab5262012-08-23 21:27:09 +0000332 current->thread.trap_nr = TRAP_HWBKPT;
Luis Machadod6a61bf2008-07-24 02:10:41 +1000333 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
334 11, SIGSEGV) == NOTIFY_STOP)
335 return;
336
Michael Neuling9422de32012-12-20 14:06:44 +0000337 if (debugger_break_match(regs))
Luis Machadod6a61bf2008-07-24 02:10:41 +1000338 return;
339
Michael Neuling9422de32012-12-20 14:06:44 +0000340 /* Clear the breakpoint */
341 hw_breakpoint_disable();
Luis Machadod6a61bf2008-07-24 02:10:41 +1000342
343 /* Deliver the signal to userspace */
344 info.si_signo = SIGTRAP;
345 info.si_errno = 0;
346 info.si_code = TRAP_HWBKPT;
347 info.si_addr = (void __user *)address;
348 force_sig_info(SIGTRAP, &info, current);
349}
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000350#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
Luis Machadod6a61bf2008-07-24 02:10:41 +1000351
Michael Neuling9422de32012-12-20 14:06:44 +0000352static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk);
Michael Ellermana2ceff52008-03-28 19:11:48 +1100353
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000354#ifdef CONFIG_PPC_ADV_DEBUG_REGS
355/*
356 * Set the debug registers back to their default "safe" values.
357 */
358static void set_debug_reg_defaults(struct thread_struct *thread)
359{
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530360 thread->debug.iac1 = thread->debug.iac2 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000361#if CONFIG_PPC_ADV_DEBUG_IACS > 2
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530362 thread->debug.iac3 = thread->debug.iac4 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000363#endif
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530364 thread->debug.dac1 = thread->debug.dac2 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000365#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530366 thread->debug.dvc1 = thread->debug.dvc2 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000367#endif
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530368 thread->debug.dbcr0 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000369#ifdef CONFIG_BOOKE
370 /*
371 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
372 */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530373 thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US |
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000374 DBCR1_IAC3US | DBCR1_IAC4US;
375 /*
376 * Force Data Address Compare User/Supervisor bits to be User-only
377 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
378 */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530379 thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000380#else
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530381 thread->debug.dbcr1 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000382#endif
383}
384
Scott Woodf5f97212013-11-22 15:52:29 -0600385static void prime_debug_regs(struct debug_reg *debug)
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000386{
Scott Wood6cecf762013-05-13 14:14:53 +0000387 /*
388 * We could have inherited MSR_DE from userspace, since
389 * it doesn't get cleared on exception entry. Make sure
390 * MSR_DE is clear before we enable any debug events.
391 */
392 mtmsr(mfmsr() & ~MSR_DE);
393
Scott Woodf5f97212013-11-22 15:52:29 -0600394 mtspr(SPRN_IAC1, debug->iac1);
395 mtspr(SPRN_IAC2, debug->iac2);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000396#if CONFIG_PPC_ADV_DEBUG_IACS > 2
Scott Woodf5f97212013-11-22 15:52:29 -0600397 mtspr(SPRN_IAC3, debug->iac3);
398 mtspr(SPRN_IAC4, debug->iac4);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000399#endif
Scott Woodf5f97212013-11-22 15:52:29 -0600400 mtspr(SPRN_DAC1, debug->dac1);
401 mtspr(SPRN_DAC2, debug->dac2);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000402#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
Scott Woodf5f97212013-11-22 15:52:29 -0600403 mtspr(SPRN_DVC1, debug->dvc1);
404 mtspr(SPRN_DVC2, debug->dvc2);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000405#endif
Scott Woodf5f97212013-11-22 15:52:29 -0600406 mtspr(SPRN_DBCR0, debug->dbcr0);
407 mtspr(SPRN_DBCR1, debug->dbcr1);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000408#ifdef CONFIG_BOOKE
Scott Woodf5f97212013-11-22 15:52:29 -0600409 mtspr(SPRN_DBCR2, debug->dbcr2);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000410#endif
411}
412/*
413 * Unless neither the old or new thread are making use of the
414 * debug registers, set the debug registers from the values
415 * stored in the new thread.
416 */
Scott Woodf5f97212013-11-22 15:52:29 -0600417void switch_booke_debug_regs(struct debug_reg *new_debug)
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000418{
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530419 if ((current->thread.debug.dbcr0 & DBCR0_IDM)
Scott Woodf5f97212013-11-22 15:52:29 -0600420 || (new_debug->dbcr0 & DBCR0_IDM))
421 prime_debug_regs(new_debug);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000422}
Bharat Bhushan3743c9b2013-07-04 12:27:44 +0530423EXPORT_SYMBOL_GPL(switch_booke_debug_regs);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000424#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
K.Prasade0780b72011-02-10 04:44:35 +0000425#ifndef CONFIG_HAVE_HW_BREAKPOINT
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000426static void set_debug_reg_defaults(struct thread_struct *thread)
427{
Michael Neuling9422de32012-12-20 14:06:44 +0000428 thread->hw_brk.address = 0;
429 thread->hw_brk.type = 0;
Michael Neulingb9818c32013-01-10 14:25:34 +0000430 set_breakpoint(&thread->hw_brk);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000431}
K.Prasade0780b72011-02-10 04:44:35 +0000432#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000433#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
434
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000435#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Michael Neuling9422de32012-12-20 14:06:44 +0000436static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
437{
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000438 mtspr(SPRN_DAC1, dabr);
Dave Kleikamp221c1852010-03-05 10:43:24 +0000439#ifdef CONFIG_PPC_47x
440 isync();
441#endif
Michael Neuling9422de32012-12-20 14:06:44 +0000442 return 0;
443}
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000444#elif defined(CONFIG_PPC_BOOK3S)
Michael Neuling9422de32012-12-20 14:06:44 +0000445static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
446{
Michael Ellermancab0af92005-11-03 15:30:49 +1100447 mtspr(SPRN_DABR, dabr);
Michael Neuling82a9f162013-05-16 20:27:31 +0000448 if (cpu_has_feature(CPU_FTR_DABRX))
449 mtspr(SPRN_DABRX, dabrx);
Michael Ellermancab0af92005-11-03 15:30:49 +1100450 return 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000451}
Michael Neuling9422de32012-12-20 14:06:44 +0000452#else
453static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
454{
455 return -EINVAL;
456}
457#endif
458
459static inline int set_dabr(struct arch_hw_breakpoint *brk)
460{
461 unsigned long dabr, dabrx;
462
463 dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR);
464 dabrx = ((brk->type >> 3) & 0x7);
465
466 if (ppc_md.set_dabr)
467 return ppc_md.set_dabr(dabr, dabrx);
468
469 return __set_dabr(dabr, dabrx);
470}
471
Michael Neulingbf99de32012-12-20 14:06:45 +0000472static inline int set_dawr(struct arch_hw_breakpoint *brk)
473{
Michael Neuling05d694e2013-01-24 15:02:58 +0000474 unsigned long dawr, dawrx, mrd;
Michael Neulingbf99de32012-12-20 14:06:45 +0000475
476 dawr = brk->address;
477
478 dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \
479 << (63 - 58); //* read/write bits */
480 dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \
481 << (63 - 59); //* translate */
482 dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \
483 >> 3; //* PRIM bits */
Michael Neuling05d694e2013-01-24 15:02:58 +0000484 /* dawr length is stored in field MDR bits 48:53. Matches range in
485 doublewords (64 bits) baised by -1 eg. 0b000000=1DW and
486 0b111111=64DW.
487 brk->len is in bytes.
488 This aligns up to double word size, shifts and does the bias.
489 */
490 mrd = ((brk->len + 7) >> 3) - 1;
491 dawrx |= (mrd & 0x3f) << (63 - 53);
Michael Neulingbf99de32012-12-20 14:06:45 +0000492
493 if (ppc_md.set_dawr)
494 return ppc_md.set_dawr(dawr, dawrx);
495 mtspr(SPRN_DAWR, dawr);
496 mtspr(SPRN_DAWRX, dawrx);
497 return 0;
498}
499
Paul Gortmaker21f58502014-04-29 15:25:17 -0400500void __set_breakpoint(struct arch_hw_breakpoint *brk)
Michael Neuling9422de32012-12-20 14:06:44 +0000501{
Christoph Lameter69111ba2014-10-21 15:23:25 -0500502 memcpy(this_cpu_ptr(&current_brk), brk, sizeof(*brk));
Michael Neuling9422de32012-12-20 14:06:44 +0000503
Michael Neulingbf99de32012-12-20 14:06:45 +0000504 if (cpu_has_feature(CPU_FTR_DAWR))
Paul Gortmaker04c32a52014-04-29 15:25:16 -0400505 set_dawr(brk);
506 else
507 set_dabr(brk);
Michael Neuling9422de32012-12-20 14:06:44 +0000508}
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000509
Paul Gortmaker21f58502014-04-29 15:25:17 -0400510void set_breakpoint(struct arch_hw_breakpoint *brk)
511{
512 preempt_disable();
513 __set_breakpoint(brk);
514 preempt_enable();
515}
516
Paul Mackerras06d67d52005-10-10 22:29:05 +1000517#ifdef CONFIG_PPC64
518DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000519#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000520
Michael Neuling9422de32012-12-20 14:06:44 +0000521static inline bool hw_brk_match(struct arch_hw_breakpoint *a,
522 struct arch_hw_breakpoint *b)
523{
524 if (a->address != b->address)
525 return false;
526 if (a->type != b->type)
527 return false;
528 if (a->len != b->len)
529 return false;
530 return true;
531}
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100532
Michael Neulingfb096922013-02-13 16:21:37 +0000533#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100534static void tm_reclaim_thread(struct thread_struct *thr,
535 struct thread_info *ti, uint8_t cause)
536{
537 unsigned long msr_diff = 0;
538
539 /*
540 * If FP/VSX registers have been already saved to the
541 * thread_struct, move them to the transact_fp array.
542 * We clear the TIF_RESTORE_TM bit since after the reclaim
543 * the thread will no longer be transactional.
544 */
545 if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) {
546 msr_diff = thr->tm_orig_msr & ~thr->regs->msr;
547 if (msr_diff & MSR_FP)
548 memcpy(&thr->transact_fp, &thr->fp_state,
549 sizeof(struct thread_fp_state));
550 if (msr_diff & MSR_VEC)
551 memcpy(&thr->transact_vr, &thr->vr_state,
552 sizeof(struct thread_vr_state));
553 clear_ti_thread_flag(ti, TIF_RESTORE_TM);
554 msr_diff &= MSR_FP | MSR_VEC | MSR_VSX | MSR_FE0 | MSR_FE1;
555 }
556
557 tm_reclaim(thr, thr->regs->msr, cause);
558
559 /* Having done the reclaim, we now have the checkpointed
560 * FP/VSX values in the registers. These might be valid
561 * even if we have previously called enable_kernel_fp() or
562 * flush_fp_to_thread(), so update thr->regs->msr to
563 * indicate their current validity.
564 */
565 thr->regs->msr |= msr_diff;
566}
567
568void tm_reclaim_current(uint8_t cause)
569{
570 tm_enable();
571 tm_reclaim_thread(&current->thread, current_thread_info(), cause);
572}
573
Michael Neulingfb096922013-02-13 16:21:37 +0000574static inline void tm_reclaim_task(struct task_struct *tsk)
575{
576 /* We have to work out if we're switching from/to a task that's in the
577 * middle of a transaction.
578 *
579 * In switching we need to maintain a 2nd register state as
580 * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the
581 * checkpointed (tbegin) state in ckpt_regs and saves the transactional
582 * (current) FPRs into oldtask->thread.transact_fpr[].
583 *
584 * We also context switch (save) TFHAR/TEXASR/TFIAR in here.
585 */
586 struct thread_struct *thr = &tsk->thread;
587
588 if (!thr->regs)
589 return;
590
591 if (!MSR_TM_ACTIVE(thr->regs->msr))
592 goto out_and_saveregs;
593
594 /* Stash the original thread MSR, as giveup_fpu et al will
595 * modify it. We hold onto it to see whether the task used
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100596 * FP & vector regs. If the TIF_RESTORE_TM flag is set,
597 * tm_orig_msr is already set.
Michael Neulingfb096922013-02-13 16:21:37 +0000598 */
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100599 if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM))
600 thr->tm_orig_msr = thr->regs->msr;
Michael Neulingfb096922013-02-13 16:21:37 +0000601
602 TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "
603 "ccr=%lx, msr=%lx, trap=%lx)\n",
604 tsk->pid, thr->regs->nip,
605 thr->regs->ccr, thr->regs->msr,
606 thr->regs->trap);
607
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100608 tm_reclaim_thread(thr, task_thread_info(tsk), TM_CAUSE_RESCHED);
Michael Neulingfb096922013-02-13 16:21:37 +0000609
610 TM_DEBUG("--- tm_reclaim on pid %d complete\n",
611 tsk->pid);
612
613out_and_saveregs:
614 /* Always save the regs here, even if a transaction's not active.
615 * This context-switches a thread's TM info SPRs. We do it here to
616 * be consistent with the restore path (in recheckpoint) which
617 * cannot happen later in _switch().
618 */
619 tm_save_sprs(thr);
620}
621
Michael Neulinge6b8fd02014-04-04 20:19:48 +1100622extern void __tm_recheckpoint(struct thread_struct *thread,
623 unsigned long orig_msr);
624
625void tm_recheckpoint(struct thread_struct *thread,
626 unsigned long orig_msr)
627{
628 unsigned long flags;
629
630 /* We really can't be interrupted here as the TEXASR registers can't
631 * change and later in the trecheckpoint code, we have a userspace R1.
632 * So let's hard disable over this region.
633 */
634 local_irq_save(flags);
635 hard_irq_disable();
636
637 /* The TM SPRs are restored here, so that TEXASR.FS can be set
638 * before the trecheckpoint and no explosion occurs.
639 */
640 tm_restore_sprs(thread);
641
642 __tm_recheckpoint(thread, orig_msr);
643
644 local_irq_restore(flags);
645}
646
Michael Neulingbc2a9402013-02-13 16:21:40 +0000647static inline void tm_recheckpoint_new_task(struct task_struct *new)
Michael Neulingfb096922013-02-13 16:21:37 +0000648{
649 unsigned long msr;
650
651 if (!cpu_has_feature(CPU_FTR_TM))
652 return;
653
654 /* Recheckpoint the registers of the thread we're about to switch to.
655 *
656 * If the task was using FP, we non-lazily reload both the original and
657 * the speculative FP register states. This is because the kernel
658 * doesn't see if/when a TM rollback occurs, so if we take an FP
659 * unavoidable later, we are unable to determine which set of FP regs
660 * need to be restored.
661 */
662 if (!new->thread.regs)
663 return;
664
Michael Neulinge6b8fd02014-04-04 20:19:48 +1100665 if (!MSR_TM_ACTIVE(new->thread.regs->msr)){
666 tm_restore_sprs(&new->thread);
Michael Neulingfb096922013-02-13 16:21:37 +0000667 return;
Michael Neulinge6b8fd02014-04-04 20:19:48 +1100668 }
Michael Neulingfb096922013-02-13 16:21:37 +0000669 msr = new->thread.tm_orig_msr;
670 /* Recheckpoint to restore original checkpointed register state. */
671 TM_DEBUG("*** tm_recheckpoint of pid %d "
672 "(new->msr 0x%lx, new->origmsr 0x%lx)\n",
673 new->pid, new->thread.regs->msr, msr);
674
675 /* This loads the checkpointed FP/VEC state, if used */
676 tm_recheckpoint(&new->thread, msr);
677
678 /* This loads the speculative FP/VEC state, if used */
679 if (msr & MSR_FP) {
680 do_load_up_transact_fpu(&new->thread);
681 new->thread.regs->msr |=
682 (MSR_FP | new->thread.fpexc_mode);
683 }
Michael Neulingf110c0c2013-04-09 16:18:55 +1000684#ifdef CONFIG_ALTIVEC
Michael Neulingfb096922013-02-13 16:21:37 +0000685 if (msr & MSR_VEC) {
686 do_load_up_transact_altivec(&new->thread);
687 new->thread.regs->msr |= MSR_VEC;
688 }
Michael Neulingf110c0c2013-04-09 16:18:55 +1000689#endif
Michael Neulingfb096922013-02-13 16:21:37 +0000690 /* We may as well turn on VSX too since all the state is restored now */
691 if (msr & MSR_VSX)
692 new->thread.regs->msr |= MSR_VSX;
693
694 TM_DEBUG("*** tm_recheckpoint of pid %d complete "
695 "(kernel msr 0x%lx)\n",
696 new->pid, mfmsr());
697}
698
699static inline void __switch_to_tm(struct task_struct *prev)
700{
701 if (cpu_has_feature(CPU_FTR_TM)) {
702 tm_enable();
703 tm_reclaim_task(prev);
704 }
705}
Paul Mackerrasd31626f2014-01-13 15:56:29 +1100706
707/*
708 * This is called if we are on the way out to userspace and the
709 * TIF_RESTORE_TM flag is set. It checks if we need to reload
710 * FP and/or vector state and does so if necessary.
711 * If userspace is inside a transaction (whether active or
712 * suspended) and FP/VMX/VSX instructions have ever been enabled
713 * inside that transaction, then we have to keep them enabled
714 * and keep the FP/VMX/VSX state loaded while ever the transaction
715 * continues. The reason is that if we didn't, and subsequently
716 * got a FP/VMX/VSX unavailable interrupt inside a transaction,
717 * we don't know whether it's the same transaction, and thus we
718 * don't know which of the checkpointed state and the transactional
719 * state to use.
720 */
721void restore_tm_state(struct pt_regs *regs)
722{
723 unsigned long msr_diff;
724
725 clear_thread_flag(TIF_RESTORE_TM);
726 if (!MSR_TM_ACTIVE(regs->msr))
727 return;
728
729 msr_diff = current->thread.tm_orig_msr & ~regs->msr;
730 msr_diff &= MSR_FP | MSR_VEC | MSR_VSX;
731 if (msr_diff & MSR_FP) {
732 fp_enable();
733 load_fp_state(&current->thread.fp_state);
734 regs->msr |= current->thread.fpexc_mode;
735 }
736 if (msr_diff & MSR_VEC) {
737 vec_enable();
738 load_vr_state(&current->thread.vr_state);
739 }
740 regs->msr |= msr_diff;
741}
742
Michael Neulingfb096922013-02-13 16:21:37 +0000743#else
744#define tm_recheckpoint_new_task(new)
745#define __switch_to_tm(prev)
746#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
Michael Neuling9422de32012-12-20 14:06:44 +0000747
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000748struct task_struct *__switch_to(struct task_struct *prev,
749 struct task_struct *new)
750{
751 struct thread_struct *new_thread, *old_thread;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000752 struct task_struct *last;
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700753#ifdef CONFIG_PPC_BOOK3S_64
754 struct ppc64_tlb_batch *batch;
755#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000756
Michael Neuling7ba5fef2013-10-02 17:15:14 +1000757 WARN_ON(!irqs_disabled());
758
Sam bobroff96d01612014-06-05 16:19:22 +1000759 /* Back up the TAR and DSCR across context switches.
Michael Neulingc2d52642013-08-09 17:29:30 +1000760 * Note that the TAR is not available for use in the kernel. (To
761 * provide this, the TAR should be backed up/restored on exception
762 * entry/exit instead, and be in pt_regs. FIXME, this should be in
763 * pt_regs anyway (for debug).)
Sam bobroff96d01612014-06-05 16:19:22 +1000764 * Save the TAR and DSCR here before we do treclaim/trecheckpoint as
765 * these will change them.
Michael Neulingc2d52642013-08-09 17:29:30 +1000766 */
Sam bobroff96d01612014-06-05 16:19:22 +1000767 save_early_sprs(&prev->thread);
Michael Neulingc2d52642013-08-09 17:29:30 +1000768
Michael Neulingbc2a9402013-02-13 16:21:40 +0000769 __switch_to_tm(prev);
770
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000771#ifdef CONFIG_SMP
772 /* avoid complexity of lazy save/restore of fpu
773 * by just saving it every time we switch out if
774 * this task used the fpu during the last quantum.
775 *
776 * If it tries to use the fpu again, it'll trap and
777 * reload its fp regs. So we don't have to do a restore
778 * every switch, just a save.
779 * -- Cort
780 */
781 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
782 giveup_fpu(prev);
783#ifdef CONFIG_ALTIVEC
784 /*
785 * If the previous thread used altivec in the last quantum
786 * (thus changing altivec regs) then save them.
787 * We used to check the VRSAVE register but not all apps
788 * set it, so we don't rely on it now (and in fact we need
789 * to save & restore VSCR even if VRSAVE == 0). -- paulus
790 *
791 * On SMP we always save/restore altivec regs just to avoid the
792 * complexity of changing processors.
793 * -- Cort
794 */
795 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
796 giveup_altivec(prev);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000797#endif /* CONFIG_ALTIVEC */
Michael Neulingce48b212008-06-25 14:07:18 +1000798#ifdef CONFIG_VSX
799 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
Michael Neuling7c292172008-07-11 16:29:12 +1000800 /* VMX and FPU registers are already save here */
801 __giveup_vsx(prev);
Michael Neulingce48b212008-06-25 14:07:18 +1000802#endif /* CONFIG_VSX */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000803#ifdef CONFIG_SPE
804 /*
805 * If the previous thread used spe in the last quantum
806 * (thus changing spe regs) then save them.
807 *
808 * On SMP we always save/restore spe regs just to avoid the
809 * complexity of changing processors.
810 */
811 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
812 giveup_spe(prev);
Paul Mackerrasc0c0d992005-10-01 13:49:08 +1000813#endif /* CONFIG_SPE */
814
815#else /* CONFIG_SMP */
816#ifdef CONFIG_ALTIVEC
817 /* Avoid the trap. On smp this this never happens since
818 * we don't set last_task_used_altivec -- Cort
819 */
820 if (new->thread.regs && last_task_used_altivec == new)
821 new->thread.regs->msr |= MSR_VEC;
822#endif /* CONFIG_ALTIVEC */
Michael Neulingce48b212008-06-25 14:07:18 +1000823#ifdef CONFIG_VSX
824 if (new->thread.regs && last_task_used_vsx == new)
825 new->thread.regs->msr |= MSR_VSX;
826#endif /* CONFIG_VSX */
Paul Mackerrasc0c0d992005-10-01 13:49:08 +1000827#ifdef CONFIG_SPE
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000828 /* Avoid the trap. On smp this this never happens since
829 * we don't set last_task_used_spe
830 */
831 if (new->thread.regs && last_task_used_spe == new)
832 new->thread.regs->msr |= MSR_SPE;
833#endif /* CONFIG_SPE */
Paul Mackerrasc0c0d992005-10-01 13:49:08 +1000834
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000835#endif /* CONFIG_SMP */
836
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000837#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Scott Woodf5f97212013-11-22 15:52:29 -0600838 switch_booke_debug_regs(&new->thread.debug);
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000839#else
K.Prasad5aae8a52010-06-15 11:35:19 +0530840/*
841 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
842 * schedule DABR
843 */
844#ifndef CONFIG_HAVE_HW_BREAKPOINT
Christoph Lameter69111ba2014-10-21 15:23:25 -0500845 if (unlikely(!hw_brk_match(this_cpu_ptr(&current_brk), &new->thread.hw_brk)))
Paul Gortmaker21f58502014-04-29 15:25:17 -0400846 __set_breakpoint(&new->thread.hw_brk);
K.Prasad5aae8a52010-06-15 11:35:19 +0530847#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Luis Machadod6a61bf2008-07-24 02:10:41 +1000848#endif
849
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000850
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000851 new_thread = &new->thread;
852 old_thread = &current->thread;
Paul Mackerras06d67d52005-10-10 22:29:05 +1000853
854#ifdef CONFIG_PPC64
855 /*
856 * Collect processor utilization data per process
857 */
858 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
Christoph Lameter69111ba2014-10-21 15:23:25 -0500859 struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000860 long unsigned start_tb, current_tb;
861 start_tb = old_thread->start_tb;
862 cu->current_tb = current_tb = mfspr(SPRN_PURR);
863 old_thread->accum_tb += (current_tb - start_tb);
864 new_thread->start_tb = current_tb;
865 }
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700866#endif /* CONFIG_PPC64 */
867
868#ifdef CONFIG_PPC_BOOK3S_64
Christoph Lameter69111ba2014-10-21 15:23:25 -0500869 batch = this_cpu_ptr(&ppc64_tlb_batch);
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700870 if (batch->active) {
871 current_thread_info()->local_flags |= _TLF_LAZY_MMU;
872 if (batch->index)
873 __flush_tlb_pending(batch);
874 batch->active = 0;
875 }
876#endif /* CONFIG_PPC_BOOK3S_64 */
Paul Mackerras06d67d52005-10-10 22:29:05 +1000877
Anton Blanchard44387e92008-03-17 15:27:09 +1100878 /*
879 * We can't take a PMU exception inside _switch() since there is a
880 * window where the kernel stack SLB and the kernel stack are out
881 * of sync. Hard disable here.
882 */
883 hard_irq_disable();
Michael Neulingbc2a9402013-02-13 16:21:40 +0000884
885 tm_recheckpoint_new_task(new);
886
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000887 last = _switch(old_thread, new_thread);
888
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700889#ifdef CONFIG_PPC_BOOK3S_64
890 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
891 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
Christoph Lameter69111ba2014-10-21 15:23:25 -0500892 batch = this_cpu_ptr(&ppc64_tlb_batch);
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700893 batch->active = 1;
894 }
895#endif /* CONFIG_PPC_BOOK3S_64 */
896
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000897 return last;
898}
899
Paul Mackerras06d67d52005-10-10 22:29:05 +1000900static int instructions_to_print = 16;
901
Paul Mackerras06d67d52005-10-10 22:29:05 +1000902static void show_instructions(struct pt_regs *regs)
903{
904 int i;
905 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
906 sizeof(int));
907
908 printk("Instruction dump:");
909
910 for (i = 0; i < instructions_to_print; i++) {
911 int instr;
912
913 if (!(i % 8))
914 printk("\n");
915
Scott Wood0de2d822007-09-28 04:38:55 +1000916#if !defined(CONFIG_BOOKE)
917 /* If executing with the IMMU off, adjust pc rather
918 * than print XXXXXXXX.
919 */
920 if (!(regs->msr & MSR_IR))
921 pc = (unsigned long)phys_to_virt(pc);
922#endif
923
Anton Blanchard00ae36d2006-10-13 12:17:16 +1000924 if (!__kernel_text_address(pc) ||
Anton Blanchard7b051f62014-10-13 20:27:15 +1100925 probe_kernel_address((unsigned int __user *)pc, instr)) {
Ira Snyder40c8cef2012-01-06 12:34:07 +0000926 printk(KERN_CONT "XXXXXXXX ");
Paul Mackerras06d67d52005-10-10 22:29:05 +1000927 } else {
928 if (regs->nip == pc)
Ira Snyder40c8cef2012-01-06 12:34:07 +0000929 printk(KERN_CONT "<%08x> ", instr);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000930 else
Ira Snyder40c8cef2012-01-06 12:34:07 +0000931 printk(KERN_CONT "%08x ", instr);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000932 }
933
934 pc += sizeof(int);
935 }
936
937 printk("\n");
938}
939
940static struct regbit {
941 unsigned long bit;
942 const char *name;
943} msr_bits[] = {
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000944#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
945 {MSR_SF, "SF"},
946 {MSR_HV, "HV"},
947#endif
948 {MSR_VEC, "VEC"},
949 {MSR_VSX, "VSX"},
950#ifdef CONFIG_BOOKE
951 {MSR_CE, "CE"},
952#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +1000953 {MSR_EE, "EE"},
954 {MSR_PR, "PR"},
955 {MSR_FP, "FP"},
956 {MSR_ME, "ME"},
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000957#ifdef CONFIG_BOOKE
Kumar Gala1b983262008-11-19 04:39:53 +0000958 {MSR_DE, "DE"},
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000959#else
960 {MSR_SE, "SE"},
961 {MSR_BE, "BE"},
962#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +1000963 {MSR_IR, "IR"},
964 {MSR_DR, "DR"},
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000965 {MSR_PMM, "PMM"},
966#ifndef CONFIG_BOOKE
967 {MSR_RI, "RI"},
968 {MSR_LE, "LE"},
969#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +1000970 {0, NULL}
971};
972
973static void printbits(unsigned long val, struct regbit *bits)
974{
975 const char *sep = "";
976
977 printk("<");
978 for (; bits->bit; ++bits)
979 if (val & bits->bit) {
980 printk("%s%s", sep, bits->name);
981 sep = ",";
982 }
983 printk(">");
984}
985
986#ifdef CONFIG_PPC64
anton@samba.orgf6f7dde2007-03-20 20:38:19 -0500987#define REG "%016lx"
Paul Mackerras06d67d52005-10-10 22:29:05 +1000988#define REGS_PER_LINE 4
989#define LAST_VOLATILE 13
990#else
anton@samba.orgf6f7dde2007-03-20 20:38:19 -0500991#define REG "%08lx"
Paul Mackerras06d67d52005-10-10 22:29:05 +1000992#define REGS_PER_LINE 8
993#define LAST_VOLATILE 12
994#endif
995
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000996void show_regs(struct pt_regs * regs)
997{
998 int i, trap;
999
Tejun Heoa43cb952013-04-30 15:27:17 -07001000 show_regs_print_info(KERN_DEFAULT);
1001
Paul Mackerras06d67d52005-10-10 22:29:05 +10001002 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
1003 regs->nip, regs->link, regs->ctr);
1004 printk("REGS: %p TRAP: %04lx %s (%s)\n",
Serge E. Hallyn96b644b2006-10-02 02:18:13 -07001005 regs, regs->trap, print_tainted(), init_utsname()->release);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001006 printk("MSR: "REG" ", regs->msr);
1007 printbits(regs->msr, msr_bits);
anton@samba.orgf6f7dde2007-03-20 20:38:19 -05001008 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001009 trap = TRAP(regs);
Michael Neuling5115a022011-07-14 19:25:12 +00001010 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
Anton Blanchard9db8bcf2013-11-15 15:48:38 +11001011 printk("CFAR: "REG" ", regs->orig_gpr3);
Anton Blanchardc5400642013-11-15 15:41:19 +11001012 if (trap == 0x200 || trap == 0x300 || trap == 0x600)
Kumar Galaba28c9a2011-10-06 02:53:38 +00001013#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
Anton Blanchard9db8bcf2013-11-15 15:48:38 +11001014 printk("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr);
Kumar Gala14170782007-07-26 00:46:15 -05001015#else
Anton Blanchard9db8bcf2013-11-15 15:48:38 +11001016 printk("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr);
1017#endif
1018#ifdef CONFIG_PPC64
1019 printk("SOFTE: %ld ", regs->softe);
1020#endif
1021#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
Anton Blanchard6d888d12013-11-18 13:19:17 +11001022 if (MSR_TM_ACTIVE(regs->msr))
1023 printk("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch);
Kumar Gala14170782007-07-26 00:46:15 -05001024#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001025
1026 for (i = 0; i < 32; i++) {
Paul Mackerras06d67d52005-10-10 22:29:05 +10001027 if ((i % REGS_PER_LINE) == 0)
Kumar Galaa2367192009-06-18 22:29:55 +00001028 printk("\nGPR%02d: ", i);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001029 printk(REG " ", regs->gpr[i]);
1030 if (i == LAST_VOLATILE && !FULL_REGS(regs))
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001031 break;
1032 }
1033 printk("\n");
1034#ifdef CONFIG_KALLSYMS
1035 /*
1036 * Lookup NIP late so we have the best change of getting the
1037 * above info out without failing
1038 */
Benjamin Herrenschmidt058c78f2008-07-07 13:44:31 +10001039 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
1040 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001041#endif
1042 show_stack(current, (unsigned long *) regs->gpr[1]);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001043 if (!user_mode(regs))
1044 show_instructions(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001045}
1046
1047void exit_thread(void)
1048{
Paul Mackerras48abec02005-11-30 13:20:54 +11001049 discard_lazy_cpu_state();
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001050}
1051
1052void flush_thread(void)
1053{
Paul Mackerras48abec02005-11-30 13:20:54 +11001054 discard_lazy_cpu_state();
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001055
K.Prasade0780b72011-02-10 04:44:35 +00001056#ifdef CONFIG_HAVE_HW_BREAKPOINT
K.Prasad5aae8a52010-06-15 11:35:19 +05301057 flush_ptrace_hw_breakpoint(current);
K.Prasade0780b72011-02-10 04:44:35 +00001058#else /* CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001059 set_debug_reg_defaults(&current->thread);
K.Prasade0780b72011-02-10 04:44:35 +00001060#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001061}
1062
1063void
1064release_thread(struct task_struct *t)
1065{
1066}
1067
1068/*
Suresh Siddha55ccf3f2012-05-16 15:03:51 -07001069 * this gets called so that we can store coprocessor state into memory and
1070 * copy the current task into the new thread.
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001071 */
Suresh Siddha55ccf3f2012-05-16 15:03:51 -07001072int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001073{
Suresh Siddha55ccf3f2012-05-16 15:03:51 -07001074 flush_fp_to_thread(src);
1075 flush_altivec_to_thread(src);
1076 flush_vsx_to_thread(src);
1077 flush_spe_to_thread(src);
Michael Neuling621b5062014-03-03 14:21:40 +11001078 /*
1079 * Flush TM state out so we can copy it. __switch_to_tm() does this
1080 * flush but it removes the checkpointed state from the current CPU and
1081 * transitions the CPU out of TM mode. Hence we need to call
1082 * tm_recheckpoint_new_task() (on the same task) to restore the
1083 * checkpointed state back and the TM mode.
1084 */
1085 __switch_to_tm(src);
1086 tm_recheckpoint_new_task(src);
Michael Ellerman330a1eb2013-06-28 18:15:16 +10001087
Suresh Siddha55ccf3f2012-05-16 15:03:51 -07001088 *dst = *src;
Michael Ellerman330a1eb2013-06-28 18:15:16 +10001089
1090 clear_task_ebb(dst);
1091
Suresh Siddha55ccf3f2012-05-16 15:03:51 -07001092 return 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001093}
1094
Michael Ellermancec15482014-07-10 12:29:21 +10001095static void setup_ksp_vsid(struct task_struct *p, unsigned long sp)
1096{
1097#ifdef CONFIG_PPC_STD_MMU_64
1098 unsigned long sp_vsid;
1099 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
1100
1101 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1102 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
1103 << SLB_VSID_SHIFT_1T;
1104 else
1105 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
1106 << SLB_VSID_SHIFT;
1107 sp_vsid |= SLB_VSID_KERNEL | llp;
1108 p->thread.ksp_vsid = sp_vsid;
1109#endif
1110}
1111
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001112/*
1113 * Copy a thread..
1114 */
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001115extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
1116
Alexey Dobriyan6f2c55b2009-04-02 16:56:59 -07001117int copy_thread(unsigned long clone_flags, unsigned long usp,
Al Viroafa86fc2012-10-22 22:51:14 -04001118 unsigned long arg, struct task_struct *p)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001119{
1120 struct pt_regs *childregs, *kregs;
1121 extern void ret_from_fork(void);
Al Viro58254e12012-09-12 18:32:42 -04001122 extern void ret_from_kernel_thread(void);
1123 void (*f)(void);
Al Viro0cec6fd2006-01-12 01:06:02 -08001124 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001125
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001126 /* Copy registers */
1127 sp -= sizeof(struct pt_regs);
1128 childregs = (struct pt_regs *) sp;
Al Viroab758192012-10-21 22:33:39 -04001129 if (unlikely(p->flags & PF_KTHREAD)) {
Al Viro138d1ce2012-10-11 08:41:43 -04001130 struct thread_info *ti = (void *)task_stack_page(p);
Al Viro58254e12012-09-12 18:32:42 -04001131 memset(childregs, 0, sizeof(struct pt_regs));
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001132 childregs->gpr[1] = sp + sizeof(struct pt_regs);
Anton Blanchard7cedd602014-02-04 16:08:51 +11001133 /* function */
1134 if (usp)
1135 childregs->gpr[14] = ppc_function_entry((void *)usp);
Al Viro58254e12012-09-12 18:32:42 -04001136#ifdef CONFIG_PPC64
Al Virob5e2fc12006-01-12 01:06:01 -08001137 clear_tsk_thread_flag(p, TIF_32BIT);
Al Viro138d1ce2012-10-11 08:41:43 -04001138 childregs->softe = 1;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001139#endif
Al Viro58254e12012-09-12 18:32:42 -04001140 childregs->gpr[15] = arg;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001141 p->thread.regs = NULL; /* no user register state */
Al Viro138d1ce2012-10-11 08:41:43 -04001142 ti->flags |= _TIF_RESTOREALL;
Al Viro58254e12012-09-12 18:32:42 -04001143 f = ret_from_kernel_thread;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001144 } else {
Al Viroafa86fc2012-10-22 22:51:14 -04001145 struct pt_regs *regs = current_pt_regs();
Al Viro58254e12012-09-12 18:32:42 -04001146 CHECK_FULL_REGS(regs);
1147 *childregs = *regs;
Al Viroea516b12012-10-21 22:28:43 -04001148 if (usp)
1149 childregs->gpr[1] = usp;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001150 p->thread.regs = childregs;
Al Viro58254e12012-09-12 18:32:42 -04001151 childregs->gpr[3] = 0; /* Result from fork() */
Paul Mackerras06d67d52005-10-10 22:29:05 +10001152 if (clone_flags & CLONE_SETTLS) {
1153#ifdef CONFIG_PPC64
Denis Kirjanov9904b002010-07-29 22:04:39 +00001154 if (!is_32bit_task())
Paul Mackerras06d67d52005-10-10 22:29:05 +10001155 childregs->gpr[13] = childregs->gpr[6];
1156 else
1157#endif
1158 childregs->gpr[2] = childregs->gpr[6];
1159 }
Al Viro58254e12012-09-12 18:32:42 -04001160
1161 f = ret_from_fork;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001162 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001163 sp -= STACK_FRAME_OVERHEAD;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001164
1165 /*
1166 * The way this works is that at some point in the future
1167 * some task will call _switch to switch to the new task.
1168 * That will pop off the stack frame created below and start
1169 * the new task running at ret_from_fork. The new task will
1170 * do some house keeping and then return from the fork or clone
1171 * system call, using the stack frame created above.
1172 */
Li Zhongaf945cf2013-05-06 22:44:41 +00001173 ((unsigned long *)sp)[0] = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001174 sp -= sizeof(struct pt_regs);
1175 kregs = (struct pt_regs *) sp;
1176 sp -= STACK_FRAME_OVERHEAD;
1177 p->thread.ksp = sp;
Benjamin Herrenschmidtcbc95652013-09-24 15:17:21 +10001178#ifdef CONFIG_PPC32
Kumar Gala85218822008-04-28 16:21:22 +10001179 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
1180 _ALIGN_UP(sizeof(struct thread_info), 16);
Benjamin Herrenschmidtcbc95652013-09-24 15:17:21 +10001181#endif
Oleg Nesterov28d170a2013-04-21 06:47:59 +00001182#ifdef CONFIG_HAVE_HW_BREAKPOINT
1183 p->thread.ptrace_bps[0] = NULL;
1184#endif
1185
Paul Mackerras18461962013-09-10 20:21:10 +10001186 p->thread.fp_save_area = NULL;
1187#ifdef CONFIG_ALTIVEC
1188 p->thread.vr_save_area = NULL;
1189#endif
1190
Michael Ellermancec15482014-07-10 12:29:21 +10001191 setup_ksp_vsid(p, sp);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001192
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001193#ifdef CONFIG_PPC64
1194 if (cpu_has_feature(CPU_FTR_DSCR)) {
Anton Blanchard1021cb22012-09-03 16:49:47 +00001195 p->thread.dscr_inherit = current->thread.dscr_inherit;
1196 p->thread.dscr = current->thread.dscr;
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001197 }
Haren Myneni92779242012-12-06 21:49:56 +00001198 if (cpu_has_feature(CPU_FTR_HAS_PPR))
1199 p->thread.ppr = INIT_PPR;
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001200#endif
Anton Blanchard7cedd602014-02-04 16:08:51 +11001201 kregs->nip = ppc_function_entry(f);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001202 return 0;
1203}
1204
1205/*
1206 * Set up a thread for executing a new program
1207 */
Paul Mackerras06d67d52005-10-10 22:29:05 +10001208void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001209{
Michael Ellerman90eac722005-10-21 16:01:33 +10001210#ifdef CONFIG_PPC64
1211 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
1212#endif
1213
Paul Mackerras06d67d52005-10-10 22:29:05 +10001214 /*
1215 * If we exec out of a kernel thread then thread.regs will not be
1216 * set. Do it now.
1217 */
1218 if (!current->thread.regs) {
Al Viro0cec6fd2006-01-12 01:06:02 -08001219 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
1220 current->thread.regs = regs - 1;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001221 }
1222
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001223 memset(regs->gpr, 0, sizeof(regs->gpr));
1224 regs->ctr = 0;
1225 regs->link = 0;
1226 regs->xer = 0;
1227 regs->ccr = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001228 regs->gpr[1] = sp;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001229
Roland McGrath474f8192007-09-24 16:52:44 -07001230 /*
1231 * We have just cleared all the nonvolatile GPRs, so make
1232 * FULL_REGS(regs) return true. This is necessary to allow
1233 * ptrace to examine the thread immediately after exec.
1234 */
1235 regs->trap &= ~1UL;
1236
Paul Mackerras06d67d52005-10-10 22:29:05 +10001237#ifdef CONFIG_PPC32
1238 regs->mq = 0;
1239 regs->nip = start;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001240 regs->msr = MSR_USER;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001241#else
Denis Kirjanov9904b002010-07-29 22:04:39 +00001242 if (!is_32bit_task()) {
Rusty Russell94af3ab2013-11-20 22:15:02 +11001243 unsigned long entry;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001244
Rusty Russell94af3ab2013-11-20 22:15:02 +11001245 if (is_elf2_task()) {
1246 /* Look ma, no function descriptors! */
1247 entry = start;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001248
Rusty Russell94af3ab2013-11-20 22:15:02 +11001249 /*
1250 * Ulrich says:
1251 * The latest iteration of the ABI requires that when
1252 * calling a function (at its global entry point),
1253 * the caller must ensure r12 holds the entry point
1254 * address (so that the function can quickly
1255 * establish addressability).
1256 */
1257 regs->gpr[12] = start;
1258 /* Make sure that's restored on entry to userspace. */
1259 set_thread_flag(TIF_RESTOREALL);
1260 } else {
1261 unsigned long toc;
1262
1263 /* start is a relocated pointer to the function
1264 * descriptor for the elf _start routine. The first
1265 * entry in the function descriptor is the entry
1266 * address of _start and the second entry is the TOC
1267 * value we need to use.
1268 */
1269 __get_user(entry, (unsigned long __user *)start);
1270 __get_user(toc, (unsigned long __user *)start+1);
1271
1272 /* Check whether the e_entry function descriptor entries
1273 * need to be relocated before we can use them.
1274 */
1275 if (load_addr != 0) {
1276 entry += load_addr;
1277 toc += load_addr;
1278 }
1279 regs->gpr[2] = toc;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001280 }
1281 regs->nip = entry;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001282 regs->msr = MSR_USER64;
Stephen Rothwelld4bf9a72005-10-13 13:40:54 +10001283 } else {
1284 regs->nip = start;
1285 regs->gpr[2] = 0;
1286 regs->msr = MSR_USER32;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001287 }
1288#endif
Paul Mackerras48abec02005-11-30 13:20:54 +11001289 discard_lazy_cpu_state();
Michael Neulingce48b212008-06-25 14:07:18 +10001290#ifdef CONFIG_VSX
1291 current->thread.used_vsr = 0;
1292#endif
Paul Mackerrasde79f7b2013-09-10 20:20:42 +10001293 memset(&current->thread.fp_state, 0, sizeof(current->thread.fp_state));
Paul Mackerras18461962013-09-10 20:21:10 +10001294 current->thread.fp_save_area = NULL;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001295#ifdef CONFIG_ALTIVEC
Paul Mackerrasde79f7b2013-09-10 20:20:42 +10001296 memset(&current->thread.vr_state, 0, sizeof(current->thread.vr_state));
1297 current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */
Paul Mackerras18461962013-09-10 20:21:10 +10001298 current->thread.vr_save_area = NULL;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001299 current->thread.vrsave = 0;
1300 current->thread.used_vr = 0;
1301#endif /* CONFIG_ALTIVEC */
1302#ifdef CONFIG_SPE
1303 memset(current->thread.evr, 0, sizeof(current->thread.evr));
1304 current->thread.acc = 0;
1305 current->thread.spefscr = 0;
1306 current->thread.used_spe = 0;
1307#endif /* CONFIG_SPE */
Michael Neulingbc2a9402013-02-13 16:21:40 +00001308#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1309 if (cpu_has_feature(CPU_FTR_TM))
1310 regs->msr |= MSR_TM;
1311 current->thread.tm_tfhar = 0;
1312 current->thread.tm_texasr = 0;
1313 current->thread.tm_tfiar = 0;
1314#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001315}
Anton Blancharde1802b02014-08-20 08:00:02 +10001316EXPORT_SYMBOL(start_thread);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001317
1318#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
1319 | PR_FP_EXC_RES | PR_FP_EXC_INV)
1320
1321int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
1322{
1323 struct pt_regs *regs = tsk->thread.regs;
1324
1325 /* This is a bit hairy. If we are an SPE enabled processor
1326 * (have embedded fp) we store the IEEE exception enable flags in
1327 * fpexc_mode. fpexc_mode is also used for setting FP exception
1328 * mode (asyn, precise, disabled) for 'Classic' FP. */
1329 if (val & PR_FP_EXC_SW_ENABLE) {
1330#ifdef CONFIG_SPE
Kumar Gala5e14d212007-09-13 01:44:20 -05001331 if (cpu_has_feature(CPU_FTR_SPE)) {
Joseph Myers640e9222013-12-10 23:07:45 +00001332 /*
1333 * When the sticky exception bits are set
1334 * directly by userspace, it must call prctl
1335 * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE
1336 * in the existing prctl settings) or
1337 * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in
1338 * the bits being set). <fenv.h> functions
1339 * saving and restoring the whole
1340 * floating-point environment need to do so
1341 * anyway to restore the prctl settings from
1342 * the saved environment.
1343 */
1344 tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR);
Kumar Gala5e14d212007-09-13 01:44:20 -05001345 tsk->thread.fpexc_mode = val &
1346 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
1347 return 0;
1348 } else {
1349 return -EINVAL;
1350 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001351#else
1352 return -EINVAL;
1353#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001354 }
Paul Mackerras06d67d52005-10-10 22:29:05 +10001355
1356 /* on a CONFIG_SPE this does not hurt us. The bits that
1357 * __pack_fe01 use do not overlap with bits used for
1358 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
1359 * on CONFIG_SPE implementations are reserved so writing to
1360 * them does not change anything */
1361 if (val > PR_FP_EXC_PRECISE)
1362 return -EINVAL;
1363 tsk->thread.fpexc_mode = __pack_fe01(val);
1364 if (regs != NULL && (regs->msr & MSR_FP) != 0)
1365 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
1366 | tsk->thread.fpexc_mode;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001367 return 0;
1368}
1369
1370int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
1371{
1372 unsigned int val;
1373
1374 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
1375#ifdef CONFIG_SPE
Joseph Myers640e9222013-12-10 23:07:45 +00001376 if (cpu_has_feature(CPU_FTR_SPE)) {
1377 /*
1378 * When the sticky exception bits are set
1379 * directly by userspace, it must call prctl
1380 * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE
1381 * in the existing prctl settings) or
1382 * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in
1383 * the bits being set). <fenv.h> functions
1384 * saving and restoring the whole
1385 * floating-point environment need to do so
1386 * anyway to restore the prctl settings from
1387 * the saved environment.
1388 */
1389 tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR);
Kumar Gala5e14d212007-09-13 01:44:20 -05001390 val = tsk->thread.fpexc_mode;
Joseph Myers640e9222013-12-10 23:07:45 +00001391 } else
Kumar Gala5e14d212007-09-13 01:44:20 -05001392 return -EINVAL;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001393#else
1394 return -EINVAL;
1395#endif
1396 else
1397 val = __unpack_fe01(tsk->thread.fpexc_mode);
1398 return put_user(val, (unsigned int __user *) adr);
1399}
1400
Paul Mackerrasfab5db92006-06-07 16:14:40 +10001401int set_endian(struct task_struct *tsk, unsigned int val)
1402{
1403 struct pt_regs *regs = tsk->thread.regs;
1404
1405 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
1406 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
1407 return -EINVAL;
1408
1409 if (regs == NULL)
1410 return -EINVAL;
1411
1412 if (val == PR_ENDIAN_BIG)
1413 regs->msr &= ~MSR_LE;
1414 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
1415 regs->msr |= MSR_LE;
1416 else
1417 return -EINVAL;
1418
1419 return 0;
1420}
1421
1422int get_endian(struct task_struct *tsk, unsigned long adr)
1423{
1424 struct pt_regs *regs = tsk->thread.regs;
1425 unsigned int val;
1426
1427 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
1428 !cpu_has_feature(CPU_FTR_REAL_LE))
1429 return -EINVAL;
1430
1431 if (regs == NULL)
1432 return -EINVAL;
1433
1434 if (regs->msr & MSR_LE) {
1435 if (cpu_has_feature(CPU_FTR_REAL_LE))
1436 val = PR_ENDIAN_LITTLE;
1437 else
1438 val = PR_ENDIAN_PPC_LITTLE;
1439 } else
1440 val = PR_ENDIAN_BIG;
1441
1442 return put_user(val, (unsigned int __user *)adr);
1443}
1444
Paul Mackerrase9370ae2006-06-07 16:15:39 +10001445int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
1446{
1447 tsk->thread.align_ctl = val;
1448 return 0;
1449}
1450
1451int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
1452{
1453 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
1454}
1455
Paul Mackerrasbb72c482007-02-19 11:42:42 +11001456static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1457 unsigned long nbytes)
1458{
1459 unsigned long stack_page;
1460 unsigned long cpu = task_cpu(p);
1461
1462 /*
1463 * Avoid crashing if the stack has overflowed and corrupted
1464 * task_cpu(p), which is in the thread_info struct.
1465 */
1466 if (cpu < NR_CPUS && cpu_possible(cpu)) {
1467 stack_page = (unsigned long) hardirq_ctx[cpu];
1468 if (sp >= stack_page + sizeof(struct thread_struct)
1469 && sp <= stack_page + THREAD_SIZE - nbytes)
1470 return 1;
1471
1472 stack_page = (unsigned long) softirq_ctx[cpu];
1473 if (sp >= stack_page + sizeof(struct thread_struct)
1474 && sp <= stack_page + THREAD_SIZE - nbytes)
1475 return 1;
1476 }
1477 return 0;
1478}
1479
Anton Blanchard2f251942006-03-27 11:46:18 +11001480int validate_sp(unsigned long sp, struct task_struct *p,
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001481 unsigned long nbytes)
1482{
Al Viro0cec6fd2006-01-12 01:06:02 -08001483 unsigned long stack_page = (unsigned long)task_stack_page(p);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001484
1485 if (sp >= stack_page + sizeof(struct thread_struct)
1486 && sp <= stack_page + THREAD_SIZE - nbytes)
1487 return 1;
1488
Paul Mackerrasbb72c482007-02-19 11:42:42 +11001489 return valid_irq_stack(sp, p, nbytes);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001490}
1491
Anton Blanchard2f251942006-03-27 11:46:18 +11001492EXPORT_SYMBOL(validate_sp);
1493
Paul Mackerras06d67d52005-10-10 22:29:05 +10001494unsigned long get_wchan(struct task_struct *p)
1495{
1496 unsigned long ip, sp;
1497 int count = 0;
1498
1499 if (!p || p == current || p->state == TASK_RUNNING)
1500 return 0;
1501
1502 sp = p->thread.ksp;
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001503 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
Paul Mackerras06d67d52005-10-10 22:29:05 +10001504 return 0;
1505
1506 do {
1507 sp = *(unsigned long *)sp;
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001508 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
Paul Mackerras06d67d52005-10-10 22:29:05 +10001509 return 0;
1510 if (count > 0) {
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001511 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
Paul Mackerras06d67d52005-10-10 22:29:05 +10001512 if (!in_sched_functions(ip))
1513 return ip;
1514 }
1515 } while (count++ < 16);
1516 return 0;
1517}
Paul Mackerras06d67d52005-10-10 22:29:05 +10001518
Johannes Bergc4d04be2008-11-20 03:24:07 +00001519static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001520
1521void show_stack(struct task_struct *tsk, unsigned long *stack)
1522{
Paul Mackerras06d67d52005-10-10 22:29:05 +10001523 unsigned long sp, ip, lr, newsp;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001524 int count = 0;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001525 int firstframe = 1;
Steven Rostedt6794c782009-02-09 21:10:27 -08001526#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1527 int curr_frame = current->curr_ret_stack;
1528 extern void return_to_handler(void);
Steven Rostedt9135c3c2009-09-15 08:20:15 -07001529 unsigned long rth = (unsigned long)return_to_handler;
Steven Rostedt6794c782009-02-09 21:10:27 -08001530#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001531
1532 sp = (unsigned long) stack;
1533 if (tsk == NULL)
1534 tsk = current;
1535 if (sp == 0) {
1536 if (tsk == current)
Anton Blanchardacf620e2014-10-13 19:41:39 +11001537 sp = current_stack_pointer();
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001538 else
1539 sp = tsk->thread.ksp;
1540 }
1541
Paul Mackerras06d67d52005-10-10 22:29:05 +10001542 lr = 0;
1543 printk("Call Trace:\n");
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001544 do {
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001545 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
Paul Mackerras06d67d52005-10-10 22:29:05 +10001546 return;
1547
1548 stack = (unsigned long *) sp;
1549 newsp = stack[0];
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001550 ip = stack[STACK_FRAME_LR_SAVE];
Paul Mackerras06d67d52005-10-10 22:29:05 +10001551 if (!firstframe || ip != lr) {
Benjamin Herrenschmidt058c78f2008-07-07 13:44:31 +10001552 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
Steven Rostedt6794c782009-02-09 21:10:27 -08001553#ifdef CONFIG_FUNCTION_GRAPH_TRACER
Anton Blanchard7d56c652014-09-17 17:07:03 +10001554 if ((ip == rth) && curr_frame >= 0) {
Steven Rostedt6794c782009-02-09 21:10:27 -08001555 printk(" (%pS)",
1556 (void *)current->ret_stack[curr_frame].ret);
1557 curr_frame--;
1558 }
1559#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +10001560 if (firstframe)
1561 printk(" (unreliable)");
1562 printk("\n");
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001563 }
Paul Mackerras06d67d52005-10-10 22:29:05 +10001564 firstframe = 0;
1565
1566 /*
1567 * See if this is an exception frame.
1568 * We look for the "regshere" marker in the current frame.
1569 */
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001570 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1571 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
Paul Mackerras06d67d52005-10-10 22:29:05 +10001572 struct pt_regs *regs = (struct pt_regs *)
1573 (sp + STACK_FRAME_OVERHEAD);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001574 lr = regs->link;
Paul Mackerras9be9be22014-06-12 16:53:08 +10001575 printk("--- interrupt: %lx at %pS\n LR = %pS\n",
Benjamin Herrenschmidt058c78f2008-07-07 13:44:31 +10001576 regs->trap, (void *)regs->nip, (void *)lr);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001577 firstframe = 1;
1578 }
1579
1580 sp = newsp;
1581 } while (count++ < kstack_depth_to_print);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001582}
Paul Mackerras06d67d52005-10-10 22:29:05 +10001583
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001584#ifdef CONFIG_PPC64
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001585/* Called with hard IRQs off */
Michael Ellerman0e377392013-06-13 21:04:56 +10001586void notrace __ppc64_runlatch_on(void)
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001587{
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001588 struct thread_info *ti = current_thread_info();
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001589 unsigned long ctrl;
1590
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001591 ctrl = mfspr(SPRN_CTRLF);
1592 ctrl |= CTRL_RUNLATCH;
1593 mtspr(SPRN_CTRLT, ctrl);
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001594
Benjamin Herrenschmidtfae2e0f2012-04-11 10:42:15 +10001595 ti->local_flags |= _TLF_RUNLATCH;
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001596}
1597
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001598/* Called with hard IRQs off */
Michael Ellerman0e377392013-06-13 21:04:56 +10001599void notrace __ppc64_runlatch_off(void)
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001600{
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001601 struct thread_info *ti = current_thread_info();
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001602 unsigned long ctrl;
1603
Benjamin Herrenschmidtfae2e0f2012-04-11 10:42:15 +10001604 ti->local_flags &= ~_TLF_RUNLATCH;
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001605
Anton Blanchard4138d652010-08-06 03:28:19 +00001606 ctrl = mfspr(SPRN_CTRLF);
1607 ctrl &= ~CTRL_RUNLATCH;
1608 mtspr(SPRN_CTRLT, ctrl);
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001609}
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001610#endif /* CONFIG_PPC64 */
Benjamin Herrenschmidtf6a61682008-04-18 16:56:17 +10001611
Anton Blanchardd8390882009-02-22 01:50:03 +00001612unsigned long arch_align_stack(unsigned long sp)
1613{
1614 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1615 sp -= get_random_int() & ~PAGE_MASK;
1616 return sp & ~0xf;
1617}
Anton Blanchard912f9ee2009-02-22 01:50:04 +00001618
1619static inline unsigned long brk_rnd(void)
1620{
1621 unsigned long rnd = 0;
1622
1623 /* 8MB for 32bit, 1GB for 64bit */
1624 if (is_32bit_task())
1625 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1626 else
1627 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1628
1629 return rnd << PAGE_SHIFT;
1630}
1631
1632unsigned long arch_randomize_brk(struct mm_struct *mm)
1633{
Anton Blanchard8bbde7a2009-09-21 16:52:35 +00001634 unsigned long base = mm->brk;
1635 unsigned long ret;
1636
Kumar Galace7a35c2009-10-16 07:05:17 +00001637#ifdef CONFIG_PPC_STD_MMU_64
Anton Blanchard8bbde7a2009-09-21 16:52:35 +00001638 /*
1639 * If we are using 1TB segments and we are allowed to randomise
1640 * the heap, we can put it above 1TB so it is backed by a 1TB
1641 * segment. Otherwise the heap will be in the bottom 1TB
1642 * which always uses 256MB segments and this may result in a
1643 * performance penalty.
1644 */
1645 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1646 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1647#endif
1648
1649 ret = PAGE_ALIGN(base + brk_rnd());
Anton Blanchard912f9ee2009-02-22 01:50:04 +00001650
1651 if (ret < mm->brk)
1652 return mm->brk;
1653
1654 return ret;
1655}
Anton Blanchard501cb162009-02-22 01:50:07 +00001656