Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 1 | /* |
Anson Huang | e95dddb | 2013-03-20 19:39:42 -0400 | [diff] [blame] | 2 | * Copyright 2011-2013 Freescale Semiconductor, Inc. |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Richard Zhao | a258561 | 2012-04-24 14:19:13 +0800 | [diff] [blame] | 13 | #include <linux/clk.h> |
Shawn Guo | 53bb71d | 2013-05-21 09:58:51 +0800 | [diff] [blame] | 14 | #include <linux/clk-provider.h> |
Richard Zhao | a258561 | 2012-04-24 14:19:13 +0800 | [diff] [blame] | 15 | #include <linux/clkdev.h> |
Rob Herring | da4a686 | 2013-02-06 21:17:47 -0600 | [diff] [blame] | 16 | #include <linux/clocksource.h> |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 17 | #include <linux/cpu.h> |
Shawn Guo | 0575fb7 | 2011-12-09 00:51:26 +0100 | [diff] [blame] | 18 | #include <linux/delay.h> |
Robert Lee | b9d18dc | 2012-05-21 17:50:30 -0500 | [diff] [blame] | 19 | #include <linux/export.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 20 | #include <linux/init.h> |
Shawn Guo | 0575fb7 | 2011-12-09 00:51:26 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 22 | #include <linux/irq.h> |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 23 | #include <linux/irqchip.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 24 | #include <linux/of.h> |
Shawn Guo | 0575fb7 | 2011-12-09 00:51:26 +0100 | [diff] [blame] | 25 | #include <linux/of_address.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 26 | #include <linux/of_irq.h> |
| 27 | #include <linux/of_platform.h> |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 28 | #include <linux/opp.h> |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 29 | #include <linux/phy.h> |
Robin Holt | 7b6d864 | 2013-07-08 16:01:40 -0700 | [diff] [blame] | 30 | #include <linux/reboot.h> |
Dong Aisheng | baa6415 | 2012-09-05 10:57:15 +0800 | [diff] [blame] | 31 | #include <linux/regmap.h> |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 32 | #include <linux/micrel_phy.h> |
Dong Aisheng | baa6415 | 2012-09-05 10:57:15 +0800 | [diff] [blame] | 33 | #include <linux/mfd/syscon.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 34 | #include <asm/hardware/cache-l2x0.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 35 | #include <asm/mach/arch.h> |
Shawn Guo | 3e549a6 | 2013-01-17 16:37:42 +0800 | [diff] [blame] | 36 | #include <asm/mach/map.h> |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 37 | #include <asm/system_misc.h> |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 38 | |
Shawn Guo | e337247 | 2012-09-13 21:01:00 +0800 | [diff] [blame] | 39 | #include "common.h" |
Shawn Guo | e29248c | 2012-09-13 21:12:50 +0800 | [diff] [blame] | 40 | #include "cpuidle.h" |
Shawn Guo | 50f2de6 | 2012-09-14 14:14:45 +0800 | [diff] [blame] | 41 | #include "hardware.h" |
Robert Lee | b9d18dc | 2012-05-21 17:50:30 -0500 | [diff] [blame] | 42 | |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 43 | static u32 chip_revision; |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 44 | |
Philipp Zabel | b1a3582 | 2013-03-27 18:30:37 +0100 | [diff] [blame] | 45 | int imx6q_revision(void) |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 46 | { |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 47 | return chip_revision; |
| 48 | } |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 49 | |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 50 | static void __init imx6q_init_revision(void) |
| 51 | { |
| 52 | u32 rev = imx_anatop_get_digprog(); |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 53 | |
| 54 | switch (rev & 0xff) { |
| 55 | case 0: |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 56 | chip_revision = IMX_CHIP_REVISION_1_0; |
| 57 | break; |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 58 | case 1: |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 59 | chip_revision = IMX_CHIP_REVISION_1_1; |
| 60 | break; |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 61 | case 2: |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 62 | chip_revision = IMX_CHIP_REVISION_1_2; |
| 63 | break; |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 64 | default: |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 65 | chip_revision = IMX_CHIP_REVISION_UNKNOWN; |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 66 | } |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 67 | |
| 68 | mxc_set_cpu_type(rev >> 16 & 0xff); |
Shawn Guo | b29b3e6 | 2012-10-23 19:00:39 +0800 | [diff] [blame] | 69 | } |
| 70 | |
Robin Holt | 7b6d864 | 2013-07-08 16:01:40 -0700 | [diff] [blame] | 71 | static void imx6q_restart(enum reboot_mode mode, const char *cmd) |
Shawn Guo | 0575fb7 | 2011-12-09 00:51:26 +0100 | [diff] [blame] | 72 | { |
| 73 | struct device_node *np; |
| 74 | void __iomem *wdog_base; |
| 75 | |
| 76 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt"); |
| 77 | wdog_base = of_iomap(np, 0); |
| 78 | if (!wdog_base) |
| 79 | goto soft; |
| 80 | |
| 81 | imx_src_prepare_restart(); |
| 82 | |
| 83 | /* enable wdog */ |
| 84 | writew_relaxed(1 << 2, wdog_base); |
| 85 | /* write twice to ensure the request will not get ignored */ |
| 86 | writew_relaxed(1 << 2, wdog_base); |
| 87 | |
| 88 | /* wait for reset to assert ... */ |
| 89 | mdelay(500); |
| 90 | |
| 91 | pr_err("Watchdog reset failed to assert reset\n"); |
| 92 | |
| 93 | /* delay to allow the serial port to show the message */ |
| 94 | mdelay(50); |
| 95 | |
| 96 | soft: |
| 97 | /* we'll take a jump through zero as a poor second */ |
| 98 | soft_restart(0); |
| 99 | } |
| 100 | |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 101 | /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ |
| 102 | static int ksz9021rn_phy_fixup(struct phy_device *phydev) |
| 103 | { |
Arnd Bergmann | 9f9ba0f | 2012-08-16 07:42:50 +0000 | [diff] [blame] | 104 | if (IS_BUILTIN(CONFIG_PHYLIB)) { |
Shawn Guo | ef44180 | 2012-05-08 21:39:33 +0800 | [diff] [blame] | 105 | /* min rx data delay */ |
| 106 | phy_write(phydev, 0x0b, 0x8105); |
| 107 | phy_write(phydev, 0x0c, 0x0000); |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 108 | |
Shawn Guo | ef44180 | 2012-05-08 21:39:33 +0800 | [diff] [blame] | 109 | /* max rx/tx clock delay, min rx/tx control delay */ |
| 110 | phy_write(phydev, 0x0b, 0x8104); |
| 111 | phy_write(phydev, 0x0c, 0xf0f0); |
| 112 | phy_write(phydev, 0x0b, 0x104); |
| 113 | } |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 114 | |
| 115 | return 0; |
| 116 | } |
| 117 | |
Richard Zhao | a258561 | 2012-04-24 14:19:13 +0800 | [diff] [blame] | 118 | static void __init imx6q_sabrelite_cko1_setup(void) |
| 119 | { |
| 120 | struct clk *cko1_sel, *ahb, *cko1; |
| 121 | unsigned long rate; |
| 122 | |
| 123 | cko1_sel = clk_get_sys(NULL, "cko1_sel"); |
| 124 | ahb = clk_get_sys(NULL, "ahb"); |
| 125 | cko1 = clk_get_sys(NULL, "cko1"); |
| 126 | if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) { |
| 127 | pr_err("cko1 setup failed!\n"); |
| 128 | goto put_clk; |
| 129 | } |
| 130 | clk_set_parent(cko1_sel, ahb); |
| 131 | rate = clk_round_rate(cko1, 16000000); |
| 132 | clk_set_rate(cko1, rate); |
Richard Zhao | a258561 | 2012-04-24 14:19:13 +0800 | [diff] [blame] | 133 | put_clk: |
| 134 | if (!IS_ERR(cko1_sel)) |
| 135 | clk_put(cko1_sel); |
| 136 | if (!IS_ERR(ahb)) |
| 137 | clk_put(ahb); |
| 138 | if (!IS_ERR(cko1)) |
| 139 | clk_put(cko1); |
| 140 | } |
| 141 | |
Richard Zhao | 071dea5 | 2012-04-27 15:02:59 +0800 | [diff] [blame] | 142 | static void __init imx6q_sabrelite_init(void) |
| 143 | { |
Arnd Bergmann | 9f9ba0f | 2012-08-16 07:42:50 +0000 | [diff] [blame] | 144 | if (IS_BUILTIN(CONFIG_PHYLIB)) |
Shawn Guo | ef44180 | 2012-05-08 21:39:33 +0800 | [diff] [blame] | 145 | phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, |
Richard Zhao | 071dea5 | 2012-04-27 15:02:59 +0800 | [diff] [blame] | 146 | ksz9021rn_phy_fixup); |
Richard Zhao | a258561 | 2012-04-24 14:19:13 +0800 | [diff] [blame] | 147 | imx6q_sabrelite_cko1_setup(); |
Richard Zhao | 071dea5 | 2012-04-27 15:02:59 +0800 | [diff] [blame] | 148 | } |
| 149 | |
Nicolin Chen | e7eccc7 | 2013-06-13 19:50:56 +0800 | [diff] [blame] | 150 | static void __init imx6q_sabresd_cko1_setup(void) |
| 151 | { |
| 152 | struct clk *cko1_sel, *pll4, *pll4_post, *cko1; |
| 153 | unsigned long rate; |
| 154 | |
| 155 | cko1_sel = clk_get_sys(NULL, "cko1_sel"); |
| 156 | pll4 = clk_get_sys(NULL, "pll4_audio"); |
| 157 | pll4_post = clk_get_sys(NULL, "pll4_post_div"); |
| 158 | cko1 = clk_get_sys(NULL, "cko1"); |
| 159 | if (IS_ERR(cko1_sel) || IS_ERR(pll4) |
| 160 | || IS_ERR(pll4_post) || IS_ERR(cko1)) { |
| 161 | pr_err("cko1 setup failed!\n"); |
| 162 | goto put_clk; |
| 163 | } |
| 164 | /* |
| 165 | * Setting pll4 at 768MHz (24MHz * 32) |
| 166 | * So its child clock can get 24MHz easily |
| 167 | */ |
| 168 | clk_set_rate(pll4, 768000000); |
| 169 | |
| 170 | clk_set_parent(cko1_sel, pll4_post); |
| 171 | rate = clk_round_rate(cko1, 24000000); |
| 172 | clk_set_rate(cko1, rate); |
| 173 | put_clk: |
| 174 | if (!IS_ERR(cko1_sel)) |
| 175 | clk_put(cko1_sel); |
| 176 | if (!IS_ERR(pll4_post)) |
| 177 | clk_put(pll4_post); |
| 178 | if (!IS_ERR(pll4)) |
| 179 | clk_put(pll4); |
| 180 | if (!IS_ERR(cko1)) |
| 181 | clk_put(cko1); |
| 182 | } |
| 183 | |
| 184 | static void __init imx6q_sabresd_init(void) |
| 185 | { |
| 186 | imx6q_sabresd_cko1_setup(); |
| 187 | } |
| 188 | |
Frank Li | d6e0d9f | 2012-10-30 18:25:22 +0000 | [diff] [blame] | 189 | static void __init imx6q_1588_init(void) |
| 190 | { |
| 191 | struct regmap *gpr; |
| 192 | |
| 193 | gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); |
| 194 | if (!IS_ERR(gpr)) |
| 195 | regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21); |
| 196 | else |
| 197 | pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n"); |
| 198 | |
| 199 | } |
Richard Zhao | 396bf1c | 2012-07-12 10:25:24 +0800 | [diff] [blame] | 200 | static void __init imx6q_usb_init(void) |
| 201 | { |
Anson Huang | e95dddb | 2013-03-20 19:39:42 -0400 | [diff] [blame] | 202 | imx_anatop_usb_chrg_detect_disable(); |
Richard Zhao | 396bf1c | 2012-07-12 10:25:24 +0800 | [diff] [blame] | 203 | } |
| 204 | |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 205 | static void __init imx6q_init_machine(void) |
| 206 | { |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 207 | if (of_machine_is_compatible("fsl,imx6q-sabrelite")) |
Richard Zhao | 071dea5 | 2012-04-27 15:02:59 +0800 | [diff] [blame] | 208 | imx6q_sabrelite_init(); |
Nicolin Chen | e7eccc7 | 2013-06-13 19:50:56 +0800 | [diff] [blame] | 209 | else if (of_machine_is_compatible("fsl,imx6q-sabresd") || |
| 210 | of_machine_is_compatible("fsl,imx6dl-sabresd")) |
| 211 | imx6q_sabresd_init(); |
Richard Zhao | 477fce4 | 2011-12-14 09:26:47 +0800 | [diff] [blame] | 212 | |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 213 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
| 214 | |
Anson Huang | e95dddb | 2013-03-20 19:39:42 -0400 | [diff] [blame] | 215 | imx_anatop_init(); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 216 | imx6q_pm_init(); |
Richard Zhao | 396bf1c | 2012-07-12 10:25:24 +0800 | [diff] [blame] | 217 | imx6q_usb_init(); |
Frank Li | d6e0d9f | 2012-10-30 18:25:22 +0000 | [diff] [blame] | 218 | imx6q_1588_init(); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 219 | } |
| 220 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 221 | #define OCOTP_CFG3 0x440 |
| 222 | #define OCOTP_CFG3_SPEED_SHIFT 16 |
| 223 | #define OCOTP_CFG3_SPEED_1P2GHZ 0x3 |
| 224 | |
| 225 | static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev) |
| 226 | { |
| 227 | struct device_node *np; |
| 228 | void __iomem *base; |
| 229 | u32 val; |
| 230 | |
| 231 | np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ocotp"); |
| 232 | if (!np) { |
| 233 | pr_warn("failed to find ocotp node\n"); |
| 234 | return; |
| 235 | } |
| 236 | |
| 237 | base = of_iomap(np, 0); |
| 238 | if (!base) { |
| 239 | pr_warn("failed to map ocotp\n"); |
| 240 | goto put_node; |
| 241 | } |
| 242 | |
| 243 | val = readl_relaxed(base + OCOTP_CFG3); |
| 244 | val >>= OCOTP_CFG3_SPEED_SHIFT; |
| 245 | if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ) |
| 246 | if (opp_disable(cpu_dev, 1200000000)) |
| 247 | pr_warn("failed to disable 1.2 GHz OPP\n"); |
| 248 | |
| 249 | put_node: |
| 250 | of_node_put(np); |
| 251 | } |
| 252 | |
| 253 | static void __init imx6q_opp_init(struct device *cpu_dev) |
| 254 | { |
| 255 | struct device_node *np; |
| 256 | |
| 257 | np = of_find_node_by_path("/cpus/cpu@0"); |
| 258 | if (!np) { |
| 259 | pr_warn("failed to find cpu0 node\n"); |
| 260 | return; |
| 261 | } |
| 262 | |
| 263 | cpu_dev->of_node = np; |
| 264 | if (of_init_opp_table(cpu_dev)) { |
| 265 | pr_warn("failed to init OPP table\n"); |
| 266 | goto put_node; |
| 267 | } |
| 268 | |
| 269 | imx6q_opp_check_1p2ghz(cpu_dev); |
| 270 | |
| 271 | put_node: |
| 272 | of_node_put(np); |
| 273 | } |
| 274 | |
Fabio Estevam | f8c11b2 | 2013-03-25 09:20:44 -0300 | [diff] [blame] | 275 | static struct platform_device imx6q_cpufreq_pdev = { |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 276 | .name = "imx6q-cpufreq", |
| 277 | }; |
| 278 | |
Robert Lee | b9d18dc | 2012-05-21 17:50:30 -0500 | [diff] [blame] | 279 | static void __init imx6q_init_late(void) |
| 280 | { |
Shawn Guo | e5f9dec | 2012-12-04 22:55:15 +0800 | [diff] [blame] | 281 | /* |
| 282 | * WAIT mode is broken on TO 1.0 and 1.1, so there is no point |
| 283 | * to run cpuidle on them. |
| 284 | */ |
| 285 | if (imx6q_revision() > IMX_CHIP_REVISION_1_1) |
| 286 | imx6q_cpuidle_init(); |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 287 | |
| 288 | if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) { |
| 289 | imx6q_opp_init(&imx6q_cpufreq_pdev.dev); |
| 290 | platform_device_register(&imx6q_cpufreq_pdev); |
| 291 | } |
Robert Lee | b9d18dc | 2012-05-21 17:50:30 -0500 | [diff] [blame] | 292 | } |
| 293 | |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 294 | static void __init imx6q_map_io(void) |
| 295 | { |
Shawn Guo | 3e549a6 | 2013-01-17 16:37:42 +0800 | [diff] [blame] | 296 | debug_ll_io_init(); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 297 | imx_scu_map_io(); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 298 | } |
| 299 | |
Dirk Behme | b3a9c31 | 2013-04-26 10:13:56 +0200 | [diff] [blame] | 300 | #ifdef CONFIG_CACHE_L2X0 |
| 301 | static void __init imx6q_init_l2cache(void) |
| 302 | { |
| 303 | void __iomem *l2x0_base; |
| 304 | struct device_node *np; |
| 305 | unsigned int val; |
| 306 | |
| 307 | np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); |
| 308 | if (!np) |
| 309 | goto out; |
| 310 | |
| 311 | l2x0_base = of_iomap(np, 0); |
| 312 | if (!l2x0_base) { |
| 313 | of_node_put(np); |
| 314 | goto out; |
| 315 | } |
| 316 | |
| 317 | /* Configure the L2 PREFETCH and POWER registers */ |
| 318 | val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); |
| 319 | val |= 0x70800000; |
| 320 | writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); |
| 321 | val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; |
| 322 | writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); |
| 323 | |
| 324 | iounmap(l2x0_base); |
| 325 | of_node_put(np); |
| 326 | |
| 327 | out: |
| 328 | l2x0_of_init(0, ~0UL); |
| 329 | } |
| 330 | #else |
| 331 | static inline void imx6q_init_l2cache(void) {} |
| 332 | #endif |
| 333 | |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 334 | static void __init imx6q_init_irq(void) |
| 335 | { |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 336 | imx6q_init_revision(); |
Dirk Behme | b3a9c31 | 2013-04-26 10:13:56 +0200 | [diff] [blame] | 337 | imx6q_init_l2cache(); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 338 | imx_src_init(); |
| 339 | imx_gpc_init(); |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 340 | irqchip_init(); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 341 | } |
| 342 | |
| 343 | static void __init imx6q_timer_init(void) |
| 344 | { |
Shawn Guo | 53bb71d | 2013-05-21 09:58:51 +0800 | [diff] [blame] | 345 | of_clk_init(NULL); |
Rob Herring | da4a686 | 2013-02-06 21:17:47 -0600 | [diff] [blame] | 346 | clocksource_of_init(); |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 347 | imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", |
| 348 | imx6q_revision()); |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 349 | } |
| 350 | |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 351 | static const char *imx6q_dt_compat[] __initdata = { |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 352 | "fsl,imx6dl", |
Sascha Hauer | 3f8976d | 2012-02-17 12:07:00 +0100 | [diff] [blame] | 353 | "fsl,imx6q", |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 354 | NULL, |
| 355 | }; |
| 356 | |
Shawn Guo | 3c03a2f | 2013-04-01 22:13:32 +0800 | [diff] [blame] | 357 | DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)") |
Marc Zyngier | e4f2d97 | 2011-09-08 13:15:22 +0100 | [diff] [blame] | 358 | .smp = smp_ops(imx_smp_ops), |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 359 | .map_io = imx6q_map_io, |
| 360 | .init_irq = imx6q_init_irq, |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 361 | .init_time = imx6q_timer_init, |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 362 | .init_machine = imx6q_init_machine, |
Robert Lee | b9d18dc | 2012-05-21 17:50:30 -0500 | [diff] [blame] | 363 | .init_late = imx6q_init_late, |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 364 | .dt_compat = imx6q_dt_compat, |
Shawn Guo | 0575fb7 | 2011-12-09 00:51:26 +0100 | [diff] [blame] | 365 | .restart = imx6q_restart, |
Shawn Guo | 13eed98 | 2011-09-06 15:05:25 +0800 | [diff] [blame] | 366 | MACHINE_END |