Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Driver for the Conexant CX25821 PCIe bridge |
| 3 | * |
| 4 | * Copyright (C) 2009 Conexant Systems Inc. |
| 5 | * Authors <hiep.huynh@conexant.com>, <shu.lin@conexant.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | */ |
| 22 | |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 24 | |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 25 | #include "cx25821-video.h" |
| 26 | #include "cx25821-video-upstream.h" |
| 27 | |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 28 | #include <linux/errno.h> |
| 29 | #include <linux/kernel.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 32 | #include <linux/slab.h> |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 33 | |
| 34 | MODULE_DESCRIPTION("v4l2 driver module for cx25821 based TV cards"); |
| 35 | MODULE_AUTHOR("Hiep Huynh <hiep.huynh@conexant.com>"); |
| 36 | MODULE_LICENSE("GPL"); |
| 37 | |
Leonid V. Fedorenchik | 2b2d039 | 2011-09-02 11:55:46 +0800 | [diff] [blame] | 38 | static int _intr_msk = FLD_VID_SRC_RISC1 | FLD_VID_SRC_UF | FLD_VID_SRC_SYNC | |
| 39 | FLD_VID_SRC_OPC_ERR; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 40 | |
| 41 | int cx25821_sram_channel_setup_upstream(struct cx25821_dev *dev, |
Hans Verkuil | bfef0d3 | 2013-04-13 06:28:54 -0300 | [diff] [blame] | 42 | const struct sram_channel *ch, |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 43 | unsigned int bpl, u32 risc) |
| 44 | { |
| 45 | unsigned int i, lines; |
| 46 | u32 cdt; |
| 47 | |
| 48 | if (ch->cmds_start == 0) { |
| 49 | cx_write(ch->ptr1_reg, 0); |
| 50 | cx_write(ch->ptr2_reg, 0); |
| 51 | cx_write(ch->cnt2_reg, 0); |
| 52 | cx_write(ch->cnt1_reg, 0); |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | bpl = (bpl + 7) & ~7; /* alignment */ |
| 57 | cdt = ch->cdt; |
| 58 | lines = ch->fifo_size / bpl; |
| 59 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 60 | if (lines > 4) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 61 | lines = 4; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 62 | |
| 63 | BUG_ON(lines < 2); |
| 64 | |
| 65 | /* write CDT */ |
| 66 | for (i = 0; i < lines; i++) { |
| 67 | cx_write(cdt + 16 * i, ch->fifo_start + bpl * i); |
| 68 | cx_write(cdt + 16 * i + 4, 0); |
| 69 | cx_write(cdt + 16 * i + 8, 0); |
| 70 | cx_write(cdt + 16 * i + 12, 0); |
| 71 | } |
| 72 | |
| 73 | /* write CMDS */ |
| 74 | cx_write(ch->cmds_start + 0, risc); |
| 75 | |
| 76 | cx_write(ch->cmds_start + 4, 0); |
| 77 | cx_write(ch->cmds_start + 8, cdt); |
| 78 | cx_write(ch->cmds_start + 12, (lines * 16) >> 3); |
| 79 | cx_write(ch->cmds_start + 16, ch->ctrl_start); |
| 80 | |
| 81 | cx_write(ch->cmds_start + 20, VID_IQ_SIZE_DW); |
| 82 | |
| 83 | for (i = 24; i < 80; i += 4) |
| 84 | cx_write(ch->cmds_start + i, 0); |
| 85 | |
| 86 | /* fill registers */ |
| 87 | cx_write(ch->ptr1_reg, ch->fifo_start); |
| 88 | cx_write(ch->ptr2_reg, cdt); |
| 89 | cx_write(ch->cnt2_reg, (lines * 16) >> 3); |
| 90 | cx_write(ch->cnt1_reg, (bpl >> 3) - 1); |
| 91 | |
| 92 | return 0; |
| 93 | } |
| 94 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 95 | static __le32 *cx25821_update_riscprogram(struct cx25821_channel *chan, |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 96 | __le32 *rp, unsigned int offset, |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 97 | unsigned int bpl, u32 sync_line, |
| 98 | unsigned int lines, int fifo_enable, |
| 99 | int field_type) |
| 100 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 101 | struct cx25821_video_out_data *out = chan->out; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 102 | unsigned int line, i; |
| 103 | int dist_betwn_starts = bpl * 2; |
| 104 | |
| 105 | *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); |
| 106 | |
| 107 | if (USE_RISC_NOOP_VIDEO) { |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 108 | for (i = 0; i < NUM_NO_OPS; i++) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 109 | *(rp++) = cpu_to_le32(RISC_NOOP); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | /* scan lines */ |
| 113 | for (line = 0; line < lines; line++) { |
| 114 | *(rp++) = cpu_to_le32(RISC_READ | RISC_SOL | RISC_EOL | bpl); |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 115 | *(rp++) = cpu_to_le32(out->_data_buf_phys_addr + offset); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 116 | *(rp++) = cpu_to_le32(0); /* bits 63-32 */ |
| 117 | |
| 118 | if ((lines <= NTSC_FIELD_HEIGHT) |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 119 | || (line < (NTSC_FIELD_HEIGHT - 1)) || !(out->is_60hz)) { |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 120 | offset += dist_betwn_starts; |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | return rp; |
| 125 | } |
| 126 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 127 | static __le32 *cx25821_risc_field_upstream(struct cx25821_channel *chan, __le32 *rp, |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 128 | dma_addr_t databuf_phys_addr, |
| 129 | unsigned int offset, u32 sync_line, |
| 130 | unsigned int bpl, unsigned int lines, |
| 131 | int fifo_enable, int field_type) |
| 132 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 133 | struct cx25821_video_out_data *out = chan->out; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 134 | unsigned int line, i; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 135 | const struct sram_channel *sram_ch = chan->sram_channels; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 136 | int dist_betwn_starts = bpl * 2; |
| 137 | |
| 138 | /* sync instruction */ |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 139 | if (sync_line != NO_SYNC_LINE) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 140 | *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 141 | |
| 142 | if (USE_RISC_NOOP_VIDEO) { |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 143 | for (i = 0; i < NUM_NO_OPS; i++) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 144 | *(rp++) = cpu_to_le32(RISC_NOOP); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | /* scan lines */ |
| 148 | for (line = 0; line < lines; line++) { |
| 149 | *(rp++) = cpu_to_le32(RISC_READ | RISC_SOL | RISC_EOL | bpl); |
| 150 | *(rp++) = cpu_to_le32(databuf_phys_addr + offset); |
| 151 | *(rp++) = cpu_to_le32(0); /* bits 63-32 */ |
| 152 | |
| 153 | if ((lines <= NTSC_FIELD_HEIGHT) |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 154 | || (line < (NTSC_FIELD_HEIGHT - 1)) || !(out->is_60hz)) |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 155 | /* to skip the other field line */ |
| 156 | offset += dist_betwn_starts; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 157 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 158 | /* check if we need to enable the FIFO after the first 4 lines |
| 159 | * For the upstream video channel, the risc engine will enable |
| 160 | * the FIFO. */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 161 | if (fifo_enable && line == 3) { |
Hans Verkuil | 60b3b4d | 2013-10-04 11:01:51 -0300 | [diff] [blame] | 162 | *(rp++) = cpu_to_le32(RISC_WRITECR); |
| 163 | *(rp++) = cpu_to_le32(sram_ch->dma_ctl); |
| 164 | *(rp++) = cpu_to_le32(FLD_VID_FIFO_EN); |
| 165 | *(rp++) = cpu_to_le32(0x00000001); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 166 | } |
| 167 | } |
| 168 | |
| 169 | return rp; |
| 170 | } |
| 171 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 172 | static int cx25821_risc_buffer_upstream(struct cx25821_channel *chan, |
Mauro Carvalho Chehab | dafc456 | 2012-10-27 12:42:59 -0300 | [diff] [blame] | 173 | struct pci_dev *pci, |
| 174 | unsigned int top_offset, |
| 175 | unsigned int bpl, unsigned int lines) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 176 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 177 | struct cx25821_video_out_data *out = chan->out; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 178 | __le32 *rp; |
| 179 | int fifo_enable = 0; |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 180 | /* get line count for single field */ |
| 181 | int singlefield_lines = lines >> 1; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 182 | int odd_num_lines = singlefield_lines; |
| 183 | int frame = 0; |
| 184 | int frame_size = 0; |
| 185 | int databuf_offset = 0; |
| 186 | int risc_program_size = 0; |
| 187 | int risc_flag = RISC_CNT_RESET; |
| 188 | unsigned int bottom_offset = bpl; |
| 189 | dma_addr_t risc_phys_jump_addr; |
| 190 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 191 | if (out->is_60hz) { |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 192 | odd_num_lines = singlefield_lines + 1; |
| 193 | risc_program_size = FRAME1_VID_PROG_SIZE; |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 194 | frame_size = (bpl == Y411_LINE_SZ) ? |
| 195 | FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 196 | } else { |
| 197 | risc_program_size = PAL_VID_PROG_SIZE; |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 198 | frame_size = (bpl == Y411_LINE_SZ) ? |
| 199 | FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 200 | } |
| 201 | |
| 202 | /* Virtual address of Risc buffer program */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 203 | rp = out->_dma_virt_addr; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 204 | |
| 205 | for (frame = 0; frame < NUM_FRAMES; frame++) { |
| 206 | databuf_offset = frame_size * frame; |
| 207 | |
| 208 | if (UNSET != top_offset) { |
| 209 | fifo_enable = (frame == 0) ? FIFO_ENABLE : FIFO_DISABLE; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 210 | rp = cx25821_risc_field_upstream(chan, rp, |
| 211 | out->_data_buf_phys_addr + |
Leonid V. Fedorenchik | 2c68e93 | 2011-10-22 01:43:47 -0300 | [diff] [blame] | 212 | databuf_offset, top_offset, 0, bpl, |
| 213 | odd_num_lines, fifo_enable, ODD_FIELD); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | fifo_enable = FIFO_DISABLE; |
| 217 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 218 | /* Even Field */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 219 | rp = cx25821_risc_field_upstream(chan, rp, |
| 220 | out->_data_buf_phys_addr + |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 221 | databuf_offset, bottom_offset, |
| 222 | 0x200, bpl, singlefield_lines, |
| 223 | fifo_enable, EVEN_FIELD); |
| 224 | |
| 225 | if (frame == 0) { |
| 226 | risc_flag = RISC_CNT_RESET; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 227 | risc_phys_jump_addr = out->_dma_phys_start_addr + |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 228 | risc_program_size; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 229 | } else { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 230 | risc_phys_jump_addr = out->_dma_phys_start_addr; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 231 | risc_flag = RISC_CNT_INC; |
| 232 | } |
| 233 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 234 | /* Loop to 2ndFrameRISC or to Start of Risc |
| 235 | * program & generate IRQ |
| 236 | */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 237 | *(rp++) = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | risc_flag); |
| 238 | *(rp++) = cpu_to_le32(risc_phys_jump_addr); |
| 239 | *(rp++) = cpu_to_le32(0); |
| 240 | } |
| 241 | |
| 242 | return 0; |
| 243 | } |
| 244 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 245 | void cx25821_stop_upstream_video(struct cx25821_channel *chan) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 246 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 247 | struct cx25821_video_out_data *out = chan->out; |
| 248 | struct cx25821_dev *dev = chan->dev; |
| 249 | const struct sram_channel *sram_ch = chan->sram_channels; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 250 | u32 tmp = 0; |
| 251 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 252 | if (!out->_is_running) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 253 | pr_info("No video file is currently running so return!\n"); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 254 | return; |
| 255 | } |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 256 | |
| 257 | /* Set the interrupt mask register, disable irq. */ |
| 258 | cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) & ~(1 << sram_ch->irq_bit)); |
| 259 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 260 | /* Disable RISC interrupts */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 261 | tmp = cx_read(sram_ch->int_msk); |
| 262 | cx_write(sram_ch->int_msk, tmp & ~_intr_msk); |
| 263 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 264 | /* Turn OFF risc and fifo enable */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 265 | tmp = cx_read(sram_ch->dma_ctl); |
| 266 | cx_write(sram_ch->dma_ctl, tmp & ~(FLD_VID_FIFO_EN | FLD_VID_RISC_EN)); |
| 267 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 268 | free_irq(dev->pci->irq, chan); |
| 269 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 270 | /* Clear data buffer memory */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 271 | if (out->_data_buf_virt_addr) |
| 272 | memset(out->_data_buf_virt_addr, 0, out->_data_buf_size); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 273 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 274 | out->_is_running = 0; |
| 275 | out->_is_first_frame = 0; |
| 276 | out->_frame_count = 0; |
| 277 | out->_file_status = END_OF_FILE; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 278 | |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 279 | tmp = cx_read(VID_CH_MODE_SEL); |
| 280 | cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00); |
| 281 | } |
| 282 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 283 | void cx25821_free_mem_upstream(struct cx25821_channel *chan) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 284 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 285 | struct cx25821_video_out_data *out = chan->out; |
| 286 | struct cx25821_dev *dev = chan->dev; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 287 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 288 | if (out->_is_running) |
| 289 | cx25821_stop_upstream_video(chan); |
| 290 | |
| 291 | if (out->_dma_virt_addr) { |
| 292 | pci_free_consistent(dev->pci, out->_risc_size, |
| 293 | out->_dma_virt_addr, out->_dma_phys_addr); |
| 294 | out->_dma_virt_addr = NULL; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 295 | } |
| 296 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 297 | if (out->_data_buf_virt_addr) { |
| 298 | pci_free_consistent(dev->pci, out->_data_buf_size, |
| 299 | out->_data_buf_virt_addr, |
| 300 | out->_data_buf_phys_addr); |
| 301 | out->_data_buf_virt_addr = NULL; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 302 | } |
| 303 | } |
| 304 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 305 | int cx25821_write_frame(struct cx25821_channel *chan, |
| 306 | const char __user *data, size_t count) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 307 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 308 | struct cx25821_video_out_data *out = chan->out; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 309 | int line_size = (out->_pixel_format == PIXEL_FRMT_411) ? |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 310 | Y411_LINE_SZ : Y422_LINE_SZ; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 311 | int frame_size = 0; |
| 312 | int frame_offset = 0; |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 313 | int curpos = out->curpos; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 314 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 315 | if (out->is_60hz) |
Leonid V. Fedorenchik | 16f0fda | 2011-10-22 01:43:46 -0300 | [diff] [blame] | 316 | frame_size = (line_size == Y411_LINE_SZ) ? |
| 317 | FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422; |
| 318 | else |
| 319 | frame_size = (line_size == Y411_LINE_SZ) ? |
| 320 | FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 321 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 322 | if (curpos == 0) { |
| 323 | out->cur_frame_index = out->_frame_index; |
| 324 | if (wait_event_interruptible(out->waitq, out->cur_frame_index != out->_frame_index)) |
| 325 | return -EINTR; |
| 326 | out->cur_frame_index = out->_frame_index; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 327 | } |
| 328 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 329 | frame_offset = out->cur_frame_index ? frame_size : 0; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 330 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 331 | if (frame_size - curpos < count) |
| 332 | count = frame_size - curpos; |
| 333 | memcpy((char *)out->_data_buf_virt_addr + frame_offset + curpos, |
| 334 | data, count); |
| 335 | curpos += count; |
| 336 | if (curpos == frame_size) { |
| 337 | out->_frame_count++; |
| 338 | curpos = 0; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 339 | } |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 340 | out->curpos = curpos; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 341 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 342 | return count; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 343 | } |
| 344 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 345 | static int cx25821_upstream_buffer_prepare(struct cx25821_channel *chan, |
Hans Verkuil | bfef0d3 | 2013-04-13 06:28:54 -0300 | [diff] [blame] | 346 | const struct sram_channel *sram_ch, |
Mauro Carvalho Chehab | dafc456 | 2012-10-27 12:42:59 -0300 | [diff] [blame] | 347 | int bpl) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 348 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 349 | struct cx25821_video_out_data *out = chan->out; |
| 350 | struct cx25821_dev *dev = chan->dev; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 351 | int ret = 0; |
| 352 | dma_addr_t dma_addr; |
| 353 | dma_addr_t data_dma_addr; |
| 354 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 355 | if (out->_dma_virt_addr != NULL) |
| 356 | pci_free_consistent(dev->pci, out->upstream_riscbuf_size, |
| 357 | out->_dma_virt_addr, out->_dma_phys_addr); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 358 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 359 | out->_dma_virt_addr = pci_alloc_consistent(dev->pci, |
| 360 | out->upstream_riscbuf_size, &dma_addr); |
| 361 | out->_dma_virt_start_addr = out->_dma_virt_addr; |
| 362 | out->_dma_phys_start_addr = dma_addr; |
| 363 | out->_dma_phys_addr = dma_addr; |
| 364 | out->_risc_size = out->upstream_riscbuf_size; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 365 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 366 | if (!out->_dma_virt_addr) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 367 | pr_err("FAILED to allocate memory for Risc buffer! Returning\n"); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 368 | return -ENOMEM; |
| 369 | } |
| 370 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 371 | /* Clear memory at address */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 372 | memset(out->_dma_virt_addr, 0, out->_risc_size); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 373 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 374 | if (out->_data_buf_virt_addr != NULL) |
| 375 | pci_free_consistent(dev->pci, out->upstream_databuf_size, |
| 376 | out->_data_buf_virt_addr, |
| 377 | out->_data_buf_phys_addr); |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 378 | /* For Video Data buffer allocation */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 379 | out->_data_buf_virt_addr = pci_alloc_consistent(dev->pci, |
| 380 | out->upstream_databuf_size, &data_dma_addr); |
| 381 | out->_data_buf_phys_addr = data_dma_addr; |
| 382 | out->_data_buf_size = out->upstream_databuf_size; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 383 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 384 | if (!out->_data_buf_virt_addr) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 385 | pr_err("FAILED to allocate memory for data buffer! Returning\n"); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 386 | return -ENOMEM; |
| 387 | } |
| 388 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 389 | /* Clear memory at address */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 390 | memset(out->_data_buf_virt_addr, 0, out->_data_buf_size); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 391 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 392 | /* Create RISC programs */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 393 | ret = cx25821_risc_buffer_upstream(chan, dev->pci, 0, bpl, |
| 394 | out->_lines_count); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 395 | if (ret < 0) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 396 | pr_info("Failed creating Video Upstream Risc programs!\n"); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 397 | goto error; |
| 398 | } |
| 399 | |
| 400 | return 0; |
| 401 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 402 | error: |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 403 | return ret; |
| 404 | } |
| 405 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 406 | static int cx25821_video_upstream_irq(struct cx25821_channel *chan, u32 status) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 407 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 408 | struct cx25821_video_out_data *out = chan->out; |
| 409 | struct cx25821_dev *dev = chan->dev; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 410 | u32 int_msk_tmp; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 411 | const struct sram_channel *channel = chan->sram_channels; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 412 | int singlefield_lines = NTSC_FIELD_HEIGHT; |
| 413 | int line_size_in_bytes = Y422_LINE_SZ; |
| 414 | int odd_risc_prog_size = 0; |
| 415 | dma_addr_t risc_phys_jump_addr; |
| 416 | __le32 *rp; |
| 417 | |
| 418 | if (status & FLD_VID_SRC_RISC1) { |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 419 | /* We should only process one program per call */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 420 | u32 prog_cnt = cx_read(channel->gpcnt); |
| 421 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 422 | /* Since we've identified our IRQ, clear our bits from the |
| 423 | * interrupt mask and interrupt status registers */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 424 | int_msk_tmp = cx_read(channel->int_msk); |
| 425 | cx_write(channel->int_msk, int_msk_tmp & ~_intr_msk); |
| 426 | cx_write(channel->int_stat, _intr_msk); |
| 427 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 428 | wake_up(&out->waitq); |
| 429 | |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 430 | spin_lock(&dev->slock); |
| 431 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 432 | out->_frame_index = prog_cnt; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 433 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 434 | if (out->_is_first_frame) { |
| 435 | out->_is_first_frame = 0; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 436 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 437 | if (out->is_60hz) { |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 438 | singlefield_lines += 1; |
| 439 | odd_risc_prog_size = ODD_FLD_NTSC_PROG_SIZE; |
| 440 | } else { |
| 441 | singlefield_lines = PAL_FIELD_HEIGHT; |
| 442 | odd_risc_prog_size = ODD_FLD_PAL_PROG_SIZE; |
| 443 | } |
| 444 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 445 | if (out->_dma_virt_start_addr != NULL) { |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 446 | line_size_in_bytes = |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 447 | (out->_pixel_format == |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 448 | PIXEL_FRMT_411) ? Y411_LINE_SZ : |
| 449 | Y422_LINE_SZ; |
| 450 | risc_phys_jump_addr = |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 451 | out->_dma_phys_start_addr + |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 452 | odd_risc_prog_size; |
| 453 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 454 | rp = cx25821_update_riscprogram(chan, |
| 455 | out->_dma_virt_start_addr, TOP_OFFSET, |
Leonid V. Fedorenchik | 2b2d039 | 2011-09-02 11:55:46 +0800 | [diff] [blame] | 456 | line_size_in_bytes, 0x0, |
| 457 | singlefield_lines, FIFO_DISABLE, |
| 458 | ODD_FIELD); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 459 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 460 | /* Jump to Even Risc program of 1st Frame */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 461 | *(rp++) = cpu_to_le32(RISC_JUMP); |
| 462 | *(rp++) = cpu_to_le32(risc_phys_jump_addr); |
| 463 | *(rp++) = cpu_to_le32(0); |
| 464 | } |
| 465 | } |
| 466 | |
| 467 | spin_unlock(&dev->slock); |
| 468 | } else { |
| 469 | if (status & FLD_VID_SRC_UF) |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 470 | pr_err("%s(): Video Received Underflow Error Interrupt!\n", |
| 471 | __func__); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 472 | |
| 473 | if (status & FLD_VID_SRC_SYNC) |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 474 | pr_err("%s(): Video Received Sync Error Interrupt!\n", |
| 475 | __func__); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 476 | |
| 477 | if (status & FLD_VID_SRC_OPC_ERR) |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 478 | pr_err("%s(): Video Received OpCode Error Interrupt!\n", |
| 479 | __func__); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 480 | } |
| 481 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 482 | if (out->_file_status == END_OF_FILE) { |
| 483 | pr_err("EOF Channel 1 Framecount = %d\n", out->_frame_count); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 484 | return -1; |
| 485 | } |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 486 | /* ElSE, set the interrupt mask register, re-enable irq. */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 487 | int_msk_tmp = cx_read(channel->int_msk); |
| 488 | cx_write(channel->int_msk, int_msk_tmp |= _intr_msk); |
| 489 | |
| 490 | return 0; |
| 491 | } |
| 492 | |
| 493 | static irqreturn_t cx25821_upstream_irq(int irq, void *dev_id) |
| 494 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 495 | struct cx25821_channel *chan = dev_id; |
| 496 | struct cx25821_dev *dev = chan->dev; |
Hans Verkuil | 30fdf03 | 2012-04-20 06:26:19 -0300 | [diff] [blame] | 497 | u32 vid_status; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 498 | int handled = 0; |
Hans Verkuil | bfef0d3 | 2013-04-13 06:28:54 -0300 | [diff] [blame] | 499 | const struct sram_channel *sram_ch; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 500 | |
| 501 | if (!dev) |
| 502 | return -1; |
| 503 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 504 | sram_ch = chan->sram_channels; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 505 | |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 506 | vid_status = cx_read(sram_ch->int_stat); |
| 507 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 508 | /* Only deal with our interrupt */ |
Leonid V. Fedorenchik | 16f0fda | 2011-10-22 01:43:46 -0300 | [diff] [blame] | 509 | if (vid_status) |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 510 | handled = cx25821_video_upstream_irq(chan, vid_status); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 511 | |
| 512 | return IRQ_RETVAL(handled); |
| 513 | } |
| 514 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 515 | static void cx25821_set_pixelengine(struct cx25821_channel *chan, |
Hans Verkuil | bfef0d3 | 2013-04-13 06:28:54 -0300 | [diff] [blame] | 516 | const struct sram_channel *ch, |
Mauro Carvalho Chehab | dafc456 | 2012-10-27 12:42:59 -0300 | [diff] [blame] | 517 | int pix_format) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 518 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 519 | struct cx25821_video_out_data *out = chan->out; |
| 520 | struct cx25821_dev *dev = chan->dev; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 521 | int width = WIDTH_D1; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 522 | int height = out->_lines_count; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 523 | int num_lines, odd_num_lines; |
| 524 | u32 value; |
| 525 | int vip_mode = OUTPUT_FRMT_656; |
| 526 | |
| 527 | value = ((pix_format & 0x3) << 12) | (vip_mode & 0x7); |
| 528 | value &= 0xFFFFFFEF; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 529 | value |= out->is_60hz ? 0 : 0x10; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 530 | cx_write(ch->vid_fmt_ctl, value); |
| 531 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 532 | /* set number of active pixels in each line. |
| 533 | * Default is 720 pixels in both NTSC and PAL format */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 534 | cx_write(ch->vid_active_ctl1, width); |
| 535 | |
| 536 | num_lines = (height / 2) & 0x3FF; |
| 537 | odd_num_lines = num_lines; |
| 538 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 539 | if (out->is_60hz) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 540 | odd_num_lines += 1; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 541 | |
| 542 | value = (num_lines << 16) | odd_num_lines; |
| 543 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 544 | /* set number of active lines in field 0 (top) and field 1 (bottom) */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 545 | cx_write(ch->vid_active_ctl2, value); |
| 546 | |
| 547 | cx_write(ch->vid_cdt_size, VID_CDT_SIZE >> 3); |
| 548 | } |
| 549 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 550 | static int cx25821_start_video_dma_upstream(struct cx25821_channel *chan, |
Hans Verkuil | bfef0d3 | 2013-04-13 06:28:54 -0300 | [diff] [blame] | 551 | const struct sram_channel *sram_ch) |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 552 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 553 | struct cx25821_video_out_data *out = chan->out; |
| 554 | struct cx25821_dev *dev = chan->dev; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 555 | u32 tmp = 0; |
| 556 | int err = 0; |
| 557 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 558 | /* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for |
| 559 | * channel A-C |
| 560 | */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 561 | tmp = cx_read(VID_CH_MODE_SEL); |
| 562 | cx_write(VID_CH_MODE_SEL, tmp | 0x1B0001FF); |
| 563 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 564 | /* Set the physical start address of the RISC program in the initial |
| 565 | * program counter(IPC) member of the cmds. |
| 566 | */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 567 | cx_write(sram_ch->cmds_start + 0, out->_dma_phys_addr); |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 568 | /* Risc IPC High 64 bits 63-32 */ |
| 569 | cx_write(sram_ch->cmds_start + 4, 0); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 570 | |
| 571 | /* reset counter */ |
| 572 | cx_write(sram_ch->gpcnt_ctl, 3); |
| 573 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 574 | /* Clear our bits from the interrupt status register. */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 575 | cx_write(sram_ch->int_stat, _intr_msk); |
| 576 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 577 | /* Set the interrupt mask register, enable irq. */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 578 | cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << sram_ch->irq_bit)); |
| 579 | tmp = cx_read(sram_ch->int_msk); |
| 580 | cx_write(sram_ch->int_msk, tmp |= _intr_msk); |
| 581 | |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 582 | err = request_irq(dev->pci->irq, cx25821_upstream_irq, |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 583 | IRQF_SHARED, dev->name, chan); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 584 | if (err < 0) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 585 | pr_err("%s: can't get upstream IRQ %d\n", |
| 586 | dev->name, dev->pci->irq); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 587 | goto fail_irq; |
| 588 | } |
| 589 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 590 | /* Start the DMA engine */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 591 | tmp = cx_read(sram_ch->dma_ctl); |
| 592 | cx_set(sram_ch->dma_ctl, tmp | FLD_VID_RISC_EN); |
| 593 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 594 | out->_is_running = 1; |
| 595 | out->_is_first_frame = 1; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 596 | |
| 597 | return 0; |
| 598 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 599 | fail_irq: |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 600 | cx25821_dev_unregister(dev); |
| 601 | return err; |
| 602 | } |
| 603 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 604 | int cx25821_vidupstream_init(struct cx25821_channel *chan, |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 605 | int pixel_format) |
| 606 | { |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 607 | struct cx25821_video_out_data *out = chan->out; |
| 608 | struct cx25821_dev *dev = chan->dev; |
Hans Verkuil | bfef0d3 | 2013-04-13 06:28:54 -0300 | [diff] [blame] | 609 | const struct sram_channel *sram_ch; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 610 | u32 tmp; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 611 | int err = 0; |
| 612 | int data_frame_size = 0; |
| 613 | int risc_buffer_size = 0; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 614 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 615 | if (out->_is_running) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 616 | pr_info("Video Channel is still running so return!\n"); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 617 | return 0; |
| 618 | } |
| 619 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 620 | sram_ch = chan->sram_channels; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 621 | |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 622 | out->is_60hz = dev->tvnorm & V4L2_STD_525_60; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 623 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 624 | /* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for |
| 625 | * channel A-C |
| 626 | */ |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 627 | tmp = cx_read(VID_CH_MODE_SEL); |
| 628 | cx_write(VID_CH_MODE_SEL, tmp | 0x1B0001FF); |
| 629 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 630 | out->_is_running = 0; |
| 631 | out->_frame_count = 0; |
| 632 | out->_file_status = RESET_STATUS; |
| 633 | out->_lines_count = out->is_60hz ? 480 : 576; |
| 634 | out->_pixel_format = pixel_format; |
| 635 | out->_line_size = (out->_pixel_format == PIXEL_FRMT_422) ? |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 636 | (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2; |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 637 | data_frame_size = out->is_60hz ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ; |
| 638 | risc_buffer_size = out->is_60hz ? |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 639 | NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 640 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 641 | out->_is_running = 0; |
| 642 | out->_frame_count = 0; |
| 643 | out->_file_status = RESET_STATUS; |
| 644 | out->_lines_count = out->is_60hz ? 480 : 576; |
| 645 | out->_pixel_format = pixel_format; |
| 646 | out->_line_size = (out->_pixel_format == PIXEL_FRMT_422) ? |
Leonid V. Fedorenchik | 8eb1fdf | 2011-10-22 01:43:48 -0300 | [diff] [blame] | 647 | (WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2; |
Hans Verkuil | ea3f7ac | 2013-04-14 12:02:19 -0300 | [diff] [blame] | 648 | out->curpos = 0; |
| 649 | init_waitqueue_head(&out->waitq); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 650 | |
Peter Senna Tschudin | 216f393 | 2012-09-06 11:23:56 -0300 | [diff] [blame] | 651 | err = cx25821_sram_channel_setup_upstream(dev, sram_ch, |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 652 | out->_line_size, 0); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 653 | |
| 654 | /* setup fifo + format */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 655 | cx25821_set_pixelengine(chan, sram_ch, out->_pixel_format); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 656 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 657 | out->upstream_riscbuf_size = risc_buffer_size * 2; |
| 658 | out->upstream_databuf_size = data_frame_size * 2; |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 659 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 660 | /* Allocating buffers and prepare RISC program */ |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 661 | err = cx25821_upstream_buffer_prepare(chan, sram_ch, out->_line_size); |
Peter Senna Tschudin | 216f393 | 2012-09-06 11:23:56 -0300 | [diff] [blame] | 662 | if (err < 0) { |
Joe Perches | 36d89f7 | 2010-11-07 17:48:21 -0300 | [diff] [blame] | 663 | pr_err("%s: Failed to set up Video upstream buffers!\n", |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 664 | dev->name); |
| 665 | goto error; |
| 666 | } |
| 667 | |
Hans Verkuil | 7087d31 | 2013-04-14 12:10:32 -0300 | [diff] [blame] | 668 | cx25821_start_video_dma_upstream(chan, sram_ch); |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 669 | |
| 670 | return 0; |
| 671 | |
Olimpiu Pascariu | 1099123 | 2010-04-06 02:09:00 -0300 | [diff] [blame] | 672 | error: |
Mauro Carvalho Chehab | 1a9fc85 | 2009-09-13 11:30:11 -0300 | [diff] [blame] | 673 | cx25821_dev_unregister(dev); |
| 674 | |
| 675 | return err; |
| 676 | } |