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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/alpha/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995, 1999, 2000 Linus Torvalds
5 *
6 * This file contains the PC-specific time handling details:
7 * reading the RTC at bootup, etc..
8 * 1994-07-02 Alan Modra
9 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
10 * 1995-03-26 Markus Kuhn
11 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
12 * precision CMOS clock update
13 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
14 * "A Kernel Model for Precision Timekeeping" by Dave Mills
15 * 1997-01-09 Adrian Sun
16 * use interval timer if CONFIG_RTC=y
17 * 1997-10-29 John Bowman (bowman@math.ualberta.ca)
18 * fixed tick loss calculation in timer_interrupt
19 * (round system clock to nearest tick instead of truncating)
20 * fixed algorithm in time_init for getting time from CMOS clock
21 * 1999-04-16 Thorsten Kranzkowski (dl8bcu@gmx.net)
22 * fixed algorithm in do_gettimeofday() for calculating the precise time
23 * from processor cycle counter (now taking lost_ticks into account)
24 * 2000-08-13 Jan-Benedict Glaw <jbglaw@lug-owl.de>
25 * Fixed time_init to be aware of epoches != 1900. This prevents
26 * booting up in 2048 for me;) Code is stolen from rtc.c.
27 * 2003-06-03 R. Scott Bailey <scott.bailey@eds.com>
28 * Tighten sanity in time_init from 1% (10,000 PPM) to 250 PPM
29 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <linux/errno.h>
31#include <linux/module.h>
32#include <linux/sched.h>
33#include <linux/kernel.h>
34#include <linux/param.h>
35#include <linux/string.h>
36#include <linux/mm.h>
37#include <linux/delay.h>
38#include <linux/ioport.h>
39#include <linux/irq.h>
40#include <linux/interrupt.h>
41#include <linux/init.h>
42#include <linux/bcd.h>
43#include <linux/profile.h>
44
45#include <asm/uaccess.h>
46#include <asm/io.h>
47#include <asm/hwrpb.h>
48#include <asm/8253pit.h>
Ivan Kokshaysky5f7dc5d2009-01-15 13:51:19 -080049#include <asm/rtc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
51#include <linux/mc146818rtc.h>
52#include <linux/time.h>
53#include <linux/timex.h>
54
55#include "proto.h"
56#include "irq_impl.h"
57
Linus Torvalds1da177e2005-04-16 15:20:36 -070058static int set_rtc_mmss(unsigned long);
59
60DEFINE_SPINLOCK(rtc_lock);
Al Virocff52da2006-10-11 17:40:22 +010061EXPORT_SYMBOL(rtc_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
63#define TICK_SIZE (tick_nsec / 1000)
64
65/*
66 * Shift amount by which scaled_ticks_per_cycle is scaled. Shifting
67 * by 48 gives us 16 bits for HZ while keeping the accuracy good even
68 * for large CPU clock rates.
69 */
70#define FIX_SHIFT 48
71
72/* lump static variables together for more efficient access: */
73static struct {
74 /* cycle counter last time it got invoked */
75 __u32 last_time;
76 /* ticks/cycle * 2^48 */
77 unsigned long scaled_ticks_per_cycle;
78 /* last time the CMOS clock got updated */
79 time_t last_rtc_update;
80 /* partial unused tick */
81 unsigned long partial_tick;
82} state;
83
84unsigned long est_cycle_freq;
85
86
87static inline __u32 rpcc(void)
88{
89 __u32 result;
90 asm volatile ("rpcc %0" : "=r"(result));
91 return result;
92}
93
94/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 * timer_interrupt() needs to keep up the real-time clock,
96 * as well as call the "do_timer()" routine every clocktick
97 */
Al Viro8774cb82006-10-07 14:17:31 +010098irqreturn_t timer_interrupt(int irq, void *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -070099{
100 unsigned long delta;
101 __u32 now;
102 long nticks;
103
104#ifndef CONFIG_SMP
105 /* Not SMP, do kernel PC profiling here. */
Al Viro8774cb82006-10-07 14:17:31 +0100106 profile_tick(CPU_PROFILING);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107#endif
108
109 write_seqlock(&xtime_lock);
110
111 /*
112 * Calculate how many ticks have passed since the last update,
113 * including any previous partial leftover. Save any resulting
114 * fraction for the next pass.
115 */
116 now = rpcc();
117 delta = now - state.last_time;
118 state.last_time = now;
119 delta = delta * state.scaled_ticks_per_cycle + state.partial_tick;
120 state.partial_tick = delta & ((1UL << FIX_SHIFT) - 1);
121 nticks = delta >> FIX_SHIFT;
122
Peter Zijlstraaa02cd22008-02-13 21:33:16 +0100123 if (nticks)
124 do_timer(nticks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125
126 /*
127 * If we have an externally synchronized Linux clock, then update
128 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
129 * called as close as possible to 500 ms before the new second starts.
130 */
john stultzb149ee22005-09-06 15:17:46 -0700131 if (ntp_synced()
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132 && xtime.tv_sec > state.last_rtc_update + 660
133 && xtime.tv_nsec >= 500000 - ((unsigned) TICK_SIZE) / 2
134 && xtime.tv_nsec <= 500000 + ((unsigned) TICK_SIZE) / 2) {
135 int tmp = set_rtc_mmss(xtime.tv_sec);
136 state.last_rtc_update = xtime.tv_sec - (tmp ? 600 : 0);
137 }
138
139 write_sequnlock(&xtime_lock);
Peter Zijlstraaa02cd22008-02-13 21:33:16 +0100140
141#ifndef CONFIG_SMP
142 while (nticks--)
143 update_process_times(user_mode(get_irq_regs()));
144#endif
145
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 return IRQ_HANDLED;
147}
148
Sam Ravnborgebaf4fc2007-07-15 23:38:37 -0700149void __init
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150common_init_rtc(void)
151{
152 unsigned char x;
153
154 /* Reset periodic interrupt frequency. */
155 x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f;
156 /* Test includes known working values on various platforms
157 where 0x26 is wrong; we refuse to change those. */
158 if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) {
159 printk("Setting RTC_FREQ to 1024 Hz (%x)\n", x);
160 CMOS_WRITE(0x26, RTC_FREQ_SELECT);
161 }
162
163 /* Turn on periodic interrupts. */
164 x = CMOS_READ(RTC_CONTROL);
165 if (!(x & RTC_PIE)) {
166 printk("Turning on RTC interrupts.\n");
167 x |= RTC_PIE;
168 x &= ~(RTC_AIE | RTC_UIE);
169 CMOS_WRITE(x, RTC_CONTROL);
170 }
171 (void) CMOS_READ(RTC_INTR_FLAGS);
172
173 outb(0x36, 0x43); /* pit counter 0: system timer */
174 outb(0x00, 0x40);
175 outb(0x00, 0x40);
176
177 outb(0xb6, 0x43); /* pit counter 2: speaker */
178 outb(0x31, 0x42);
179 outb(0x13, 0x42);
180
181 init_rtc_irq();
182}
183
Ivan Kokshaysky5f7dc5d2009-01-15 13:51:19 -0800184unsigned int common_get_rtc_time(struct rtc_time *time)
185{
186 return __get_rtc_time(time);
187}
188
189int common_set_rtc_time(struct rtc_time *time)
190{
191 return __set_rtc_time(time);
192}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193
194/* Validate a computed cycle counter result against the known bounds for
195 the given processor core. There's too much brokenness in the way of
196 timing hardware for any one method to work everywhere. :-(
197
198 Return 0 if the result cannot be trusted, otherwise return the argument. */
199
200static unsigned long __init
201validate_cc_value(unsigned long cc)
202{
203 static struct bounds {
204 unsigned int min, max;
205 } cpu_hz[] __initdata = {
206 [EV3_CPU] = { 50000000, 200000000 }, /* guess */
207 [EV4_CPU] = { 100000000, 300000000 },
208 [LCA4_CPU] = { 100000000, 300000000 }, /* guess */
209 [EV45_CPU] = { 200000000, 300000000 },
210 [EV5_CPU] = { 250000000, 433000000 },
211 [EV56_CPU] = { 333000000, 667000000 },
212 [PCA56_CPU] = { 400000000, 600000000 }, /* guess */
213 [PCA57_CPU] = { 500000000, 600000000 }, /* guess */
214 [EV6_CPU] = { 466000000, 600000000 },
215 [EV67_CPU] = { 600000000, 750000000 },
216 [EV68AL_CPU] = { 750000000, 940000000 },
217 [EV68CB_CPU] = { 1000000000, 1333333333 },
218 /* None of the following are shipping as of 2001-11-01. */
219 [EV68CX_CPU] = { 1000000000, 1700000000 }, /* guess */
220 [EV69_CPU] = { 1000000000, 1700000000 }, /* guess */
221 [EV7_CPU] = { 800000000, 1400000000 }, /* guess */
222 [EV79_CPU] = { 1000000000, 2000000000 }, /* guess */
223 };
224
225 /* Allow for some drift in the crystal. 10MHz is more than enough. */
226 const unsigned int deviation = 10000000;
227
228 struct percpu_struct *cpu;
229 unsigned int index;
230
231 cpu = (struct percpu_struct *)((char*)hwrpb + hwrpb->processor_offset);
232 index = cpu->type & 0xffffffff;
233
234 /* If index out of bounds, no way to validate. */
Tobias Klauser25c87162006-07-30 03:03:23 -0700235 if (index >= ARRAY_SIZE(cpu_hz))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 return cc;
237
238 /* If index contains no data, no way to validate. */
239 if (cpu_hz[index].max == 0)
240 return cc;
241
242 if (cc < cpu_hz[index].min - deviation
243 || cc > cpu_hz[index].max + deviation)
244 return 0;
245
246 return cc;
247}
248
249
250/*
251 * Calibrate CPU clock using legacy 8254 timer/counter. Stolen from
252 * arch/i386/time.c.
253 */
254
255#define CALIBRATE_LATCH 0xffff
256#define TIMEOUT_COUNT 0x100000
257
258static unsigned long __init
259calibrate_cc_with_pit(void)
260{
261 int cc, count = 0;
262
263 /* Set the Gate high, disable speaker */
264 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
265
266 /*
267 * Now let's take care of CTC channel 2
268 *
269 * Set the Gate high, program CTC channel 2 for mode 0,
270 * (interrupt on terminal count mode), binary count,
271 * load 5 * LATCH count, (LSB and MSB) to begin countdown.
272 */
273 outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */
274 outb(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */
275 outb(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */
276
277 cc = rpcc();
278 do {
279 count++;
280 } while ((inb(0x61) & 0x20) == 0 && count < TIMEOUT_COUNT);
281 cc = rpcc() - cc;
282
283 /* Error: ECTCNEVERSET or ECPUTOOFAST. */
284 if (count <= 1 || count == TIMEOUT_COUNT)
285 return 0;
286
287 return ((long)cc * PIT_TICK_RATE) / (CALIBRATE_LATCH + 1);
288}
289
290/* The Linux interpretation of the CMOS clock register contents:
291 When the Update-In-Progress (UIP) flag goes from 1 to 0, the
292 RTC registers show the second which has precisely just started.
293 Let's hope other operating systems interpret the RTC the same way. */
294
295static unsigned long __init
296rpcc_after_update_in_progress(void)
297{
298 do { } while (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP));
299 do { } while (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP);
300
301 return rpcc();
302}
303
304void __init
305time_init(void)
306{
307 unsigned int year, mon, day, hour, min, sec, cc1, cc2, epoch;
308 unsigned long cycle_freq, tolerance;
309 long diff;
310
311 /* Calibrate CPU clock -- attempt #1. */
312 if (!est_cycle_freq)
313 est_cycle_freq = validate_cc_value(calibrate_cc_with_pit());
314
Matt Mackall4c2e6f62006-03-28 01:56:09 -0800315 cc1 = rpcc();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316
317 /* Calibrate CPU clock -- attempt #2. */
318 if (!est_cycle_freq) {
Matt Mackall4c2e6f62006-03-28 01:56:09 -0800319 cc1 = rpcc_after_update_in_progress();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 cc2 = rpcc_after_update_in_progress();
321 est_cycle_freq = validate_cc_value(cc2 - cc1);
322 cc1 = cc2;
323 }
324
325 cycle_freq = hwrpb->cycle_freq;
326 if (est_cycle_freq) {
327 /* If the given value is within 250 PPM of what we calculated,
328 accept it. Otherwise, use what we found. */
329 tolerance = cycle_freq / 4000;
330 diff = cycle_freq - est_cycle_freq;
331 if (diff < 0)
332 diff = -diff;
333 if ((unsigned long)diff > tolerance) {
334 cycle_freq = est_cycle_freq;
335 printk("HWRPB cycle frequency bogus. "
336 "Estimated %lu Hz\n", cycle_freq);
337 } else {
338 est_cycle_freq = 0;
339 }
340 } else if (! validate_cc_value (cycle_freq)) {
341 printk("HWRPB cycle frequency bogus, "
342 "and unable to estimate a proper value!\n");
343 }
344
345 /* From John Bowman <bowman@math.ualberta.ca>: allow the values
346 to settle, as the Update-In-Progress bit going low isn't good
347 enough on some hardware. 2ms is our guess; we haven't found
348 bogomips yet, but this is close on a 500Mhz box. */
349 __delay(1000000);
350
351 sec = CMOS_READ(RTC_SECONDS);
352 min = CMOS_READ(RTC_MINUTES);
353 hour = CMOS_READ(RTC_HOURS);
354 day = CMOS_READ(RTC_DAY_OF_MONTH);
355 mon = CMOS_READ(RTC_MONTH);
356 year = CMOS_READ(RTC_YEAR);
357
358 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
Adrian Bunk18b1bd02008-10-18 20:28:39 -0700359 sec = bcd2bin(sec);
360 min = bcd2bin(min);
361 hour = bcd2bin(hour);
362 day = bcd2bin(day);
363 mon = bcd2bin(mon);
364 year = bcd2bin(year);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 }
366
367 /* PC-like is standard; used for year >= 70 */
368 epoch = 1900;
369 if (year < 20)
370 epoch = 2000;
371 else if (year >= 20 && year < 48)
372 /* NT epoch */
373 epoch = 1980;
374 else if (year >= 48 && year < 70)
375 /* Digital UNIX epoch */
376 epoch = 1952;
377
378 printk(KERN_INFO "Using epoch = %d\n", epoch);
379
380 if ((year += epoch) < 1970)
381 year += 100;
382
383 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
384 xtime.tv_nsec = 0;
385
386 wall_to_monotonic.tv_sec -= xtime.tv_sec;
387 wall_to_monotonic.tv_nsec = 0;
388
389 if (HZ > (1<<16)) {
390 extern void __you_loose (void);
391 __you_loose();
392 }
393
394 state.last_time = cc1;
395 state.scaled_ticks_per_cycle
396 = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq;
397 state.last_rtc_update = 0;
398 state.partial_tick = 0L;
399
400 /* Startup the timer source. */
401 alpha_mv.init_rtc();
402}
403
404/*
405 * Use the cycle counter to estimate an displacement from the last time
406 * tick. Unfortunately the Alpha designers made only the low 32-bits of
407 * the cycle counter active, so we overflow on 8.2 seconds on a 500MHz
408 * part. So we can't do the "find absolute time in terms of cycles" thing
409 * that the other ports do.
410 */
john stultz4f543fa2009-09-21 17:04:00 -0700411u32 arch_gettimeoffset(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413#ifdef CONFIG_SMP
414 /* Until and unless we figure out how to get cpu cycle counters
415 in sync and keep them there, we can't use the rpcc tricks. */
john stultz4f543fa2009-09-21 17:04:00 -0700416 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417#else
john stultz4f543fa2009-09-21 17:04:00 -0700418 unsigned long delta_cycles, delta_usec, partial_tick;
419
420 delta_cycles = rpcc() - state.last_time;
421 partial_tick = state.partial_tick;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422 /*
423 * usec = cycles * ticks_per_cycle * 2**48 * 1e6 / (2**48 * ticks)
424 * = cycles * (s_t_p_c) * 1e6 / (2**48 * ticks)
425 * = cycles * (s_t_p_c) * 15625 / (2**42 * ticks)
426 *
427 * which, given a 600MHz cycle and a 1024Hz tick, has a
428 * dynamic range of about 1.7e17, which is less than the
429 * 1.8e19 in an unsigned long, so we are safe from overflow.
430 *
431 * Round, but with .5 up always, since .5 to even is harder
432 * with no clear gain.
433 */
434
435 delta_usec = (delta_cycles * state.scaled_ticks_per_cycle
Atsushi Nemoto8ef38602006-09-30 23:28:31 -0700436 + partial_tick) * 15625;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 delta_usec = ((delta_usec / ((1UL << (FIX_SHIFT-6-1)) * HZ)) + 1) / 2;
john stultz4f543fa2009-09-21 17:04:00 -0700438 return delta_usec * 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440}
441
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442/*
443 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
444 * called 500 ms after the second nowtime has started, because when
445 * nowtime is written into the registers of the CMOS clock, it will
446 * jump to the next second precisely 500 ms later. Check the Motorola
447 * MC146818A or Dallas DS12887 data sheet for details.
448 *
449 * BUG: This routine does not handle hour overflow properly; it just
450 * sets the minutes. Usually you won't notice until after reboot!
451 */
452
453
454static int
455set_rtc_mmss(unsigned long nowtime)
456{
457 int retval = 0;
458 int real_seconds, real_minutes, cmos_minutes;
459 unsigned char save_control, save_freq_select;
460
461 /* irq are locally disabled here */
462 spin_lock(&rtc_lock);
463 /* Tell the clock it's being set */
464 save_control = CMOS_READ(RTC_CONTROL);
465 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
466
467 /* Stop and reset prescaler */
468 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
469 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
470
471 cmos_minutes = CMOS_READ(RTC_MINUTES);
472 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
Adrian Bunk18b1bd02008-10-18 20:28:39 -0700473 cmos_minutes = bcd2bin(cmos_minutes);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474
475 /*
476 * since we're only adjusting minutes and seconds,
477 * don't interfere with hour overflow. This avoids
478 * messing with unknown time zones but requires your
479 * RTC not to be off by more than 15 minutes
480 */
481 real_seconds = nowtime % 60;
482 real_minutes = nowtime / 60;
483 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) {
484 /* correct for half hour time zone */
485 real_minutes += 30;
486 }
487 real_minutes %= 60;
488
489 if (abs(real_minutes - cmos_minutes) < 30) {
490 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
Adrian Bunk18b1bd02008-10-18 20:28:39 -0700491 real_seconds = bin2bcd(real_seconds);
492 real_minutes = bin2bcd(real_minutes);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493 }
494 CMOS_WRITE(real_seconds,RTC_SECONDS);
495 CMOS_WRITE(real_minutes,RTC_MINUTES);
496 } else {
497 printk(KERN_WARNING
498 "set_rtc_mmss: can't update from %d to %d\n",
499 cmos_minutes, real_minutes);
500 retval = -1;
501 }
502
503 /* The following flags have to be released exactly in this order,
504 * otherwise the DS12887 (popular MC146818A clone with integrated
505 * battery and quartz) will not reset the oscillator and will not
506 * update precisely 500 ms later. You won't find this mentioned in
507 * the Dallas Semiconductor data sheets, but who believes data
508 * sheets anyway ... -- Markus Kuhn
509 */
510 CMOS_WRITE(save_control, RTC_CONTROL);
511 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
512 spin_unlock(&rtc_lock);
513
514 return retval;
515}