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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: include/asm-blackfin/cplbinit.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
Mike Frysinger81a487a2007-11-21 15:55:45 +080030#ifndef __ASM_CPLBINIT_H__
31#define __ASM_CPLBINIT_H__
32
Bryan Wu1394f032007-05-06 14:50:22 -070033#include <asm/blackfin.h>
34#include <asm/cplb.h>
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080035#include <linux/threads.h>
36
37#ifdef CONFIG_CPLB_SWITCH_TAB_L1
38# define PDT_ATTR __attribute__((l1_data))
39#else
40# define PDT_ATTR
41#endif
42
43struct cplb_entry {
44 unsigned long data, addr;
45};
46
47struct cplb_boundary {
48 unsigned long eaddr; /* End of this region. */
49 unsigned long data; /* CPLB data value. */
50};
51
52extern struct cplb_boundary dcplb_bounds[];
53extern struct cplb_boundary icplb_bounds[];
54extern int dcplb_nr_bounds, icplb_nr_bounds;
55
56extern struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS];
57extern struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS];
58extern int first_switched_icplb;
59extern int first_switched_dcplb;
60
61extern int nr_dcplb_miss[], nr_icplb_miss[], nr_icplb_supv_miss[];
62extern int nr_dcplb_prot[], nr_cplb_flush[];
Bryan Wu1394f032007-05-06 14:50:22 -070063
Bernd Schmidtb97b8a92008-01-27 18:39:16 +080064#ifdef CONFIG_MPU
65
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080066extern int first_mask_dcplb;
Bernd Schmidtb97b8a92008-01-27 18:39:16 +080067
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080068extern int page_mask_order;
69extern int page_mask_nelts;
Bernd Schmidtb97b8a92008-01-27 18:39:16 +080070
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080071extern unsigned long *current_rwx_mask[NR_CPUS];
Bryan Wu1394f032007-05-06 14:50:22 -070072
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080073extern void flush_switched_cplbs(unsigned int);
74extern void set_mask_dcplbs(unsigned long *, unsigned int);
Graf Yangb8a98982008-11-18 17:48:22 +080075
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080076extern void __noreturn panic_cplb_error(int seqstat, struct pt_regs *);
Bryan Wu1394f032007-05-06 14:50:22 -070077
Bernd Schmidtb97b8a92008-01-27 18:39:16 +080078#endif /* CONFIG_MPU */
79
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080080extern void bfin_icache_init(struct cplb_entry *icplb_tbl);
81extern void bfin_dcache_init(struct cplb_entry *icplb_tbl);
82
Graf Yangb8a98982008-11-18 17:48:22 +080083#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080084extern void generate_cplb_tables_all(void);
Graf Yangb8a98982008-11-18 17:48:22 +080085extern void generate_cplb_tables_cpu(unsigned int cpu);
86#endif
Mike Frysinger81a487a2007-11-21 15:55:45 +080087#endif