Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2013 Emilio López |
| 3 | * |
| 4 | * Emilio López <emilio@elopez.com.ar> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
Stephen Boyd | 9dfefe8 | 2015-06-19 15:00:46 -0700 | [diff] [blame] | 17 | #include <linux/clk.h> |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 18 | #include <linux/clk-provider.h> |
| 19 | #include <linux/clkdev.h> |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 20 | #include <linux/of.h> |
| 21 | #include <linux/of_address.h> |
Hans de Goede | cfb0086 | 2014-02-07 16:21:49 +0100 | [diff] [blame] | 22 | #include <linux/reset-controller.h> |
Stephen Boyd | 9dfefe8 | 2015-06-19 15:00:46 -0700 | [diff] [blame] | 23 | #include <linux/slab.h> |
Maxime Ripard | 601da9d | 2014-07-04 22:24:52 +0200 | [diff] [blame] | 24 | #include <linux/spinlock.h> |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 25 | #include <linux/log2.h> |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 26 | |
| 27 | #include "clk-factors.h" |
| 28 | |
| 29 | static DEFINE_SPINLOCK(clk_lock); |
| 30 | |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 31 | /** |
| 32 | * sun6i_a31_ahb1_clk_setup() - Setup function for a31 ahb1 composite clk |
| 33 | */ |
| 34 | |
| 35 | #define SUN6I_AHB1_MAX_PARENTS 4 |
| 36 | #define SUN6I_AHB1_MUX_PARENT_PLL6 3 |
| 37 | #define SUN6I_AHB1_MUX_SHIFT 12 |
| 38 | /* un-shifted mask is what mux_clk expects */ |
| 39 | #define SUN6I_AHB1_MUX_MASK 0x3 |
| 40 | #define SUN6I_AHB1_MUX_GET_PARENT(reg) ((reg >> SUN6I_AHB1_MUX_SHIFT) & \ |
| 41 | SUN6I_AHB1_MUX_MASK) |
| 42 | |
| 43 | #define SUN6I_AHB1_DIV_SHIFT 4 |
| 44 | #define SUN6I_AHB1_DIV_MASK (0x3 << SUN6I_AHB1_DIV_SHIFT) |
| 45 | #define SUN6I_AHB1_DIV_GET(reg) ((reg & SUN6I_AHB1_DIV_MASK) >> \ |
| 46 | SUN6I_AHB1_DIV_SHIFT) |
| 47 | #define SUN6I_AHB1_DIV_SET(reg, div) ((reg & ~SUN6I_AHB1_DIV_MASK) | \ |
| 48 | (div << SUN6I_AHB1_DIV_SHIFT)) |
| 49 | #define SUN6I_AHB1_PLL6_DIV_SHIFT 6 |
| 50 | #define SUN6I_AHB1_PLL6_DIV_MASK (0x3 << SUN6I_AHB1_PLL6_DIV_SHIFT) |
| 51 | #define SUN6I_AHB1_PLL6_DIV_GET(reg) ((reg & SUN6I_AHB1_PLL6_DIV_MASK) >> \ |
| 52 | SUN6I_AHB1_PLL6_DIV_SHIFT) |
| 53 | #define SUN6I_AHB1_PLL6_DIV_SET(reg, div) ((reg & ~SUN6I_AHB1_PLL6_DIV_MASK) | \ |
| 54 | (div << SUN6I_AHB1_PLL6_DIV_SHIFT)) |
| 55 | |
| 56 | struct sun6i_ahb1_clk { |
| 57 | struct clk_hw hw; |
| 58 | void __iomem *reg; |
| 59 | }; |
| 60 | |
| 61 | #define to_sun6i_ahb1_clk(_hw) container_of(_hw, struct sun6i_ahb1_clk, hw) |
| 62 | |
| 63 | static unsigned long sun6i_ahb1_clk_recalc_rate(struct clk_hw *hw, |
| 64 | unsigned long parent_rate) |
| 65 | { |
| 66 | struct sun6i_ahb1_clk *ahb1 = to_sun6i_ahb1_clk(hw); |
| 67 | unsigned long rate; |
| 68 | u32 reg; |
| 69 | |
| 70 | /* Fetch the register value */ |
| 71 | reg = readl(ahb1->reg); |
| 72 | |
| 73 | /* apply pre-divider first if parent is pll6 */ |
| 74 | if (SUN6I_AHB1_MUX_GET_PARENT(reg) == SUN6I_AHB1_MUX_PARENT_PLL6) |
| 75 | parent_rate /= SUN6I_AHB1_PLL6_DIV_GET(reg) + 1; |
| 76 | |
| 77 | /* clk divider */ |
| 78 | rate = parent_rate >> SUN6I_AHB1_DIV_GET(reg); |
| 79 | |
| 80 | return rate; |
| 81 | } |
| 82 | |
| 83 | static long sun6i_ahb1_clk_round(unsigned long rate, u8 *divp, u8 *pre_divp, |
| 84 | u8 parent, unsigned long parent_rate) |
| 85 | { |
| 86 | u8 div, calcp, calcm = 1; |
| 87 | |
| 88 | /* |
| 89 | * clock can only divide, so we will never be able to achieve |
| 90 | * frequencies higher than the parent frequency |
| 91 | */ |
| 92 | if (parent_rate && rate > parent_rate) |
| 93 | rate = parent_rate; |
| 94 | |
| 95 | div = DIV_ROUND_UP(parent_rate, rate); |
| 96 | |
| 97 | /* calculate pre-divider if parent is pll6 */ |
| 98 | if (parent == SUN6I_AHB1_MUX_PARENT_PLL6) { |
| 99 | if (div < 4) |
| 100 | calcp = 0; |
| 101 | else if (div / 2 < 4) |
| 102 | calcp = 1; |
| 103 | else if (div / 4 < 4) |
| 104 | calcp = 2; |
| 105 | else |
| 106 | calcp = 3; |
| 107 | |
| 108 | calcm = DIV_ROUND_UP(div, 1 << calcp); |
| 109 | } else { |
| 110 | calcp = __roundup_pow_of_two(div); |
| 111 | calcp = calcp > 3 ? 3 : calcp; |
| 112 | } |
| 113 | |
| 114 | /* we were asked to pass back divider values */ |
| 115 | if (divp) { |
| 116 | *divp = calcp; |
| 117 | *pre_divp = calcm - 1; |
| 118 | } |
| 119 | |
| 120 | return (parent_rate / calcm) >> calcp; |
| 121 | } |
| 122 | |
Boris Brezillon | 0817b62 | 2015-07-07 20:48:08 +0200 | [diff] [blame] | 123 | static int sun6i_ahb1_clk_determine_rate(struct clk_hw *hw, |
| 124 | struct clk_rate_request *req) |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 125 | { |
Stephen Boyd | 1b14afa | 2015-07-30 17:20:57 -0700 | [diff] [blame] | 126 | struct clk_hw *parent, *best_parent = NULL; |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 127 | int i, num_parents; |
| 128 | unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0; |
| 129 | |
| 130 | /* find the parent that can help provide the fastest rate <= rate */ |
Stephen Boyd | 497295a | 2015-06-25 16:53:23 -0700 | [diff] [blame] | 131 | num_parents = clk_hw_get_num_parents(hw); |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 132 | for (i = 0; i < num_parents; i++) { |
Stephen Boyd | 1b14afa | 2015-07-30 17:20:57 -0700 | [diff] [blame] | 133 | parent = clk_hw_get_parent_by_index(hw, i); |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 134 | if (!parent) |
| 135 | continue; |
Stephen Boyd | 98d8a60 | 2015-06-29 16:56:30 -0700 | [diff] [blame] | 136 | if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) |
Stephen Boyd | 1b14afa | 2015-07-30 17:20:57 -0700 | [diff] [blame] | 137 | parent_rate = clk_hw_round_rate(parent, req->rate); |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 138 | else |
Stephen Boyd | 1b14afa | 2015-07-30 17:20:57 -0700 | [diff] [blame] | 139 | parent_rate = clk_hw_get_rate(parent); |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 140 | |
Boris Brezillon | 0817b62 | 2015-07-07 20:48:08 +0200 | [diff] [blame] | 141 | child_rate = sun6i_ahb1_clk_round(req->rate, NULL, NULL, i, |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 142 | parent_rate); |
| 143 | |
Boris Brezillon | 0817b62 | 2015-07-07 20:48:08 +0200 | [diff] [blame] | 144 | if (child_rate <= req->rate && child_rate > best_child_rate) { |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 145 | best_parent = parent; |
| 146 | best = parent_rate; |
| 147 | best_child_rate = child_rate; |
| 148 | } |
| 149 | } |
| 150 | |
Boris Brezillon | 57d866e | 2015-07-09 22:39:38 +0200 | [diff] [blame] | 151 | if (!best_parent) |
| 152 | return -EINVAL; |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 153 | |
Stephen Boyd | 1b14afa | 2015-07-30 17:20:57 -0700 | [diff] [blame] | 154 | req->best_parent_hw = best_parent; |
Boris Brezillon | 0817b62 | 2015-07-07 20:48:08 +0200 | [diff] [blame] | 155 | req->best_parent_rate = best; |
| 156 | req->rate = best_child_rate; |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 157 | |
Boris Brezillon | 0817b62 | 2015-07-07 20:48:08 +0200 | [diff] [blame] | 158 | return 0; |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 159 | } |
| 160 | |
| 161 | static int sun6i_ahb1_clk_set_rate(struct clk_hw *hw, unsigned long rate, |
| 162 | unsigned long parent_rate) |
| 163 | { |
| 164 | struct sun6i_ahb1_clk *ahb1 = to_sun6i_ahb1_clk(hw); |
| 165 | unsigned long flags; |
| 166 | u8 div, pre_div, parent; |
| 167 | u32 reg; |
| 168 | |
| 169 | spin_lock_irqsave(&clk_lock, flags); |
| 170 | |
| 171 | reg = readl(ahb1->reg); |
| 172 | |
| 173 | /* need to know which parent is used to apply pre-divider */ |
| 174 | parent = SUN6I_AHB1_MUX_GET_PARENT(reg); |
| 175 | sun6i_ahb1_clk_round(rate, &div, &pre_div, parent, parent_rate); |
| 176 | |
| 177 | reg = SUN6I_AHB1_DIV_SET(reg, div); |
| 178 | reg = SUN6I_AHB1_PLL6_DIV_SET(reg, pre_div); |
| 179 | writel(reg, ahb1->reg); |
| 180 | |
| 181 | spin_unlock_irqrestore(&clk_lock, flags); |
| 182 | |
| 183 | return 0; |
| 184 | } |
| 185 | |
| 186 | static const struct clk_ops sun6i_ahb1_clk_ops = { |
| 187 | .determine_rate = sun6i_ahb1_clk_determine_rate, |
| 188 | .recalc_rate = sun6i_ahb1_clk_recalc_rate, |
| 189 | .set_rate = sun6i_ahb1_clk_set_rate, |
| 190 | }; |
| 191 | |
| 192 | static void __init sun6i_ahb1_clk_setup(struct device_node *node) |
| 193 | { |
| 194 | struct clk *clk; |
| 195 | struct sun6i_ahb1_clk *ahb1; |
| 196 | struct clk_mux *mux; |
| 197 | const char *clk_name = node->name; |
| 198 | const char *parents[SUN6I_AHB1_MAX_PARENTS]; |
| 199 | void __iomem *reg; |
Dinh Nguyen | 8a53fb2 | 2015-07-06 22:59:05 -0500 | [diff] [blame] | 200 | int i; |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 201 | |
| 202 | reg = of_io_request_and_map(node, 0, of_node_full_name(node)); |
Maxime Ripard | 5ac382c | 2015-05-02 17:03:22 +0200 | [diff] [blame] | 203 | if (IS_ERR(reg)) |
| 204 | return; |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 205 | |
| 206 | /* we have a mux, we will have >1 parents */ |
Dinh Nguyen | 8a53fb2 | 2015-07-06 22:59:05 -0500 | [diff] [blame] | 207 | i = of_clk_parent_fill(node, parents, SUN6I_AHB1_MAX_PARENTS); |
Chen-Yu Tsai | 7954dfa | 2014-11-26 15:16:52 +0800 | [diff] [blame] | 208 | of_property_read_string(node, "clock-output-names", &clk_name); |
| 209 | |
| 210 | ahb1 = kzalloc(sizeof(struct sun6i_ahb1_clk), GFP_KERNEL); |
| 211 | if (!ahb1) |
| 212 | return; |
| 213 | |
| 214 | mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); |
| 215 | if (!mux) { |
| 216 | kfree(ahb1); |
| 217 | return; |
| 218 | } |
| 219 | |
| 220 | /* set up clock properties */ |
| 221 | mux->reg = reg; |
| 222 | mux->shift = SUN6I_AHB1_MUX_SHIFT; |
| 223 | mux->mask = SUN6I_AHB1_MUX_MASK; |
| 224 | mux->lock = &clk_lock; |
| 225 | ahb1->reg = reg; |
| 226 | |
| 227 | clk = clk_register_composite(NULL, clk_name, parents, i, |
| 228 | &mux->hw, &clk_mux_ops, |
| 229 | &ahb1->hw, &sun6i_ahb1_clk_ops, |
| 230 | NULL, NULL, 0); |
| 231 | |
| 232 | if (!IS_ERR(clk)) { |
| 233 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 234 | clk_register_clkdev(clk, clk_name, NULL); |
| 235 | } |
| 236 | } |
| 237 | CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-clk", sun6i_ahb1_clk_setup); |
| 238 | |
Emilio López | 40a5dcb | 2013-12-23 00:32:32 -0300 | [diff] [blame] | 239 | /* Maximum number of parents our clocks have */ |
| 240 | #define SUNXI_MAX_PARENTS 5 |
| 241 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 242 | /** |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 243 | * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1 |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 244 | * PLL1 rate is calculated as follows |
| 245 | * rate = (parent_rate * n * (k + 1) >> p) / (m + 1); |
| 246 | * parent_rate is always 24Mhz |
| 247 | */ |
| 248 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 249 | static void sun4i_get_pll1_factors(u32 *freq, u32 parent_rate, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 250 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 251 | { |
| 252 | u8 div; |
| 253 | |
| 254 | /* Normalize value to a 6M multiple */ |
| 255 | div = *freq / 6000000; |
| 256 | *freq = 6000000 * div; |
| 257 | |
| 258 | /* we were called to round the frequency, we can now return */ |
| 259 | if (n == NULL) |
| 260 | return; |
| 261 | |
| 262 | /* m is always zero for pll1 */ |
| 263 | *m = 0; |
| 264 | |
| 265 | /* k is 1 only on these cases */ |
| 266 | if (*freq >= 768000000 || *freq == 42000000 || *freq == 54000000) |
| 267 | *k = 1; |
| 268 | else |
| 269 | *k = 0; |
| 270 | |
| 271 | /* p will be 3 for divs under 10 */ |
| 272 | if (div < 10) |
| 273 | *p = 3; |
| 274 | |
| 275 | /* p will be 2 for divs between 10 - 20 and odd divs under 32 */ |
| 276 | else if (div < 20 || (div < 32 && (div & 1))) |
| 277 | *p = 2; |
| 278 | |
| 279 | /* p will be 1 for even divs under 32, divs under 40 and odd pairs |
| 280 | * of divs between 40-62 */ |
| 281 | else if (div < 40 || (div < 64 && (div & 2))) |
| 282 | *p = 1; |
| 283 | |
| 284 | /* any other entries have p = 0 */ |
| 285 | else |
| 286 | *p = 0; |
| 287 | |
| 288 | /* calculate a suitable n based on k and p */ |
| 289 | div <<= *p; |
| 290 | div /= (*k + 1); |
| 291 | *n = div / 4; |
| 292 | } |
| 293 | |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 294 | /** |
| 295 | * sun6i_a31_get_pll1_factors() - calculates n, k and m factors for PLL1 |
| 296 | * PLL1 rate is calculated as follows |
| 297 | * rate = parent_rate * (n + 1) * (k + 1) / (m + 1); |
| 298 | * parent_rate should always be 24MHz |
| 299 | */ |
| 300 | static void sun6i_a31_get_pll1_factors(u32 *freq, u32 parent_rate, |
| 301 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 302 | { |
| 303 | /* |
| 304 | * We can operate only on MHz, this will make our life easier |
| 305 | * later. |
| 306 | */ |
| 307 | u32 freq_mhz = *freq / 1000000; |
| 308 | u32 parent_freq_mhz = parent_rate / 1000000; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 309 | |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 310 | /* |
| 311 | * Round down the frequency to the closest multiple of either |
| 312 | * 6 or 16 |
| 313 | */ |
| 314 | u32 round_freq_6 = round_down(freq_mhz, 6); |
| 315 | u32 round_freq_16 = round_down(freq_mhz, 16); |
| 316 | |
| 317 | if (round_freq_6 > round_freq_16) |
| 318 | freq_mhz = round_freq_6; |
| 319 | else |
| 320 | freq_mhz = round_freq_16; |
| 321 | |
| 322 | *freq = freq_mhz * 1000000; |
| 323 | |
| 324 | /* |
| 325 | * If the factors pointer are null, we were just called to |
| 326 | * round down the frequency. |
| 327 | * Exit. |
| 328 | */ |
| 329 | if (n == NULL) |
| 330 | return; |
| 331 | |
| 332 | /* If the frequency is a multiple of 32 MHz, k is always 3 */ |
| 333 | if (!(freq_mhz % 32)) |
| 334 | *k = 3; |
| 335 | /* If the frequency is a multiple of 9 MHz, k is always 2 */ |
| 336 | else if (!(freq_mhz % 9)) |
| 337 | *k = 2; |
| 338 | /* If the frequency is a multiple of 8 MHz, k is always 1 */ |
| 339 | else if (!(freq_mhz % 8)) |
| 340 | *k = 1; |
| 341 | /* Otherwise, we don't use the k factor */ |
| 342 | else |
| 343 | *k = 0; |
| 344 | |
| 345 | /* |
| 346 | * If the frequency is a multiple of 2 but not a multiple of |
| 347 | * 3, m is 3. This is the first time we use 6 here, yet we |
| 348 | * will use it on several other places. |
| 349 | * We use this number because it's the lowest frequency we can |
| 350 | * generate (with n = 0, k = 0, m = 3), so every other frequency |
| 351 | * somehow relates to this frequency. |
| 352 | */ |
| 353 | if ((freq_mhz % 6) == 2 || (freq_mhz % 6) == 4) |
| 354 | *m = 2; |
| 355 | /* |
| 356 | * If the frequency is a multiple of 6MHz, but the factor is |
| 357 | * odd, m will be 3 |
| 358 | */ |
| 359 | else if ((freq_mhz / 6) & 1) |
| 360 | *m = 3; |
| 361 | /* Otherwise, we end up with m = 1 */ |
| 362 | else |
| 363 | *m = 1; |
| 364 | |
| 365 | /* Calculate n thanks to the above factors we already got */ |
| 366 | *n = freq_mhz * (*m + 1) / ((*k + 1) * parent_freq_mhz) - 1; |
| 367 | |
| 368 | /* |
| 369 | * If n end up being outbound, and that we can still decrease |
| 370 | * m, do it. |
| 371 | */ |
| 372 | if ((*n + 1) > 31 && (*m + 1) > 1) { |
| 373 | *n = (*n + 1) / 2 - 1; |
| 374 | *m = (*m + 1) / 2 - 1; |
| 375 | } |
| 376 | } |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 377 | |
| 378 | /** |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 379 | * sun8i_a23_get_pll1_factors() - calculates n, k, m, p factors for PLL1 |
| 380 | * PLL1 rate is calculated as follows |
| 381 | * rate = (parent_rate * (n + 1) * (k + 1) >> p) / (m + 1); |
| 382 | * parent_rate is always 24Mhz |
| 383 | */ |
| 384 | |
| 385 | static void sun8i_a23_get_pll1_factors(u32 *freq, u32 parent_rate, |
| 386 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 387 | { |
| 388 | u8 div; |
| 389 | |
| 390 | /* Normalize value to a 6M multiple */ |
| 391 | div = *freq / 6000000; |
| 392 | *freq = 6000000 * div; |
| 393 | |
| 394 | /* we were called to round the frequency, we can now return */ |
| 395 | if (n == NULL) |
| 396 | return; |
| 397 | |
| 398 | /* m is always zero for pll1 */ |
| 399 | *m = 0; |
| 400 | |
| 401 | /* k is 1 only on these cases */ |
| 402 | if (*freq >= 768000000 || *freq == 42000000 || *freq == 54000000) |
| 403 | *k = 1; |
| 404 | else |
| 405 | *k = 0; |
| 406 | |
| 407 | /* p will be 2 for divs under 20 and odd divs under 32 */ |
| 408 | if (div < 20 || (div < 32 && (div & 1))) |
| 409 | *p = 2; |
| 410 | |
| 411 | /* p will be 1 for even divs under 32, divs under 40 and odd pairs |
| 412 | * of divs between 40-62 */ |
| 413 | else if (div < 40 || (div < 64 && (div & 2))) |
| 414 | *p = 1; |
| 415 | |
| 416 | /* any other entries have p = 0 */ |
| 417 | else |
| 418 | *p = 0; |
| 419 | |
| 420 | /* calculate a suitable n based on k and p */ |
| 421 | div <<= *p; |
| 422 | div /= (*k + 1); |
| 423 | *n = div / 4 - 1; |
| 424 | } |
| 425 | |
| 426 | /** |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 427 | * sun4i_get_pll5_factors() - calculates n, k factors for PLL5 |
| 428 | * PLL5 rate is calculated as follows |
| 429 | * rate = parent_rate * n * (k + 1) |
| 430 | * parent_rate is always 24Mhz |
| 431 | */ |
| 432 | |
| 433 | static void sun4i_get_pll5_factors(u32 *freq, u32 parent_rate, |
| 434 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 435 | { |
| 436 | u8 div; |
| 437 | |
| 438 | /* Normalize value to a parent_rate multiple (24M) */ |
| 439 | div = *freq / parent_rate; |
| 440 | *freq = parent_rate * div; |
| 441 | |
| 442 | /* we were called to round the frequency, we can now return */ |
| 443 | if (n == NULL) |
| 444 | return; |
| 445 | |
| 446 | if (div < 31) |
| 447 | *k = 0; |
| 448 | else if (div / 2 < 31) |
| 449 | *k = 1; |
| 450 | else if (div / 3 < 31) |
| 451 | *k = 2; |
| 452 | else |
| 453 | *k = 3; |
| 454 | |
| 455 | *n = DIV_ROUND_UP(div, (*k+1)); |
| 456 | } |
| 457 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 458 | /** |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 459 | * sun6i_a31_get_pll6_factors() - calculates n, k factors for A31 PLL6x2 |
| 460 | * PLL6x2 rate is calculated as follows |
| 461 | * rate = parent_rate * (n + 1) * (k + 1) |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 462 | * parent_rate is always 24Mhz |
| 463 | */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 464 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 465 | static void sun6i_a31_get_pll6_factors(u32 *freq, u32 parent_rate, |
| 466 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 467 | { |
| 468 | u8 div; |
| 469 | |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 470 | /* Normalize value to a parent_rate multiple (24M) */ |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 471 | div = *freq / parent_rate; |
| 472 | *freq = parent_rate * div; |
| 473 | |
| 474 | /* we were called to round the frequency, we can now return */ |
| 475 | if (n == NULL) |
| 476 | return; |
| 477 | |
| 478 | *k = div / 32; |
| 479 | if (*k > 3) |
| 480 | *k = 3; |
| 481 | |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 482 | *n = DIV_ROUND_UP(div, (*k+1)) - 1; |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 483 | } |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 484 | |
| 485 | /** |
Chen-Yu Tsai | 9f24309 | 2015-03-20 01:19:03 +0800 | [diff] [blame] | 486 | * sun5i_a13_get_ahb_factors() - calculates m, p factors for AHB |
| 487 | * AHB rate is calculated as follows |
| 488 | * rate = parent_rate >> p |
| 489 | */ |
| 490 | |
| 491 | static void sun5i_a13_get_ahb_factors(u32 *freq, u32 parent_rate, |
| 492 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 493 | { |
| 494 | u32 div; |
| 495 | |
| 496 | /* divide only */ |
| 497 | if (parent_rate < *freq) |
| 498 | *freq = parent_rate; |
| 499 | |
| 500 | /* |
| 501 | * user manual says valid speed is 8k ~ 276M, but tests show it |
| 502 | * can work at speeds up to 300M, just after reparenting to pll6 |
| 503 | */ |
| 504 | if (*freq < 8000) |
| 505 | *freq = 8000; |
| 506 | if (*freq > 300000000) |
| 507 | *freq = 300000000; |
| 508 | |
| 509 | div = order_base_2(DIV_ROUND_UP(parent_rate, *freq)); |
| 510 | |
| 511 | /* p = 0 ~ 3 */ |
| 512 | if (div > 3) |
| 513 | div = 3; |
| 514 | |
| 515 | *freq = parent_rate >> div; |
| 516 | |
| 517 | /* we were called to round the frequency, we can now return */ |
| 518 | if (p == NULL) |
| 519 | return; |
| 520 | |
| 521 | *p = div; |
| 522 | } |
| 523 | |
| 524 | /** |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 525 | * sun4i_get_apb1_factors() - calculates m, p factors for APB1 |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 526 | * APB1 rate is calculated as follows |
| 527 | * rate = (parent_rate >> p) / (m + 1); |
| 528 | */ |
| 529 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 530 | static void sun4i_get_apb1_factors(u32 *freq, u32 parent_rate, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 531 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 532 | { |
| 533 | u8 calcm, calcp; |
| 534 | |
| 535 | if (parent_rate < *freq) |
| 536 | *freq = parent_rate; |
| 537 | |
Emilio López | 2226013 | 2014-03-19 15:19:32 -0300 | [diff] [blame] | 538 | parent_rate = DIV_ROUND_UP(parent_rate, *freq); |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 539 | |
| 540 | /* Invalid rate! */ |
| 541 | if (parent_rate > 32) |
| 542 | return; |
| 543 | |
| 544 | if (parent_rate <= 4) |
| 545 | calcp = 0; |
| 546 | else if (parent_rate <= 8) |
| 547 | calcp = 1; |
| 548 | else if (parent_rate <= 16) |
| 549 | calcp = 2; |
| 550 | else |
| 551 | calcp = 3; |
| 552 | |
| 553 | calcm = (parent_rate >> calcp) - 1; |
| 554 | |
| 555 | *freq = (parent_rate >> calcp) / (calcm + 1); |
| 556 | |
| 557 | /* we were called to round the frequency, we can now return */ |
| 558 | if (n == NULL) |
| 559 | return; |
| 560 | |
| 561 | *m = calcm; |
| 562 | *p = calcp; |
| 563 | } |
| 564 | |
| 565 | |
| 566 | |
Emilio López | 7551769 | 2013-12-23 00:32:39 -0300 | [diff] [blame] | 567 | |
| 568 | /** |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 569 | * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B |
| 570 | * CLK_OUT rate is calculated as follows |
| 571 | * rate = (parent_rate >> p) / (m + 1); |
| 572 | */ |
| 573 | |
| 574 | static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate, |
| 575 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 576 | { |
| 577 | u8 div, calcm, calcp; |
| 578 | |
| 579 | /* These clocks can only divide, so we will never be able to achieve |
| 580 | * frequencies higher than the parent frequency */ |
| 581 | if (*freq > parent_rate) |
| 582 | *freq = parent_rate; |
| 583 | |
Emilio López | 2226013 | 2014-03-19 15:19:32 -0300 | [diff] [blame] | 584 | div = DIV_ROUND_UP(parent_rate, *freq); |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 585 | |
| 586 | if (div < 32) |
| 587 | calcp = 0; |
| 588 | else if (div / 2 < 32) |
| 589 | calcp = 1; |
| 590 | else if (div / 4 < 32) |
| 591 | calcp = 2; |
| 592 | else |
| 593 | calcp = 3; |
| 594 | |
| 595 | calcm = DIV_ROUND_UP(div, 1 << calcp); |
| 596 | |
| 597 | *freq = (parent_rate >> calcp) / calcm; |
| 598 | |
| 599 | /* we were called to round the frequency, we can now return */ |
| 600 | if (n == NULL) |
| 601 | return; |
| 602 | |
| 603 | *m = calcm - 1; |
| 604 | *p = calcp; |
| 605 | } |
| 606 | |
Chen-Yu Tsai | e4c6d6c | 2014-02-10 18:35:47 +0800 | [diff] [blame] | 607 | /** |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 608 | * sunxi_factors_clk_setup() - Setup function for factor clocks |
| 609 | */ |
| 610 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 611 | static struct clk_factors_config sun4i_pll1_config = { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 612 | .nshift = 8, |
| 613 | .nwidth = 5, |
| 614 | .kshift = 4, |
| 615 | .kwidth = 2, |
| 616 | .mshift = 0, |
| 617 | .mwidth = 2, |
| 618 | .pshift = 16, |
| 619 | .pwidth = 2, |
| 620 | }; |
| 621 | |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 622 | static struct clk_factors_config sun6i_a31_pll1_config = { |
| 623 | .nshift = 8, |
| 624 | .nwidth = 5, |
| 625 | .kshift = 4, |
| 626 | .kwidth = 2, |
| 627 | .mshift = 0, |
| 628 | .mwidth = 2, |
Hans de Goede | 76820fc | 2015-01-24 12:56:32 +0100 | [diff] [blame] | 629 | .n_start = 1, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 630 | }; |
| 631 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 632 | static struct clk_factors_config sun8i_a23_pll1_config = { |
| 633 | .nshift = 8, |
| 634 | .nwidth = 5, |
| 635 | .kshift = 4, |
| 636 | .kwidth = 2, |
| 637 | .mshift = 0, |
| 638 | .mwidth = 2, |
| 639 | .pshift = 16, |
| 640 | .pwidth = 2, |
| 641 | .n_start = 1, |
| 642 | }; |
| 643 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 644 | static struct clk_factors_config sun4i_pll5_config = { |
| 645 | .nshift = 8, |
| 646 | .nwidth = 5, |
| 647 | .kshift = 4, |
| 648 | .kwidth = 2, |
| 649 | }; |
| 650 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 651 | static struct clk_factors_config sun6i_a31_pll6_config = { |
| 652 | .nshift = 8, |
| 653 | .nwidth = 5, |
| 654 | .kshift = 4, |
| 655 | .kwidth = 2, |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 656 | .n_start = 1, |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 657 | }; |
| 658 | |
Chen-Yu Tsai | 9f24309 | 2015-03-20 01:19:03 +0800 | [diff] [blame] | 659 | static struct clk_factors_config sun5i_a13_ahb_config = { |
| 660 | .pshift = 4, |
| 661 | .pwidth = 2, |
| 662 | }; |
| 663 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 664 | static struct clk_factors_config sun4i_apb1_config = { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 665 | .mshift = 0, |
| 666 | .mwidth = 5, |
| 667 | .pshift = 16, |
| 668 | .pwidth = 2, |
| 669 | }; |
| 670 | |
Emilio López | 7551769 | 2013-12-23 00:32:39 -0300 | [diff] [blame] | 671 | /* user manual says "n" but it's really "p" */ |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 672 | static struct clk_factors_config sun7i_a20_out_config = { |
| 673 | .mshift = 8, |
| 674 | .mwidth = 5, |
| 675 | .pshift = 20, |
| 676 | .pwidth = 2, |
| 677 | }; |
| 678 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 679 | static const struct factors_data sun4i_pll1_data __initconst = { |
Emilio López | d838ff3 | 2013-12-23 00:32:34 -0300 | [diff] [blame] | 680 | .enable = 31, |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 681 | .table = &sun4i_pll1_config, |
| 682 | .getter = sun4i_get_pll1_factors, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 683 | }; |
| 684 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 685 | static const struct factors_data sun6i_a31_pll1_data __initconst = { |
Emilio López | d838ff3 | 2013-12-23 00:32:34 -0300 | [diff] [blame] | 686 | .enable = 31, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 687 | .table = &sun6i_a31_pll1_config, |
| 688 | .getter = sun6i_a31_get_pll1_factors, |
| 689 | }; |
| 690 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 691 | static const struct factors_data sun8i_a23_pll1_data __initconst = { |
| 692 | .enable = 31, |
| 693 | .table = &sun8i_a23_pll1_config, |
| 694 | .getter = sun8i_a23_get_pll1_factors, |
| 695 | }; |
| 696 | |
Emilio López | 5a8ddf2 | 2014-03-19 15:19:30 -0300 | [diff] [blame] | 697 | static const struct factors_data sun7i_a20_pll4_data __initconst = { |
| 698 | .enable = 31, |
| 699 | .table = &sun4i_pll5_config, |
| 700 | .getter = sun4i_get_pll5_factors, |
| 701 | }; |
| 702 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 703 | static const struct factors_data sun4i_pll5_data __initconst = { |
| 704 | .enable = 31, |
| 705 | .table = &sun4i_pll5_config, |
| 706 | .getter = sun4i_get_pll5_factors, |
Chen-Yu Tsai | 667f542 | 2014-02-03 09:51:39 +0800 | [diff] [blame] | 707 | .name = "pll5", |
| 708 | }; |
| 709 | |
| 710 | static const struct factors_data sun4i_pll6_data __initconst = { |
| 711 | .enable = 31, |
| 712 | .table = &sun4i_pll5_config, |
| 713 | .getter = sun4i_get_pll5_factors, |
| 714 | .name = "pll6", |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 715 | }; |
| 716 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 717 | static const struct factors_data sun6i_a31_pll6_data __initconst = { |
| 718 | .enable = 31, |
| 719 | .table = &sun6i_a31_pll6_config, |
| 720 | .getter = sun6i_a31_get_pll6_factors, |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 721 | .name = "pll6x2", |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 722 | }; |
| 723 | |
Chen-Yu Tsai | 9f24309 | 2015-03-20 01:19:03 +0800 | [diff] [blame] | 724 | static const struct factors_data sun5i_a13_ahb_data __initconst = { |
| 725 | .mux = 6, |
| 726 | .muxmask = BIT(1) | BIT(0), |
| 727 | .table = &sun5i_a13_ahb_config, |
| 728 | .getter = sun5i_a13_get_ahb_factors, |
| 729 | }; |
| 730 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 731 | static const struct factors_data sun4i_apb1_data __initconst = { |
Emilio López | 93746e7 | 2014-11-06 11:40:29 +0800 | [diff] [blame] | 732 | .mux = 24, |
| 733 | .muxmask = BIT(1) | BIT(0), |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 734 | .table = &sun4i_apb1_config, |
| 735 | .getter = sun4i_get_apb1_factors, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 736 | }; |
| 737 | |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 738 | static const struct factors_data sun7i_a20_out_data __initconst = { |
| 739 | .enable = 31, |
| 740 | .mux = 24, |
Chen-Yu Tsai | e94f8cb3 | 2014-10-20 22:10:26 +0800 | [diff] [blame] | 741 | .muxmask = BIT(1) | BIT(0), |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 742 | .table = &sun7i_a20_out_config, |
| 743 | .getter = sun7i_a20_get_out_factors, |
| 744 | }; |
| 745 | |
Emilio López | 5f4e0be | 2013-12-23 00:32:36 -0300 | [diff] [blame] | 746 | static struct clk * __init sunxi_factors_clk_setup(struct device_node *node, |
Maxime Ripard | 601da9d | 2014-07-04 22:24:52 +0200 | [diff] [blame] | 747 | const struct factors_data *data) |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 748 | { |
Hans de Goede | 7c74c22 | 2014-11-23 14:38:07 +0100 | [diff] [blame] | 749 | void __iomem *reg; |
| 750 | |
| 751 | reg = of_iomap(node, 0); |
| 752 | if (!reg) { |
| 753 | pr_err("Could not get registers for factors-clk: %s\n", |
| 754 | node->name); |
| 755 | return NULL; |
| 756 | } |
| 757 | |
| 758 | return sunxi_factors_register(node, data, &clk_lock, reg); |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 759 | } |
| 760 | |
| 761 | |
| 762 | |
| 763 | /** |
| 764 | * sunxi_mux_clk_setup() - Setup function for muxes |
| 765 | */ |
| 766 | |
| 767 | #define SUNXI_MUX_GATE_WIDTH 2 |
| 768 | |
| 769 | struct mux_data { |
| 770 | u8 shift; |
| 771 | }; |
| 772 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 773 | static const struct mux_data sun4i_cpu_mux_data __initconst = { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 774 | .shift = 16, |
| 775 | }; |
| 776 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 777 | static const struct mux_data sun6i_a31_ahb1_mux_data __initconst = { |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 778 | .shift = 12, |
| 779 | }; |
| 780 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 781 | static void __init sunxi_mux_clk_setup(struct device_node *node, |
| 782 | struct mux_data *data) |
| 783 | { |
| 784 | struct clk *clk; |
| 785 | const char *clk_name = node->name; |
Emilio López | edaf3fb | 2013-12-23 00:32:33 -0300 | [diff] [blame] | 786 | const char *parents[SUNXI_MAX_PARENTS]; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 787 | void __iomem *reg; |
Dinh Nguyen | 8a53fb2 | 2015-07-06 22:59:05 -0500 | [diff] [blame] | 788 | int i; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 789 | |
| 790 | reg = of_iomap(node, 0); |
| 791 | |
Dinh Nguyen | 8a53fb2 | 2015-07-06 22:59:05 -0500 | [diff] [blame] | 792 | i = of_clk_parent_fill(node, parents, SUNXI_MAX_PARENTS); |
Chen-Yu Tsai | f64111e | 2014-02-03 09:51:37 +0800 | [diff] [blame] | 793 | of_property_read_string(node, "clock-output-names", &clk_name); |
| 794 | |
James Hogan | 819c1de | 2013-07-29 12:25:01 +0100 | [diff] [blame] | 795 | clk = clk_register_mux(NULL, clk_name, parents, i, |
Chen-Yu Tsai | 3ec72fa | 2015-01-06 10:35:12 +0800 | [diff] [blame] | 796 | CLK_SET_RATE_PARENT, reg, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 797 | data->shift, SUNXI_MUX_GATE_WIDTH, |
| 798 | 0, &clk_lock); |
| 799 | |
| 800 | if (clk) { |
| 801 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 802 | clk_register_clkdev(clk, clk_name, NULL); |
| 803 | } |
| 804 | } |
| 805 | |
| 806 | |
| 807 | |
| 808 | /** |
| 809 | * sunxi_divider_clk_setup() - Setup function for simple divider clocks |
| 810 | */ |
| 811 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 812 | struct div_data { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 813 | u8 shift; |
| 814 | u8 pow; |
| 815 | u8 width; |
Chen-Yu Tsai | ea5671b | 2014-06-26 23:55:42 +0800 | [diff] [blame] | 816 | const struct clk_div_table *table; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 817 | }; |
| 818 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 819 | static const struct div_data sun4i_axi_data __initconst = { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 820 | .shift = 0, |
| 821 | .pow = 0, |
| 822 | .width = 2, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 823 | }; |
| 824 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 825 | static const struct clk_div_table sun8i_a23_axi_table[] __initconst = { |
| 826 | { .val = 0, .div = 1 }, |
| 827 | { .val = 1, .div = 2 }, |
| 828 | { .val = 2, .div = 3 }, |
| 829 | { .val = 3, .div = 4 }, |
| 830 | { .val = 4, .div = 4 }, |
| 831 | { .val = 5, .div = 4 }, |
| 832 | { .val = 6, .div = 4 }, |
| 833 | { .val = 7, .div = 4 }, |
| 834 | { } /* sentinel */ |
| 835 | }; |
| 836 | |
| 837 | static const struct div_data sun8i_a23_axi_data __initconst = { |
| 838 | .width = 3, |
| 839 | .table = sun8i_a23_axi_table, |
| 840 | }; |
| 841 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 842 | static const struct div_data sun4i_ahb_data __initconst = { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 843 | .shift = 4, |
| 844 | .pow = 1, |
| 845 | .width = 2, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 846 | }; |
| 847 | |
Chen-Yu Tsai | cfe4c93 | 2014-09-06 14:45:10 +0800 | [diff] [blame] | 848 | static const struct clk_div_table sun4i_apb0_table[] __initconst = { |
| 849 | { .val = 0, .div = 2 }, |
| 850 | { .val = 1, .div = 2 }, |
| 851 | { .val = 2, .div = 4 }, |
| 852 | { .val = 3, .div = 8 }, |
| 853 | { } /* sentinel */ |
| 854 | }; |
| 855 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 856 | static const struct div_data sun4i_apb0_data __initconst = { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 857 | .shift = 8, |
| 858 | .pow = 1, |
| 859 | .width = 2, |
Chen-Yu Tsai | cfe4c93 | 2014-09-06 14:45:10 +0800 | [diff] [blame] | 860 | .table = sun4i_apb0_table, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 861 | }; |
| 862 | |
| 863 | static void __init sunxi_divider_clk_setup(struct device_node *node, |
| 864 | struct div_data *data) |
| 865 | { |
| 866 | struct clk *clk; |
| 867 | const char *clk_name = node->name; |
| 868 | const char *clk_parent; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 869 | void __iomem *reg; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 870 | |
| 871 | reg = of_iomap(node, 0); |
| 872 | |
| 873 | clk_parent = of_clk_get_parent_name(node, 0); |
| 874 | |
Chen-Yu Tsai | f64111e | 2014-02-03 09:51:37 +0800 | [diff] [blame] | 875 | of_property_read_string(node, "clock-output-names", &clk_name); |
| 876 | |
Chen-Yu Tsai | ea5671b | 2014-06-26 23:55:42 +0800 | [diff] [blame] | 877 | clk = clk_register_divider_table(NULL, clk_name, clk_parent, 0, |
| 878 | reg, data->shift, data->width, |
| 879 | data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0, |
| 880 | data->table, &clk_lock); |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 881 | if (clk) { |
| 882 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 883 | clk_register_clkdev(clk, clk_name, NULL); |
| 884 | } |
| 885 | } |
| 886 | |
| 887 | |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 888 | |
| 889 | /** |
| 890 | * sunxi_gates_clk_setup() - Setup function for leaf gates on clocks |
| 891 | */ |
| 892 | |
| 893 | #define SUNXI_GATES_MAX_SIZE 64 |
| 894 | |
| 895 | struct gates_data { |
| 896 | DECLARE_BITMAP(mask, SUNXI_GATES_MAX_SIZE); |
| 897 | }; |
| 898 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 899 | /** |
| 900 | * sunxi_divs_clk_setup() helper data |
| 901 | */ |
| 902 | |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 903 | #define SUNXI_DIVS_MAX_QTY 4 |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 904 | #define SUNXI_DIVISOR_WIDTH 2 |
| 905 | |
| 906 | struct divs_data { |
| 907 | const struct factors_data *factors; /* data for the factor clock */ |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 908 | int ndivs; /* number of outputs */ |
| 909 | /* |
| 910 | * List of outputs. Refer to the diagram for sunxi_divs_clk_setup(): |
| 911 | * self or base factor clock refers to the output from the pll |
| 912 | * itself. The remaining refer to fixed or configurable divider |
| 913 | * outputs. |
| 914 | */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 915 | struct { |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 916 | u8 self; /* is it the base factor clock? (only one) */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 917 | u8 fixed; /* is it a fixed divisor? if not... */ |
| 918 | struct clk_div_table *table; /* is it a table based divisor? */ |
| 919 | u8 shift; /* otherwise it's a normal divisor with this shift */ |
| 920 | u8 pow; /* is it power-of-two based? */ |
| 921 | u8 gate; /* is it independently gateable? */ |
| 922 | } div[SUNXI_DIVS_MAX_QTY]; |
| 923 | }; |
| 924 | |
| 925 | static struct clk_div_table pll6_sata_tbl[] = { |
| 926 | { .val = 0, .div = 6, }, |
| 927 | { .val = 1, .div = 12, }, |
| 928 | { .val = 2, .div = 18, }, |
| 929 | { .val = 3, .div = 24, }, |
| 930 | { } /* sentinel */ |
| 931 | }; |
| 932 | |
| 933 | static const struct divs_data pll5_divs_data __initconst = { |
| 934 | .factors = &sun4i_pll5_data, |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame] | 935 | .ndivs = 2, |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 936 | .div = { |
| 937 | { .shift = 0, .pow = 0, }, /* M, DDR */ |
| 938 | { .shift = 16, .pow = 1, }, /* P, other */ |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 939 | /* No output for the base factor clock */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 940 | } |
| 941 | }; |
| 942 | |
| 943 | static const struct divs_data pll6_divs_data __initconst = { |
Chen-Yu Tsai | 667f542 | 2014-02-03 09:51:39 +0800 | [diff] [blame] | 944 | .factors = &sun4i_pll6_data, |
Chen-Yu Tsai | f101796 | 2015-03-25 01:22:08 +0800 | [diff] [blame] | 945 | .ndivs = 4, |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 946 | .div = { |
| 947 | { .shift = 0, .table = pll6_sata_tbl, .gate = 14 }, /* M, SATA */ |
| 948 | { .fixed = 2 }, /* P, other */ |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 949 | { .self = 1 }, /* base factor clock, 2x */ |
Chen-Yu Tsai | f101796 | 2015-03-25 01:22:08 +0800 | [diff] [blame] | 950 | { .fixed = 4 }, /* pll6 / 4, used as ahb input */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 951 | } |
| 952 | }; |
| 953 | |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 954 | static const struct divs_data sun6i_a31_pll6_divs_data __initconst = { |
| 955 | .factors = &sun6i_a31_pll6_data, |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 956 | .ndivs = 2, |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 957 | .div = { |
| 958 | { .fixed = 2 }, /* normal output */ |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 959 | { .self = 1 }, /* base factor clock, 2x */ |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 960 | } |
| 961 | }; |
| 962 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 963 | /** |
| 964 | * sunxi_divs_clk_setup() - Setup function for leaf divisors on clocks |
| 965 | * |
| 966 | * These clocks look something like this |
| 967 | * ________________________ |
| 968 | * | ___divisor 1---|----> to consumer |
| 969 | * parent >--| pll___/___divisor 2---|----> to consumer |
| 970 | * | \_______________|____> to consumer |
| 971 | * |________________________| |
| 972 | */ |
| 973 | |
| 974 | static void __init sunxi_divs_clk_setup(struct device_node *node, |
| 975 | struct divs_data *data) |
| 976 | { |
| 977 | struct clk_onecell_data *clk_data; |
Chen-Yu Tsai | 97e36b3 | 2014-02-03 09:51:40 +0800 | [diff] [blame] | 978 | const char *parent; |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 979 | const char *clk_name; |
| 980 | struct clk **clks, *pclk; |
| 981 | struct clk_hw *gate_hw, *rate_hw; |
| 982 | const struct clk_ops *rate_ops; |
| 983 | struct clk_gate *gate = NULL; |
| 984 | struct clk_fixed_factor *fix_factor; |
| 985 | struct clk_divider *divider; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 986 | void __iomem *reg; |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame] | 987 | int ndivs = SUNXI_DIVS_MAX_QTY, i = 0; |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 988 | int flags, clkflags; |
| 989 | |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 990 | /* if number of children known, use it */ |
| 991 | if (data->ndivs) |
| 992 | ndivs = data->ndivs; |
| 993 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 994 | /* Set up factor clock that we will be dividing */ |
| 995 | pclk = sunxi_factors_clk_setup(node, data->factors); |
Chen-Yu Tsai | 97e36b3 | 2014-02-03 09:51:40 +0800 | [diff] [blame] | 996 | parent = __clk_get_name(pclk); |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 997 | |
| 998 | reg = of_iomap(node, 0); |
| 999 | |
| 1000 | clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); |
| 1001 | if (!clk_data) |
| 1002 | return; |
| 1003 | |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 1004 | clks = kcalloc(ndivs, sizeof(*clks), GFP_KERNEL); |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1005 | if (!clks) |
| 1006 | goto free_clkdata; |
| 1007 | |
| 1008 | clk_data->clks = clks; |
| 1009 | |
| 1010 | /* It's not a good idea to have automatic reparenting changing |
| 1011 | * our RAM clock! */ |
| 1012 | clkflags = !strcmp("pll5", parent) ? 0 : CLK_SET_RATE_PARENT; |
| 1013 | |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame] | 1014 | for (i = 0; i < ndivs; i++) { |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1015 | if (of_property_read_string_index(node, "clock-output-names", |
| 1016 | i, &clk_name) != 0) |
| 1017 | break; |
| 1018 | |
Chen-Yu Tsai | 934fe5f | 2015-03-25 01:22:07 +0800 | [diff] [blame] | 1019 | /* If this is the base factor clock, only update clks */ |
| 1020 | if (data->div[i].self) { |
| 1021 | clk_data->clks[i] = pclk; |
| 1022 | continue; |
| 1023 | } |
| 1024 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1025 | gate_hw = NULL; |
| 1026 | rate_hw = NULL; |
| 1027 | rate_ops = NULL; |
| 1028 | |
| 1029 | /* If this leaf clock can be gated, create a gate */ |
| 1030 | if (data->div[i].gate) { |
| 1031 | gate = kzalloc(sizeof(*gate), GFP_KERNEL); |
| 1032 | if (!gate) |
| 1033 | goto free_clks; |
| 1034 | |
| 1035 | gate->reg = reg; |
| 1036 | gate->bit_idx = data->div[i].gate; |
| 1037 | gate->lock = &clk_lock; |
| 1038 | |
| 1039 | gate_hw = &gate->hw; |
| 1040 | } |
| 1041 | |
| 1042 | /* Leaves can be fixed or configurable divisors */ |
| 1043 | if (data->div[i].fixed) { |
| 1044 | fix_factor = kzalloc(sizeof(*fix_factor), GFP_KERNEL); |
| 1045 | if (!fix_factor) |
| 1046 | goto free_gate; |
| 1047 | |
| 1048 | fix_factor->mult = 1; |
| 1049 | fix_factor->div = data->div[i].fixed; |
| 1050 | |
| 1051 | rate_hw = &fix_factor->hw; |
| 1052 | rate_ops = &clk_fixed_factor_ops; |
| 1053 | } else { |
| 1054 | divider = kzalloc(sizeof(*divider), GFP_KERNEL); |
| 1055 | if (!divider) |
| 1056 | goto free_gate; |
| 1057 | |
| 1058 | flags = data->div[i].pow ? CLK_DIVIDER_POWER_OF_TWO : 0; |
| 1059 | |
| 1060 | divider->reg = reg; |
| 1061 | divider->shift = data->div[i].shift; |
| 1062 | divider->width = SUNXI_DIVISOR_WIDTH; |
| 1063 | divider->flags = flags; |
| 1064 | divider->lock = &clk_lock; |
| 1065 | divider->table = data->div[i].table; |
| 1066 | |
| 1067 | rate_hw = ÷r->hw; |
| 1068 | rate_ops = &clk_divider_ops; |
| 1069 | } |
| 1070 | |
| 1071 | /* Wrap the (potential) gate and the divisor on a composite |
| 1072 | * clock to unify them */ |
| 1073 | clks[i] = clk_register_composite(NULL, clk_name, &parent, 1, |
| 1074 | NULL, NULL, |
| 1075 | rate_hw, rate_ops, |
| 1076 | gate_hw, &clk_gate_ops, |
| 1077 | clkflags); |
| 1078 | |
| 1079 | WARN_ON(IS_ERR(clk_data->clks[i])); |
| 1080 | clk_register_clkdev(clks[i], clk_name, NULL); |
| 1081 | } |
| 1082 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1083 | /* Adjust to the real max */ |
| 1084 | clk_data->clk_num = i; |
| 1085 | |
| 1086 | of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 1087 | |
| 1088 | return; |
| 1089 | |
| 1090 | free_gate: |
| 1091 | kfree(gate); |
| 1092 | free_clks: |
| 1093 | kfree(clks); |
| 1094 | free_clkdata: |
| 1095 | kfree(clk_data); |
| 1096 | } |
| 1097 | |
| 1098 | |
| 1099 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1100 | /* Matches for factors clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1101 | static const struct of_device_id clk_factors_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1102 | {.compatible = "allwinner,sun4i-a10-pll1-clk", .data = &sun4i_pll1_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1103 | {.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1104 | {.compatible = "allwinner,sun8i-a23-pll1-clk", .data = &sun8i_a23_pll1_data,}, |
Emilio López | 5a8ddf2 | 2014-03-19 15:19:30 -0300 | [diff] [blame] | 1105 | {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,}, |
Chen-Yu Tsai | 9f24309 | 2015-03-20 01:19:03 +0800 | [diff] [blame] | 1106 | {.compatible = "allwinner,sun5i-a13-ahb-clk", .data = &sun5i_a13_ahb_data,}, |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1107 | {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,}, |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 1108 | {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,}, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1109 | {} |
| 1110 | }; |
| 1111 | |
| 1112 | /* Matches for divider clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1113 | static const struct of_device_id clk_div_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1114 | {.compatible = "allwinner,sun4i-a10-axi-clk", .data = &sun4i_axi_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1115 | {.compatible = "allwinner,sun8i-a23-axi-clk", .data = &sun8i_a23_axi_data,}, |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1116 | {.compatible = "allwinner,sun4i-a10-ahb-clk", .data = &sun4i_ahb_data,}, |
| 1117 | {.compatible = "allwinner,sun4i-a10-apb0-clk", .data = &sun4i_apb0_data,}, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1118 | {} |
| 1119 | }; |
| 1120 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1121 | /* Matches for divided outputs */ |
| 1122 | static const struct of_device_id clk_divs_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1123 | {.compatible = "allwinner,sun4i-a10-pll5-clk", .data = &pll5_divs_data,}, |
| 1124 | {.compatible = "allwinner,sun4i-a10-pll6-clk", .data = &pll6_divs_data,}, |
Chen-Yu Tsai | 95e94c1 | 2014-11-13 02:08:31 +0800 | [diff] [blame] | 1125 | {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_divs_data,}, |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1126 | {} |
| 1127 | }; |
| 1128 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1129 | /* Matches for mux clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1130 | static const struct of_device_id clk_mux_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1131 | {.compatible = "allwinner,sun4i-a10-cpu-clk", .data = &sun4i_cpu_mux_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1132 | {.compatible = "allwinner,sun6i-a31-ahb1-mux-clk", .data = &sun6i_a31_ahb1_mux_data,}, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1133 | {} |
| 1134 | }; |
| 1135 | |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 1136 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1137 | static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_match, |
| 1138 | void *function) |
| 1139 | { |
| 1140 | struct device_node *np; |
| 1141 | const struct div_data *data; |
| 1142 | const struct of_device_id *match; |
| 1143 | void (*setup_function)(struct device_node *, const void *) = function; |
| 1144 | |
Rob Herring | cb7d5f4 | 2014-05-12 11:24:31 -0500 | [diff] [blame] | 1145 | for_each_matching_node_and_match(np, clk_match, &match) { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1146 | data = match->data; |
| 1147 | setup_function(np, data); |
| 1148 | } |
| 1149 | } |
| 1150 | |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1151 | static void __init sunxi_init_clocks(const char *clocks[], int nclocks) |
Emilio López | 8e6a4c4 | 2013-09-20 22:03:12 -0300 | [diff] [blame] | 1152 | { |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1153 | unsigned int i; |
Emilio López | 8e6a4c4 | 2013-09-20 22:03:12 -0300 | [diff] [blame] | 1154 | |
Chen-Yu Tsai | b712a62 | 2015-03-20 01:19:05 +0800 | [diff] [blame] | 1155 | /* Register divided output clocks */ |
| 1156 | of_sunxi_table_clock_setup(clk_divs_match, sunxi_divs_clk_setup); |
| 1157 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1158 | /* Register factor clocks */ |
| 1159 | of_sunxi_table_clock_setup(clk_factors_match, sunxi_factors_clk_setup); |
| 1160 | |
| 1161 | /* Register divider clocks */ |
| 1162 | of_sunxi_table_clock_setup(clk_div_match, sunxi_divider_clk_setup); |
| 1163 | |
| 1164 | /* Register mux clocks */ |
| 1165 | of_sunxi_table_clock_setup(clk_mux_match, sunxi_mux_clk_setup); |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 1166 | |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1167 | /* Protect the clocks that needs to stay on */ |
| 1168 | for (i = 0; i < nclocks; i++) { |
| 1169 | struct clk *clk = clk_get(NULL, clocks[i]); |
| 1170 | |
| 1171 | if (!IS_ERR(clk)) |
| 1172 | clk_prepare_enable(clk); |
| 1173 | } |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1174 | } |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1175 | |
| 1176 | static const char *sun4i_a10_critical_clocks[] __initdata = { |
| 1177 | "pll5_ddr", |
| 1178 | }; |
| 1179 | |
| 1180 | static void __init sun4i_a10_init_clocks(struct device_node *node) |
| 1181 | { |
| 1182 | sunxi_init_clocks(sun4i_a10_critical_clocks, |
| 1183 | ARRAY_SIZE(sun4i_a10_critical_clocks)); |
| 1184 | } |
| 1185 | CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks); |
| 1186 | |
| 1187 | static const char *sun5i_critical_clocks[] __initdata = { |
Chen-Yu Tsai | 946fd40 | 2015-03-20 01:19:04 +0800 | [diff] [blame] | 1188 | "cpu", |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1189 | "pll5_ddr", |
| 1190 | }; |
| 1191 | |
| 1192 | static void __init sun5i_init_clocks(struct device_node *node) |
| 1193 | { |
| 1194 | sunxi_init_clocks(sun5i_critical_clocks, |
| 1195 | ARRAY_SIZE(sun5i_critical_clocks)); |
| 1196 | } |
| 1197 | CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sun5i_init_clocks); |
| 1198 | CLK_OF_DECLARE(sun5i_a13_clk_init, "allwinner,sun5i-a13", sun5i_init_clocks); |
Maxime Ripard | bef6229 | 2015-06-09 19:38:04 +0200 | [diff] [blame] | 1199 | CLK_OF_DECLARE(sun5i_r8_clk_init, "allwinner,sun5i-r8", sun5i_init_clocks); |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1200 | CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sun5i_init_clocks); |
| 1201 | |
| 1202 | static const char *sun6i_critical_clocks[] __initdata = { |
Maxime Ripard | 2df73f4 | 2014-05-09 22:33:40 -0500 | [diff] [blame] | 1203 | "cpu", |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1204 | }; |
| 1205 | |
| 1206 | static void __init sun6i_init_clocks(struct device_node *node) |
| 1207 | { |
| 1208 | sunxi_init_clocks(sun6i_critical_clocks, |
| 1209 | ARRAY_SIZE(sun6i_critical_clocks)); |
| 1210 | } |
| 1211 | CLK_OF_DECLARE(sun6i_a31_clk_init, "allwinner,sun6i-a31", sun6i_init_clocks); |
Hans de Goede | b0f2faa | 2014-12-17 18:18:14 +0100 | [diff] [blame] | 1212 | CLK_OF_DECLARE(sun6i_a31s_clk_init, "allwinner,sun6i-a31s", sun6i_init_clocks); |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1213 | CLK_OF_DECLARE(sun8i_a23_clk_init, "allwinner,sun8i-a23", sun6i_init_clocks); |
Vishnu Patekar | 159870d | 2015-05-30 16:55:01 +0200 | [diff] [blame] | 1214 | CLK_OF_DECLARE(sun8i_a33_clk_init, "allwinner,sun8i-a33", sun6i_init_clocks); |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 1215 | |
| 1216 | static void __init sun9i_init_clocks(struct device_node *node) |
| 1217 | { |
| 1218 | sunxi_init_clocks(NULL, 0); |
| 1219 | } |
| 1220 | CLK_OF_DECLARE(sun9i_a80_clk_init, "allwinner,sun9i-a80", sun9i_init_clocks); |