blob: 6551505d8a2cd8d0c7276d32334bef0b1aed0809 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Intel specific MCE features.
3 * Copyright 2004 Zwane Mwaikambo <zwane@linuxpower.ca>
4 */
5
6#include <linux/init.h>
7#include <linux/interrupt.h>
8#include <linux/percpu.h>
9#include <asm/processor.h>
10#include <asm/msr.h>
11#include <asm/mce.h>
12#include <asm/hw_irq.h>
Andi Kleen95833c82006-01-11 22:44:36 +010013#include <asm/idle.h>
Dmitriy Zavin15d5f832006-09-26 10:52:42 +020014#include <asm/therm_throt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015
16asmlinkage void smp_thermal_interrupt(void)
17{
Dmitriy Zavin15d5f832006-09-26 10:52:42 +020018 __u64 msr_val;
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20 ack_APIC_irq();
21
Andi Kleen95833c82006-01-11 22:44:36 +010022 exit_idle();
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 irq_enter();
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
Dmitriy Zavin15d5f832006-09-26 10:52:42 +020025 rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
26 if (therm_throt_process(msr_val & 1))
27 mce_log_therm_throt_event(smp_processor_id(), msr_val);
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Linus Torvalds1da177e2005-04-16 15:20:36 -070029 irq_exit();
30}
31
Ashok Raje6982c62005-06-25 14:54:58 -070032static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
Linus Torvalds1da177e2005-04-16 15:20:36 -070033{
34 u32 l, h;
35 int tm2 = 0;
36 unsigned int cpu = smp_processor_id();
37
38 if (!cpu_has(c, X86_FEATURE_ACPI))
39 return;
40
41 if (!cpu_has(c, X86_FEATURE_ACC))
42 return;
43
44 /* first check if TM1 is already enabled by the BIOS, in which
45 * case there might be some SMM goo which handles it, so we can't even
46 * put a handler since it might be delivered via SMI already.
47 */
48 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
49 h = apic_read(APIC_LVTTHMR);
50 if ((l & (1 << 3)) && (h & APIC_DM_SMI)) {
51 printk(KERN_DEBUG
52 "CPU%d: Thermal monitoring handled by SMI\n", cpu);
53 return;
54 }
55
56 if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13)))
57 tm2 = 1;
58
59 if (h & APIC_VECTOR_MASK) {
60 printk(KERN_DEBUG
61 "CPU%d: Thermal LVT vector (%#x) already "
62 "installed\n", cpu, (h & APIC_VECTOR_MASK));
63 return;
64 }
65
66 h = THERMAL_APIC_VECTOR;
67 h |= (APIC_DM_FIXED | APIC_LVT_MASKED);
Andi Kleen11a8e772006-01-11 22:46:51 +010068 apic_write(APIC_LVTTHMR, h);
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
70 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
71 wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
72
73 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
74 wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
75
76 l = apic_read(APIC_LVTTHMR);
Andi Kleen11a8e772006-01-11 22:46:51 +010077 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
79 cpu, tm2 ? "TM2" : "TM1");
Dmitriy Zavin3222b362006-09-26 10:52:42 +020080
81 /* enable thermal throttle processing */
82 atomic_set(&therm_throt_en, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 return;
84}
85
Ashok Raje6982c62005-06-25 14:54:58 -070086void __cpuinit mce_intel_feature_init(struct cpuinfo_x86 *c)
Linus Torvalds1da177e2005-04-16 15:20:36 -070087{
88 intel_init_thermal(c);
89}