Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-sa1100/time.c |
| 3 | * |
| 4 | * Copyright (C) 1998 Deborah Wallach. |
| 5 | * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> |
| 6 | * |
| 7 | * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> |
| 8 | * Rewritten: big cleanup, much simpler, better HZ accuracy. |
| 9 | * |
| 10 | */ |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/timex.h> |
| 15 | #include <linux/signal.h> |
| 16 | |
| 17 | #include <asm/mach/time.h> |
| 18 | #include <asm/hardware.h> |
| 19 | |
| 20 | #define RTC_DEF_DIVIDER (32768 - 1) |
| 21 | #define RTC_DEF_TRIM 0 |
| 22 | |
| 23 | static unsigned long __init sa1100_get_rtc_time(void) |
| 24 | { |
| 25 | /* |
| 26 | * According to the manual we should be able to let RTTR be zero |
| 27 | * and then a default diviser for a 32.768KHz clock is used. |
| 28 | * Apparently this doesn't work, at least for my SA1110 rev 5. |
| 29 | * If the clock divider is uninitialized then reset it to the |
| 30 | * default value to get the 1Hz clock. |
| 31 | */ |
| 32 | if (RTTR == 0) { |
| 33 | RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); |
| 34 | printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n"); |
| 35 | /* The current RTC value probably doesn't make sense either */ |
| 36 | RCNR = 0; |
| 37 | return 0; |
| 38 | } |
| 39 | return RCNR; |
| 40 | } |
| 41 | |
| 42 | static int sa1100_set_rtc(void) |
| 43 | { |
| 44 | unsigned long current_time = xtime.tv_sec; |
| 45 | |
| 46 | if (RTSR & RTSR_ALE) { |
| 47 | /* make sure not to forward the clock over an alarm */ |
| 48 | unsigned long alarm = RTAR; |
| 49 | if (current_time >= alarm && alarm >= RCNR) |
| 50 | return -ERESTARTSYS; |
| 51 | } |
| 52 | RCNR = current_time; |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | /* IRQs are disabled before entering here from do_gettimeofday() */ |
| 57 | static unsigned long sa1100_gettimeoffset (void) |
| 58 | { |
| 59 | unsigned long ticks_to_match, elapsed, usec; |
| 60 | |
| 61 | /* Get ticks before next timer match */ |
| 62 | ticks_to_match = OSMR0 - OSCR; |
| 63 | |
| 64 | /* We need elapsed ticks since last match */ |
| 65 | elapsed = LATCH - ticks_to_match; |
| 66 | |
| 67 | /* Now convert them to usec */ |
| 68 | usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; |
| 69 | |
| 70 | return usec; |
| 71 | } |
| 72 | |
| 73 | /* |
| 74 | * We will be entered with IRQs enabled. |
| 75 | * |
| 76 | * Loop until we get ahead of the free running timer. |
| 77 | * This ensures an exact clock tick count and time accuracy. |
| 78 | * IRQs are disabled inside the loop to ensure coherence between |
| 79 | * lost_ticks (updated in do_timer()) and the match reg value, so we |
| 80 | * can use do_gettimeofday() from interrupt handlers. |
| 81 | */ |
| 82 | static irqreturn_t |
| 83 | sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 84 | { |
| 85 | unsigned int next_match; |
| 86 | |
| 87 | write_seqlock(&xtime_lock); |
| 88 | |
| 89 | do { |
| 90 | timer_tick(regs); |
| 91 | OSSR = OSSR_M0; /* Clear match on timer 0 */ |
| 92 | next_match = (OSMR0 += LATCH); |
| 93 | } while ((signed long)(next_match - OSCR) <= 0); |
| 94 | |
| 95 | write_sequnlock(&xtime_lock); |
| 96 | |
| 97 | return IRQ_HANDLED; |
| 98 | } |
| 99 | |
| 100 | static struct irqaction sa1100_timer_irq = { |
| 101 | .name = "SA11xx Timer Tick", |
| 102 | .flags = SA_INTERRUPT, |
| 103 | .handler = sa1100_timer_interrupt |
| 104 | }; |
| 105 | |
| 106 | static void __init sa1100_timer_init(void) |
| 107 | { |
| 108 | struct timespec tv; |
| 109 | |
| 110 | set_rtc = sa1100_set_rtc; |
| 111 | |
| 112 | tv.tv_nsec = 0; |
| 113 | tv.tv_sec = sa1100_get_rtc_time(); |
| 114 | do_settimeofday(&tv); |
| 115 | |
| 116 | OSMR0 = 0; /* set initial match at 0 */ |
| 117 | OSSR = 0xf; /* clear status on all timers */ |
| 118 | setup_irq(IRQ_OST0, &sa1100_timer_irq); |
| 119 | OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */ |
| 120 | OSCR = 0; /* initialize free-running timer, force first match */ |
| 121 | } |
| 122 | |
| 123 | #ifdef CONFIG_PM |
| 124 | unsigned long osmr[4], oier; |
| 125 | |
| 126 | static void sa1100_timer_suspend(void) |
| 127 | { |
| 128 | osmr[0] = OSMR0; |
| 129 | osmr[1] = OSMR1; |
| 130 | osmr[2] = OSMR2; |
| 131 | osmr[3] = OSMR3; |
| 132 | oier = OIER; |
| 133 | } |
| 134 | |
| 135 | static void sa1100_timer_resume(void) |
| 136 | { |
| 137 | OSSR = 0x0f; |
| 138 | OSMR0 = osmr[0]; |
| 139 | OSMR1 = osmr[1]; |
| 140 | OSMR2 = osmr[2]; |
| 141 | OSMR3 = osmr[3]; |
| 142 | OIER = oier; |
| 143 | |
| 144 | /* |
| 145 | * OSMR0 is the system timer: make sure OSCR is sufficiently behind |
| 146 | */ |
| 147 | OSCR = OSMR0 - LATCH; |
| 148 | } |
| 149 | #else |
| 150 | #define sa1100_timer_suspend NULL |
| 151 | #define sa1100_timer_resume NULL |
| 152 | #endif |
| 153 | |
| 154 | struct sys_timer sa1100_timer = { |
| 155 | .init = sa1100_timer_init, |
| 156 | .suspend = sa1100_timer_suspend, |
| 157 | .resume = sa1100_timer_resume, |
| 158 | .offset = sa1100_gettimeoffset, |
| 159 | }; |