blob: f759ca2439252036ee7e92963b4a209109a34a4d [file] [log] [blame]
Saeed Bishara651c74c2008-06-22 22:45:06 +02001/*
2 * arch/arm/mach-kirkwood/common.c
3 *
4 * Core functions for Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h>
Martin Michlmayr6574e002009-03-23 19:13:21 +010017#include <linux/mv643xx_i2c.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020018#include <linux/ata_platform.h>
Nicolas Pitrefb7b2d32009-06-01 15:36:36 -040019#include <linux/mtd/nand.h>
Lennert Buytenhek18365d12008-08-09 15:38:18 +020020#include <linux/spi/orion_spi.h>
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +020021#include <net/dsa.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020022#include <asm/page.h>
23#include <asm/timex.h>
24#include <asm/mach/map.h>
25#include <asm/mach/time.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/kirkwood.h>
Nicolas Pitrefdd8b072009-04-22 20:08:17 +010027#include <mach/bridge-regs.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020028#include <plat/cache-feroceon-l2.h>
29#include <plat/ehci-orion.h>
Nicolas Pitre8235ee02009-02-14 03:15:55 -050030#include <plat/mvsdio.h>
Saeed Bishara09c0ed22008-06-23 04:26:07 -110031#include <plat/mv_xor.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020032#include <plat/orion_nand.h>
Nicolas Pitre3b937a72009-06-01 13:56:02 -040033#include <plat/orion_wdt.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020034#include <plat/time.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020035#include "common.h"
36
37/*****************************************************************************
38 * I/O Address Mapping
39 ****************************************************************************/
40static struct map_desc kirkwood_io_desc[] __initdata = {
41 {
42 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
43 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
44 .length = KIRKWOOD_PCIE_IO_SIZE,
45 .type = MT_DEVICE,
46 }, {
47 .virtual = KIRKWOOD_REGS_VIRT_BASE,
48 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
49 .length = KIRKWOOD_REGS_SIZE,
50 .type = MT_DEVICE,
51 },
52};
53
54void __init kirkwood_map_io(void)
55{
56 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
57}
58
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +020059/*
60 * Default clock control bits. Any bit _not_ set in this variable
61 * will be cleared from the hardware after platform devices have been
62 * registered. Some reserved bits must be set to 1.
63 */
64unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
65
Saeed Bishara651c74c2008-06-22 22:45:06 +020066
67/*****************************************************************************
68 * EHCI
69 ****************************************************************************/
70static struct orion_ehci_data kirkwood_ehci_data = {
71 .dram = &kirkwood_mbus_dram_info,
Ronen Shitritfb6f5522008-09-17 10:08:05 +030072 .phy_version = EHCI_PHY_NA,
Saeed Bishara651c74c2008-06-22 22:45:06 +020073};
74
75static u64 ehci_dmamask = 0xffffffffUL;
76
77
78/*****************************************************************************
79 * EHCI0
80 ****************************************************************************/
81static struct resource kirkwood_ehci_resources[] = {
82 {
83 .start = USB_PHYS_BASE,
84 .end = USB_PHYS_BASE + 0x0fff,
85 .flags = IORESOURCE_MEM,
86 }, {
87 .start = IRQ_KIRKWOOD_USB,
88 .end = IRQ_KIRKWOOD_USB,
89 .flags = IORESOURCE_IRQ,
90 },
91};
92
93static struct platform_device kirkwood_ehci = {
94 .name = "orion-ehci",
95 .id = 0,
96 .dev = {
97 .dma_mask = &ehci_dmamask,
98 .coherent_dma_mask = 0xffffffff,
99 .platform_data = &kirkwood_ehci_data,
100 },
101 .resource = kirkwood_ehci_resources,
102 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
103};
104
105void __init kirkwood_ehci_init(void)
106{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200107 kirkwood_clk_ctrl |= CGC_USB0;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200108 platform_device_register(&kirkwood_ehci);
109}
110
111
112/*****************************************************************************
113 * GE00
114 ****************************************************************************/
115struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
Saeed Bishara651c74c2008-06-22 22:45:06 +0200116 .dram = &kirkwood_mbus_dram_info,
117};
118
119static struct resource kirkwood_ge00_shared_resources[] = {
120 {
121 .name = "ge00 base",
122 .start = GE00_PHYS_BASE + 0x2000,
123 .end = GE00_PHYS_BASE + 0x3fff,
124 .flags = IORESOURCE_MEM,
Lennert Buytenhek144f8142008-08-26 16:04:05 +0200125 }, {
126 .name = "ge00 err irq",
127 .start = IRQ_KIRKWOOD_GE00_ERR,
128 .end = IRQ_KIRKWOOD_GE00_ERR,
129 .flags = IORESOURCE_IRQ,
Saeed Bishara651c74c2008-06-22 22:45:06 +0200130 },
131};
132
133static struct platform_device kirkwood_ge00_shared = {
134 .name = MV643XX_ETH_SHARED_NAME,
135 .id = 0,
136 .dev = {
137 .platform_data = &kirkwood_ge00_shared_data,
138 },
Lennert Buytenhek144f8142008-08-26 16:04:05 +0200139 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
Saeed Bishara651c74c2008-06-22 22:45:06 +0200140 .resource = kirkwood_ge00_shared_resources,
141};
142
143static struct resource kirkwood_ge00_resources[] = {
144 {
145 .name = "ge00 irq",
146 .start = IRQ_KIRKWOOD_GE00_SUM,
147 .end = IRQ_KIRKWOOD_GE00_SUM,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152static struct platform_device kirkwood_ge00 = {
153 .name = MV643XX_ETH_NAME,
154 .id = 0,
155 .num_resources = 1,
156 .resource = kirkwood_ge00_resources,
Nicolas Pitrea49a0182009-05-22 16:53:40 -0400157 .dev = {
158 .coherent_dma_mask = 0xffffffff,
159 },
Saeed Bishara651c74c2008-06-22 22:45:06 +0200160};
161
162void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
163{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200164 kirkwood_clk_ctrl |= CGC_GE0;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200165 eth_data->shared = &kirkwood_ge00_shared;
166 kirkwood_ge00.dev.platform_data = eth_data;
167
168 platform_device_register(&kirkwood_ge00_shared);
169 platform_device_register(&kirkwood_ge00);
170}
171
172
173/*****************************************************************************
Ronen Shitritd15fb9e2008-10-19 23:10:14 +0200174 * GE01
175 ****************************************************************************/
176struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
177 .dram = &kirkwood_mbus_dram_info,
178 .shared_smi = &kirkwood_ge00_shared,
179};
180
181static struct resource kirkwood_ge01_shared_resources[] = {
182 {
183 .name = "ge01 base",
184 .start = GE01_PHYS_BASE + 0x2000,
185 .end = GE01_PHYS_BASE + 0x3fff,
186 .flags = IORESOURCE_MEM,
187 }, {
188 .name = "ge01 err irq",
189 .start = IRQ_KIRKWOOD_GE01_ERR,
190 .end = IRQ_KIRKWOOD_GE01_ERR,
191 .flags = IORESOURCE_IRQ,
192 },
193};
194
195static struct platform_device kirkwood_ge01_shared = {
196 .name = MV643XX_ETH_SHARED_NAME,
197 .id = 1,
198 .dev = {
199 .platform_data = &kirkwood_ge01_shared_data,
200 },
201 .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
202 .resource = kirkwood_ge01_shared_resources,
203};
204
205static struct resource kirkwood_ge01_resources[] = {
206 {
207 .name = "ge01 irq",
208 .start = IRQ_KIRKWOOD_GE01_SUM,
209 .end = IRQ_KIRKWOOD_GE01_SUM,
210 .flags = IORESOURCE_IRQ,
211 },
212};
213
214static struct platform_device kirkwood_ge01 = {
215 .name = MV643XX_ETH_NAME,
216 .id = 1,
217 .num_resources = 1,
218 .resource = kirkwood_ge01_resources,
Nicolas Pitrea49a0182009-05-22 16:53:40 -0400219 .dev = {
220 .coherent_dma_mask = 0xffffffff,
221 },
Ronen Shitritd15fb9e2008-10-19 23:10:14 +0200222};
223
224void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
225{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200226 kirkwood_clk_ctrl |= CGC_GE1;
Ronen Shitritd15fb9e2008-10-19 23:10:14 +0200227 eth_data->shared = &kirkwood_ge01_shared;
228 kirkwood_ge01.dev.platform_data = eth_data;
229
230 platform_device_register(&kirkwood_ge01_shared);
231 platform_device_register(&kirkwood_ge01);
232}
233
234
235/*****************************************************************************
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200236 * Ethernet switch
237 ****************************************************************************/
238static struct resource kirkwood_switch_resources[] = {
239 {
240 .start = 0,
241 .end = 0,
242 .flags = IORESOURCE_IRQ,
243 },
244};
245
246static struct platform_device kirkwood_switch_device = {
247 .name = "dsa",
248 .id = 0,
249 .num_resources = 0,
250 .resource = kirkwood_switch_resources,
251};
252
253void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
254{
Lennert Buytenheke84665c2009-03-20 09:52:09 +0000255 int i;
256
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200257 if (irq != NO_IRQ) {
258 kirkwood_switch_resources[0].start = irq;
259 kirkwood_switch_resources[0].end = irq;
260 kirkwood_switch_device.num_resources = 1;
261 }
262
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200263 d->netdev = &kirkwood_ge00.dev;
Lennert Buytenheke84665c2009-03-20 09:52:09 +0000264 for (i = 0; i < d->nr_chips; i++)
265 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200266 kirkwood_switch_device.dev.platform_data = d;
267
268 platform_device_register(&kirkwood_switch_device);
269}
270
271
272/*****************************************************************************
Nicolas Pitrefb7b2d32009-06-01 15:36:36 -0400273 * NAND flash
274 ****************************************************************************/
275static struct resource kirkwood_nand_resource = {
276 .flags = IORESOURCE_MEM,
277 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
278 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
279 KIRKWOOD_NAND_MEM_SIZE - 1,
280};
281
282static struct orion_nand_data kirkwood_nand_data = {
283 .cle = 0,
284 .ale = 1,
285 .width = 8,
286};
287
288static struct platform_device kirkwood_nand_flash = {
289 .name = "orion_nand",
290 .id = -1,
291 .dev = {
292 .platform_data = &kirkwood_nand_data,
293 },
294 .resource = &kirkwood_nand_resource,
295 .num_resources = 1,
296};
297
298void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
299 int chip_delay)
300{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200301 kirkwood_clk_ctrl |= CGC_RUNIT;
Nicolas Pitrefb7b2d32009-06-01 15:36:36 -0400302 kirkwood_nand_data.parts = parts;
303 kirkwood_nand_data.nr_parts = nr_parts;
304 kirkwood_nand_data.chip_delay = chip_delay;
305 platform_device_register(&kirkwood_nand_flash);
306}
307
308
309/*****************************************************************************
Saeed Bishara651c74c2008-06-22 22:45:06 +0200310 * SoC RTC
311 ****************************************************************************/
312static struct resource kirkwood_rtc_resource = {
313 .start = RTC_PHYS_BASE,
314 .end = RTC_PHYS_BASE + SZ_16 - 1,
315 .flags = IORESOURCE_MEM,
316};
317
Nicolas Pitre5b99d532009-02-26 22:55:59 -0500318static void __init kirkwood_rtc_init(void)
Saeed Bishara651c74c2008-06-22 22:45:06 +0200319{
320 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
321}
322
323
324/*****************************************************************************
325 * SATA
326 ****************************************************************************/
327static struct resource kirkwood_sata_resources[] = {
328 {
329 .name = "sata base",
330 .start = SATA_PHYS_BASE,
331 .end = SATA_PHYS_BASE + 0x5000 - 1,
332 .flags = IORESOURCE_MEM,
333 }, {
334 .name = "sata irq",
335 .start = IRQ_KIRKWOOD_SATA,
336 .end = IRQ_KIRKWOOD_SATA,
337 .flags = IORESOURCE_IRQ,
338 },
339};
340
341static struct platform_device kirkwood_sata = {
342 .name = "sata_mv",
343 .id = 0,
344 .dev = {
345 .coherent_dma_mask = 0xffffffff,
346 },
347 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
348 .resource = kirkwood_sata_resources,
349};
350
351void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
352{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200353 kirkwood_clk_ctrl |= CGC_SATA0;
354 if (sata_data->n_ports > 1)
355 kirkwood_clk_ctrl |= CGC_SATA1;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200356 sata_data->dram = &kirkwood_mbus_dram_info;
357 kirkwood_sata.dev.platform_data = sata_data;
358 platform_device_register(&kirkwood_sata);
359}
360
361
362/*****************************************************************************
Nicolas Pitre8235ee02009-02-14 03:15:55 -0500363 * SD/SDIO/MMC
364 ****************************************************************************/
365static struct resource mvsdio_resources[] = {
366 [0] = {
367 .start = SDIO_PHYS_BASE,
368 .end = SDIO_PHYS_BASE + SZ_1K - 1,
369 .flags = IORESOURCE_MEM,
370 },
371 [1] = {
372 .start = IRQ_KIRKWOOD_SDIO,
373 .end = IRQ_KIRKWOOD_SDIO,
374 .flags = IORESOURCE_IRQ,
375 },
376};
377
378static u64 mvsdio_dmamask = 0xffffffffUL;
379
380static struct platform_device kirkwood_sdio = {
381 .name = "mvsdio",
382 .id = -1,
383 .dev = {
384 .dma_mask = &mvsdio_dmamask,
385 .coherent_dma_mask = 0xffffffff,
386 },
387 .num_resources = ARRAY_SIZE(mvsdio_resources),
388 .resource = mvsdio_resources,
389};
390
391void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
392{
393 u32 dev, rev;
394
395 kirkwood_pcie_id(&dev, &rev);
396 if (rev == 0) /* catch all Kirkwood Z0's */
397 mvsdio_data->clock = 100000000;
398 else
399 mvsdio_data->clock = 200000000;
400 mvsdio_data->dram = &kirkwood_mbus_dram_info;
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200401 kirkwood_clk_ctrl |= CGC_SDIO;
Nicolas Pitre8235ee02009-02-14 03:15:55 -0500402 kirkwood_sdio.dev.platform_data = mvsdio_data;
403 platform_device_register(&kirkwood_sdio);
404}
405
406
407/*****************************************************************************
Lennert Buytenhek18365d12008-08-09 15:38:18 +0200408 * SPI
409 ****************************************************************************/
410static struct orion_spi_info kirkwood_spi_plat_data = {
Lennert Buytenhek18365d12008-08-09 15:38:18 +0200411};
412
413static struct resource kirkwood_spi_resources[] = {
414 {
415 .start = SPI_PHYS_BASE,
416 .end = SPI_PHYS_BASE + SZ_512 - 1,
417 .flags = IORESOURCE_MEM,
418 },
419};
420
421static struct platform_device kirkwood_spi = {
422 .name = "orion_spi",
423 .id = 0,
424 .resource = kirkwood_spi_resources,
425 .dev = {
426 .platform_data = &kirkwood_spi_plat_data,
427 },
428 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
429};
430
431void __init kirkwood_spi_init()
432{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200433 kirkwood_clk_ctrl |= CGC_RUNIT;
Lennert Buytenhek18365d12008-08-09 15:38:18 +0200434 platform_device_register(&kirkwood_spi);
435}
436
437
438/*****************************************************************************
Martin Michlmayr6574e002009-03-23 19:13:21 +0100439 * I2C
440 ****************************************************************************/
441static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
442 .freq_m = 8, /* assumes 166 MHz TCLK */
443 .freq_n = 3,
444 .timeout = 1000, /* Default timeout of 1 second */
445};
446
447static struct resource kirkwood_i2c_resources[] = {
448 {
Martin Michlmayr6574e002009-03-23 19:13:21 +0100449 .start = I2C_PHYS_BASE,
450 .end = I2C_PHYS_BASE + 0x1f,
451 .flags = IORESOURCE_MEM,
452 }, {
Martin Michlmayr6574e002009-03-23 19:13:21 +0100453 .start = IRQ_KIRKWOOD_TWSI,
454 .end = IRQ_KIRKWOOD_TWSI,
455 .flags = IORESOURCE_IRQ,
456 },
457};
458
459static struct platform_device kirkwood_i2c = {
460 .name = MV64XXX_I2C_CTLR_NAME,
461 .id = 0,
462 .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
463 .resource = kirkwood_i2c_resources,
464 .dev = {
465 .platform_data = &kirkwood_i2c_pdata,
466 },
467};
468
469void __init kirkwood_i2c_init(void)
470{
471 platform_device_register(&kirkwood_i2c);
472}
473
474
475/*****************************************************************************
Saeed Bishara651c74c2008-06-22 22:45:06 +0200476 * UART0
477 ****************************************************************************/
478static struct plat_serial8250_port kirkwood_uart0_data[] = {
479 {
480 .mapbase = UART0_PHYS_BASE,
481 .membase = (char *)UART0_VIRT_BASE,
482 .irq = IRQ_KIRKWOOD_UART_0,
483 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
484 .iotype = UPIO_MEM,
485 .regshift = 2,
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200486 .uartclk = 0,
Saeed Bishara651c74c2008-06-22 22:45:06 +0200487 }, {
488 },
489};
490
491static struct resource kirkwood_uart0_resources[] = {
492 {
493 .start = UART0_PHYS_BASE,
494 .end = UART0_PHYS_BASE + 0xff,
495 .flags = IORESOURCE_MEM,
496 }, {
497 .start = IRQ_KIRKWOOD_UART_0,
498 .end = IRQ_KIRKWOOD_UART_0,
499 .flags = IORESOURCE_IRQ,
500 },
501};
502
503static struct platform_device kirkwood_uart0 = {
504 .name = "serial8250",
505 .id = 0,
506 .dev = {
507 .platform_data = kirkwood_uart0_data,
508 },
509 .resource = kirkwood_uart0_resources,
510 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
511};
512
513void __init kirkwood_uart0_init(void)
514{
515 platform_device_register(&kirkwood_uart0);
516}
517
518
519/*****************************************************************************
520 * UART1
521 ****************************************************************************/
522static struct plat_serial8250_port kirkwood_uart1_data[] = {
523 {
524 .mapbase = UART1_PHYS_BASE,
525 .membase = (char *)UART1_VIRT_BASE,
526 .irq = IRQ_KIRKWOOD_UART_1,
527 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
528 .iotype = UPIO_MEM,
529 .regshift = 2,
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200530 .uartclk = 0,
Saeed Bishara651c74c2008-06-22 22:45:06 +0200531 }, {
532 },
533};
534
535static struct resource kirkwood_uart1_resources[] = {
536 {
537 .start = UART1_PHYS_BASE,
538 .end = UART1_PHYS_BASE + 0xff,
539 .flags = IORESOURCE_MEM,
540 }, {
541 .start = IRQ_KIRKWOOD_UART_1,
542 .end = IRQ_KIRKWOOD_UART_1,
543 .flags = IORESOURCE_IRQ,
544 },
545};
546
547static struct platform_device kirkwood_uart1 = {
548 .name = "serial8250",
549 .id = 1,
550 .dev = {
551 .platform_data = kirkwood_uart1_data,
552 },
553 .resource = kirkwood_uart1_resources,
554 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
555};
556
557void __init kirkwood_uart1_init(void)
558{
559 platform_device_register(&kirkwood_uart1);
560}
561
562
563/*****************************************************************************
Nicolas Pitreae5c8c82009-06-03 15:24:36 -0400564 * Cryptographic Engines and Security Accelerator (CESA)
565 ****************************************************************************/
566
567static struct resource kirkwood_crypto_res[] = {
568 {
569 .name = "regs",
570 .start = CRYPTO_PHYS_BASE,
571 .end = CRYPTO_PHYS_BASE + 0xffff,
572 .flags = IORESOURCE_MEM,
573 }, {
574 .name = "sram",
575 .start = KIRKWOOD_SRAM_PHYS_BASE,
576 .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
577 .flags = IORESOURCE_MEM,
578 }, {
579 .name = "crypto interrupt",
580 .start = IRQ_KIRKWOOD_CRYPTO,
581 .end = IRQ_KIRKWOOD_CRYPTO,
582 .flags = IORESOURCE_IRQ,
583 },
584};
585
586static struct platform_device kirkwood_crypto_device = {
587 .name = "mv_crypto",
588 .id = -1,
589 .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
590 .resource = kirkwood_crypto_res,
591};
592
593void __init kirkwood_crypto_init(void)
594{
595 kirkwood_clk_ctrl |= CGC_CRYPTO;
596 platform_device_register(&kirkwood_crypto_device);
597}
598
599
600/*****************************************************************************
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100601 * XOR
602 ****************************************************************************/
603static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
604 .dram = &kirkwood_mbus_dram_info,
605};
606
Yang Hongyang284901a2009-04-06 19:01:15 -0700607static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100608
609
610/*****************************************************************************
611 * XOR0
612 ****************************************************************************/
613static struct resource kirkwood_xor0_shared_resources[] = {
614 {
615 .name = "xor 0 low",
616 .start = XOR0_PHYS_BASE,
617 .end = XOR0_PHYS_BASE + 0xff,
618 .flags = IORESOURCE_MEM,
619 }, {
620 .name = "xor 0 high",
621 .start = XOR0_HIGH_PHYS_BASE,
622 .end = XOR0_HIGH_PHYS_BASE + 0xff,
623 .flags = IORESOURCE_MEM,
624 },
625};
626
627static struct platform_device kirkwood_xor0_shared = {
628 .name = MV_XOR_SHARED_NAME,
629 .id = 0,
630 .dev = {
631 .platform_data = &kirkwood_xor_shared_data,
632 },
633 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
634 .resource = kirkwood_xor0_shared_resources,
635};
636
637static struct resource kirkwood_xor00_resources[] = {
638 [0] = {
639 .start = IRQ_KIRKWOOD_XOR_00,
640 .end = IRQ_KIRKWOOD_XOR_00,
641 .flags = IORESOURCE_IRQ,
642 },
643};
644
645static struct mv_xor_platform_data kirkwood_xor00_data = {
646 .shared = &kirkwood_xor0_shared,
647 .hw_id = 0,
648 .pool_size = PAGE_SIZE,
649};
650
651static struct platform_device kirkwood_xor00_channel = {
652 .name = MV_XOR_NAME,
653 .id = 0,
654 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
655 .resource = kirkwood_xor00_resources,
656 .dev = {
657 .dma_mask = &kirkwood_xor_dmamask,
Yang Hongyang6a355282009-04-06 19:01:13 -0700658 .coherent_dma_mask = DMA_BIT_MASK(64),
H Hartley Sweeten3e3e65f2010-01-29 14:43:52 -0800659 .platform_data = &kirkwood_xor00_data,
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100660 },
661};
662
663static struct resource kirkwood_xor01_resources[] = {
664 [0] = {
665 .start = IRQ_KIRKWOOD_XOR_01,
666 .end = IRQ_KIRKWOOD_XOR_01,
667 .flags = IORESOURCE_IRQ,
668 },
669};
670
671static struct mv_xor_platform_data kirkwood_xor01_data = {
672 .shared = &kirkwood_xor0_shared,
673 .hw_id = 1,
674 .pool_size = PAGE_SIZE,
675};
676
677static struct platform_device kirkwood_xor01_channel = {
678 .name = MV_XOR_NAME,
679 .id = 1,
680 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
681 .resource = kirkwood_xor01_resources,
682 .dev = {
683 .dma_mask = &kirkwood_xor_dmamask,
Yang Hongyang6a355282009-04-06 19:01:13 -0700684 .coherent_dma_mask = DMA_BIT_MASK(64),
H Hartley Sweeten3e3e65f2010-01-29 14:43:52 -0800685 .platform_data = &kirkwood_xor01_data,
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100686 },
687};
688
Nicolas Pitre5b99d532009-02-26 22:55:59 -0500689static void __init kirkwood_xor0_init(void)
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100690{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200691 kirkwood_clk_ctrl |= CGC_XOR0;
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100692 platform_device_register(&kirkwood_xor0_shared);
693
694 /*
695 * two engines can't do memset simultaneously, this limitation
696 * satisfied by removing memset support from one of the engines.
697 */
698 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
699 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
700 platform_device_register(&kirkwood_xor00_channel);
701
702 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
703 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
704 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
705 platform_device_register(&kirkwood_xor01_channel);
706}
707
708
709/*****************************************************************************
710 * XOR1
711 ****************************************************************************/
712static struct resource kirkwood_xor1_shared_resources[] = {
713 {
714 .name = "xor 1 low",
715 .start = XOR1_PHYS_BASE,
716 .end = XOR1_PHYS_BASE + 0xff,
717 .flags = IORESOURCE_MEM,
718 }, {
719 .name = "xor 1 high",
720 .start = XOR1_HIGH_PHYS_BASE,
721 .end = XOR1_HIGH_PHYS_BASE + 0xff,
722 .flags = IORESOURCE_MEM,
723 },
724};
725
726static struct platform_device kirkwood_xor1_shared = {
727 .name = MV_XOR_SHARED_NAME,
728 .id = 1,
729 .dev = {
730 .platform_data = &kirkwood_xor_shared_data,
731 },
732 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
733 .resource = kirkwood_xor1_shared_resources,
734};
735
736static struct resource kirkwood_xor10_resources[] = {
737 [0] = {
738 .start = IRQ_KIRKWOOD_XOR_10,
739 .end = IRQ_KIRKWOOD_XOR_10,
740 .flags = IORESOURCE_IRQ,
741 },
742};
743
744static struct mv_xor_platform_data kirkwood_xor10_data = {
745 .shared = &kirkwood_xor1_shared,
746 .hw_id = 0,
747 .pool_size = PAGE_SIZE,
748};
749
750static struct platform_device kirkwood_xor10_channel = {
751 .name = MV_XOR_NAME,
752 .id = 2,
753 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
754 .resource = kirkwood_xor10_resources,
755 .dev = {
756 .dma_mask = &kirkwood_xor_dmamask,
Yang Hongyang6a355282009-04-06 19:01:13 -0700757 .coherent_dma_mask = DMA_BIT_MASK(64),
H Hartley Sweeten3e3e65f2010-01-29 14:43:52 -0800758 .platform_data = &kirkwood_xor10_data,
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100759 },
760};
761
762static struct resource kirkwood_xor11_resources[] = {
763 [0] = {
764 .start = IRQ_KIRKWOOD_XOR_11,
765 .end = IRQ_KIRKWOOD_XOR_11,
766 .flags = IORESOURCE_IRQ,
767 },
768};
769
770static struct mv_xor_platform_data kirkwood_xor11_data = {
771 .shared = &kirkwood_xor1_shared,
772 .hw_id = 1,
773 .pool_size = PAGE_SIZE,
774};
775
776static struct platform_device kirkwood_xor11_channel = {
777 .name = MV_XOR_NAME,
778 .id = 3,
779 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
780 .resource = kirkwood_xor11_resources,
781 .dev = {
782 .dma_mask = &kirkwood_xor_dmamask,
Yang Hongyang6a355282009-04-06 19:01:13 -0700783 .coherent_dma_mask = DMA_BIT_MASK(64),
H Hartley Sweeten3e3e65f2010-01-29 14:43:52 -0800784 .platform_data = &kirkwood_xor11_data,
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100785 },
786};
787
Nicolas Pitre5b99d532009-02-26 22:55:59 -0500788static void __init kirkwood_xor1_init(void)
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100789{
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200790 kirkwood_clk_ctrl |= CGC_XOR1;
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100791 platform_device_register(&kirkwood_xor1_shared);
792
793 /*
794 * two engines can't do memset simultaneously, this limitation
795 * satisfied by removing memset support from one of the engines.
796 */
797 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
798 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
799 platform_device_register(&kirkwood_xor10_channel);
800
801 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
802 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
803 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
804 platform_device_register(&kirkwood_xor11_channel);
805}
806
807
808/*****************************************************************************
Thomas Reitmayr054bd3f02009-06-01 13:38:34 +0200809 * Watchdog
810 ****************************************************************************/
Nicolas Pitre3b937a72009-06-01 13:56:02 -0400811static struct orion_wdt_platform_data kirkwood_wdt_data = {
Thomas Reitmayr054bd3f02009-06-01 13:38:34 +0200812 .tclk = 0,
813};
814
815static struct platform_device kirkwood_wdt_device = {
Nicolas Pitre3b937a72009-06-01 13:56:02 -0400816 .name = "orion_wdt",
Thomas Reitmayr054bd3f02009-06-01 13:38:34 +0200817 .id = -1,
818 .dev = {
819 .platform_data = &kirkwood_wdt_data,
820 },
821 .num_resources = 0,
822};
823
824static void __init kirkwood_wdt_init(void)
825{
826 kirkwood_wdt_data.tclk = kirkwood_tclk;
827 platform_device_register(&kirkwood_wdt_device);
828}
829
830
831/*****************************************************************************
Saeed Bishara651c74c2008-06-22 22:45:06 +0200832 * Time handling
833 ****************************************************************************/
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200834int kirkwood_tclk;
835
836int __init kirkwood_find_tclk(void)
837{
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300838 u32 dev, rev;
839
840 kirkwood_pcie_id(&dev, &rev);
Siddarth Goreaec1bad2009-06-09 14:41:02 +0530841 if (dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
842 rev == MV88F6281_REV_A1))
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300843 return 200000000;
844
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200845 return 166666667;
846}
847
Li Jie6de95c12009-11-05 07:29:54 -0800848static void __init kirkwood_timer_init(void)
Saeed Bishara651c74c2008-06-22 22:45:06 +0200849{
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200850 kirkwood_tclk = kirkwood_find_tclk();
851 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
Saeed Bishara651c74c2008-06-22 22:45:06 +0200852}
853
854struct sys_timer kirkwood_timer = {
855 .init = kirkwood_timer_init,
856};
857
858
859/*****************************************************************************
860 * General
861 ****************************************************************************/
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300862/*
863 * Identify device ID and revision.
864 */
Saeed Bishara651c74c2008-06-22 22:45:06 +0200865static char * __init kirkwood_id(void)
866{
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300867 u32 dev, rev;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200868
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300869 kirkwood_pcie_id(&dev, &rev);
870
871 if (dev == MV88F6281_DEV_ID) {
872 if (rev == MV88F6281_REV_Z0)
873 return "MV88F6281-Z0";
874 else if (rev == MV88F6281_REV_A0)
875 return "MV88F6281-A0";
Siddarth Goreaec1bad2009-06-09 14:41:02 +0530876 else if (rev == MV88F6281_REV_A1)
877 return "MV88F6281-A1";
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300878 else
879 return "MV88F6281-Rev-Unsupported";
880 } else if (dev == MV88F6192_DEV_ID) {
881 if (rev == MV88F6192_REV_Z0)
882 return "MV88F6192-Z0";
883 else if (rev == MV88F6192_REV_A0)
884 return "MV88F6192-A0";
885 else
886 return "MV88F6192-Rev-Unsupported";
887 } else if (dev == MV88F6180_DEV_ID) {
888 if (rev == MV88F6180_REV_A0)
889 return "MV88F6180-Rev-A0";
890 else
891 return "MV88F6180-Rev-Unsupported";
892 } else {
893 return "Device-Unknown";
894 }
Saeed Bishara651c74c2008-06-22 22:45:06 +0200895}
896
Ronen Shitrit4360bb42008-09-23 15:28:10 +0300897static void __init kirkwood_l2_init(void)
Saeed Bishara13387602008-06-23 01:05:08 -1100898{
Ronen Shitrit4360bb42008-09-23 15:28:10 +0300899#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
900 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
901 feroceon_l2_init(1);
902#else
903 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
904 feroceon_l2_init(0);
905#endif
Saeed Bishara13387602008-06-23 01:05:08 -1100906}
907
Saeed Bishara651c74c2008-06-22 22:45:06 +0200908void __init kirkwood_init(void)
909{
910 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200911 kirkwood_id(), kirkwood_tclk);
912 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
Nicolas Pitre13731d12009-01-06 23:02:08 +0100913 kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200914 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
915 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
916 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200917
Lennert Buytenhek2bf30102009-11-12 20:31:14 +0100918 /*
919 * Disable propagation of mbus errors to the CPU local bus,
920 * as this causes mbus errors (which can occur for example
921 * for PCI aborts) to throw CPU aborts, which we're not set
922 * up to deal with.
923 */
924 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
925
Saeed Bishara651c74c2008-06-22 22:45:06 +0200926 kirkwood_setup_cpu_mbus();
927
928#ifdef CONFIG_CACHE_FEROCEON_L2
Ronen Shitrit4360bb42008-09-23 15:28:10 +0300929 kirkwood_l2_init();
Saeed Bishara651c74c2008-06-22 22:45:06 +0200930#endif
Nicolas Pitre5b99d532009-02-26 22:55:59 -0500931
932 /* internal devices that every board has */
933 kirkwood_rtc_init();
Thomas Reitmayr054bd3f02009-06-01 13:38:34 +0200934 kirkwood_wdt_init();
Nicolas Pitre5b99d532009-02-26 22:55:59 -0500935 kirkwood_xor0_init();
936 kirkwood_xor1_init();
Nicolas Pitreae5c8c82009-06-03 15:24:36 -0400937 kirkwood_crypto_init();
Saeed Bishara651c74c2008-06-22 22:45:06 +0200938}
Rabeeh Khourye8b2b7b2009-03-22 17:30:32 +0200939
940static int __init kirkwood_clock_gate(void)
941{
942 unsigned int curr = readl(CLOCK_GATING_CTRL);
943
944 printk(KERN_DEBUG "Gating clock of unused units\n");
945 printk(KERN_DEBUG "before: 0x%08x\n", curr);
946
947 /* Make sure those units are accessible */
948 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
949
950 /* For SATA: first shutdown the phy */
951 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
952 /* Disable PLL and IVREF */
953 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
954 /* Disable PHY */
955 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
956 }
957 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
958 /* Disable PLL and IVREF */
959 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
960 /* Disable PHY */
961 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
962 }
963
964 /* For PCIe: first shutdown the phy */
965 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
966 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
967 while (1)
968 if (readl(PCIE_STATUS) & 0x1)
969 break;
970 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
971 }
972
973 /* Now gate clock the required units */
974 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
975 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
976
977 return 0;
978}
979late_initcall(kirkwood_clock_gate);