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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 1999,2001
4 *
5 * Author: J.E.J.Bottomley@HansenPartnership.com
6 *
7 * linux/arch/i386/kernel/voyager_smp.c
8 *
9 * This file provides all the same external entries as smp.c but uses
10 * the voyager hal to provide the functionality
11 */
James Bottomley153f8052005-07-13 09:38:05 -040012#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070013#include <linux/mm.h>
14#include <linux/kernel_stat.h>
15#include <linux/delay.h>
16#include <linux/mc146818rtc.h>
17#include <linux/cache.h>
18#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/bootmem.h>
22#include <linux/completion.h>
23#include <asm/desc.h>
24#include <asm/voyager.h>
25#include <asm/vic.h>
26#include <asm/mtrr.h>
27#include <asm/pgalloc.h>
28#include <asm/tlbflush.h>
29#include <asm/arch_hooks.h>
30
Linus Torvalds1da177e2005-04-16 15:20:36 -070031/* TLB state -- visible externally, indexed physically */
James Bottomley0cca1ca2007-10-26 12:17:19 -050032DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 };
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
34/* CPU IRQ affinity -- set to all ones initially */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +010035static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned =
36 {[0 ... NR_CPUS-1] = ~0UL };
Linus Torvalds1da177e2005-04-16 15:20:36 -070037
38/* per CPU data structure (for /proc/cpuinfo et al), visible externally
39 * indexed physically */
James Bottomley0cca1ca2007-10-26 12:17:19 -050040DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
Mike Travis92cb7612007-10-19 20:35:04 +020041EXPORT_PER_CPU_SYMBOL(cpu_info);
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43/* physical ID of the CPU used to boot the system */
44unsigned char boot_cpu_id;
45
46/* The memory line addresses for the Quad CPIs */
47struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned;
48
49/* The masks for the Extended VIC processors, filled in by cat_init */
50__u32 voyager_extended_vic_processors = 0;
51
52/* Masks for the extended Quad processors which cannot be VIC booted */
53__u32 voyager_allowed_boot_processors = 0;
54
55/* The mask for the Quad Processors (both extended and non-extended) */
56__u32 voyager_quad_processors = 0;
57
58/* Total count of live CPUs, used in process.c to display
59 * the CPU information and in irq.c for the per CPU irq
60 * activity count. Finally exported by i386_ksyms.c */
61static int voyager_extended_cpus = 1;
62
63/* Have we found an SMP box - used by time.c to do the profiling
64 interrupt for timeslicing; do not set to 1 until the per CPU timer
65 interrupt is active */
66int smp_found_config = 0;
67
68/* Used for the invalidate map that's also checked in the spinlock */
69static volatile unsigned long smp_invalidate_needed;
70
71/* Bitmask of currently online CPUs - used by setup.c for
72 /proc/cpuinfo, visible externally but still physical */
73cpumask_t cpu_online_map = CPU_MASK_NONE;
James Bottomley153f8052005-07-13 09:38:05 -040074EXPORT_SYMBOL(cpu_online_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
76/* Bitmask of CPUs present in the system - exported by i386_syms.c, used
77 * by scheduler but indexed physically */
78cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
79
Linus Torvalds1da177e2005-04-16 15:20:36 -070080/* The internal functions */
81static void send_CPI(__u32 cpuset, __u8 cpi);
82static void ack_CPI(__u8 cpi);
83static int ack_QIC_CPI(__u8 cpi);
84static void ack_special_QIC_CPI(__u8 cpi);
85static void ack_VIC_CPI(__u8 cpi);
86static void send_CPI_allbutself(__u8 cpi);
James Bottomleyc7717462006-10-12 22:21:16 -050087static void mask_vic_irq(unsigned int irq);
88static void unmask_vic_irq(unsigned int irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070089static unsigned int startup_vic_irq(unsigned int irq);
90static void enable_local_vic_irq(unsigned int irq);
91static void disable_local_vic_irq(unsigned int irq);
92static void before_handle_vic_irq(unsigned int irq);
93static void after_handle_vic_irq(unsigned int irq);
94static void set_vic_irq_affinity(unsigned int irq, cpumask_t mask);
95static void ack_vic_irq(unsigned int irq);
96static void vic_enable_cpi(void);
97static void do_boot_cpu(__u8 cpuid);
98static void do_quad_bootstrap(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099
100int hard_smp_processor_id(void);
Fernando Vazquez2654c082006-09-30 23:29:08 -0700101int safe_smp_processor_id(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102
103/* Inline functions */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100104static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105{
106 voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi =
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100107 (smp_processor_id() << 16) + cpi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108}
109
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100110static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111{
112 int cpu;
113
114 for_each_online_cpu(cpu) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100115 if (cpuset & (1 << cpu)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116#ifdef VOYAGER_DEBUG
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100117 if (!cpu_isset(cpu, cpu_online_map))
118 VDEBUG(("CPU%d sending cpi %d to CPU%d not in "
119 "cpu_online_map\n",
120 hard_smp_processor_id(), cpi, cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121#endif
122 send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
123 }
124 }
125}
126
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100127static inline void wrapper_smp_local_timer_interrupt(void)
Dominik Hackl6431e6a2005-05-24 19:29:46 -0700128{
129 irq_enter();
David Howells7d12e782006-10-05 14:55:46 +0100130 smp_local_timer_interrupt();
Dominik Hackl6431e6a2005-05-24 19:29:46 -0700131 irq_exit();
132}
133
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100134static inline void send_one_CPI(__u8 cpu, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100136 if (voyager_quad_processors & (1 << cpu))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
138 else
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100139 send_CPI(1 << cpu, cpi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140}
141
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100142static inline void send_CPI_allbutself(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143{
144 __u8 cpu = smp_processor_id();
145 __u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu);
146 send_CPI(mask, cpi);
147}
148
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100149static inline int is_cpu_quad(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150{
151 __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
152 return ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER);
153}
154
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100155static inline int is_cpu_extended(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156{
157 __u8 cpu = hard_smp_processor_id();
158
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100159 return (voyager_extended_vic_processors & (1 << cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160}
161
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100162static inline int is_cpu_vic_boot(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163{
164 __u8 cpu = hard_smp_processor_id();
165
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100166 return (voyager_extended_vic_processors
167 & voyager_allowed_boot_processors & (1 << cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168}
169
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100170static inline void ack_CPI(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100172 switch (cpi) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173 case VIC_CPU_BOOT_CPI:
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100174 if (is_cpu_quad() && !is_cpu_vic_boot())
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 ack_QIC_CPI(cpi);
176 else
177 ack_VIC_CPI(cpi);
178 break;
179 case VIC_SYS_INT:
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100180 case VIC_CMN_INT:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 /* These are slightly strange. Even on the Quad card,
182 * They are vectored as VIC CPIs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100183 if (is_cpu_quad())
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 ack_special_QIC_CPI(cpi);
185 else
186 ack_VIC_CPI(cpi);
187 break;
188 default:
189 printk("VOYAGER ERROR: CPI%d is in common CPI code\n", cpi);
190 break;
191 }
192}
193
194/* local variables */
195
196/* The VIC IRQ descriptors -- these look almost identical to the
197 * 8259 IRQs except that masks and things must be kept per processor
198 */
James Bottomleyc7717462006-10-12 22:21:16 -0500199static struct irq_chip vic_chip = {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100200 .name = "VIC",
201 .startup = startup_vic_irq,
202 .mask = mask_vic_irq,
203 .unmask = unmask_vic_irq,
204 .set_affinity = set_vic_irq_affinity,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205};
206
207/* used to count up as CPUs are brought on line (starts at 0) */
208static int cpucount = 0;
209
210/* steal a page from the bottom of memory for the trampoline and
211 * squirrel its address away here. This will be in kernel virtual
212 * space */
213static __u32 trampoline_base;
214
215/* The per cpu profile stuff - used in smp_local_timer_interrupt */
216static DEFINE_PER_CPU(int, prof_multiplier) = 1;
217static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100218static DEFINE_PER_CPU(int, prof_counter) = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219
220/* the map used to check if a CPU has booted */
221static __u32 cpu_booted_map;
222
223/* the synchronize flag used to hold all secondary CPUs spinning in
224 * a tight loop until the boot sequence is ready for them */
225static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
226
227/* This is for the new dynamic CPU boot code */
228cpumask_t cpu_callin_map = CPU_MASK_NONE;
229cpumask_t cpu_callout_map = CPU_MASK_NONE;
Andrew Morton7a8ef1c2006-02-10 01:51:08 -0800230cpumask_t cpu_possible_map = CPU_MASK_NONE;
Zwane Mwaikambo4ad8d382005-09-03 15:56:51 -0700231EXPORT_SYMBOL(cpu_possible_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232
233/* The per processor IRQ masks (these are usually kept in sync) */
234static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
235
236/* the list of IRQs to be enabled by the VIC_ENABLE_IRQ_CPI */
237static __u16 vic_irq_enable_mask[NR_CPUS] __cacheline_aligned = { 0 };
238
239/* Lock for enable/disable of VIC interrupts */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100240static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100242/* The boot processor is correctly set up in PC mode when it
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 * comes up, but the secondaries need their master/slave 8259
244 * pairs initializing correctly */
245
246/* Interrupt counters (per cpu) and total - used to try to
247 * even up the interrupt handling routines */
248static long vic_intr_total = 0;
249static long vic_intr_count[NR_CPUS] __cacheline_aligned = { 0 };
250static unsigned long vic_tick[NR_CPUS] __cacheline_aligned = { 0 };
251
252/* Since we can only use CPI0, we fake all the other CPIs */
253static unsigned long vic_cpi_mailbox[NR_CPUS] __cacheline_aligned;
254
255/* debugging routine to read the isr of the cpu's pic */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100256static inline __u16 vic_read_isr(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257{
258 __u16 isr;
259
260 outb(0x0b, 0xa0);
261 isr = inb(0xa0) << 8;
262 outb(0x0b, 0x20);
263 isr |= inb(0x20);
264
265 return isr;
266}
267
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100268static __init void qic_setup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100270 if (!is_cpu_quad()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 /* not a quad, no setup */
272 return;
273 }
274 outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
275 outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100276
277 if (is_cpu_extended()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 /* the QIC duplicate of the VIC base register */
279 outb(VIC_DEFAULT_CPI_BASE, QIC_VIC_CPI_BASE_REGISTER);
280 outb(QIC_DEFAULT_CPI_BASE, QIC_CPI_BASE_REGISTER);
281
282 /* FIXME: should set up the QIC timer and memory parity
283 * error vectors here */
284 }
285}
286
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100287static __init void vic_setup_pic(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288{
289 outb(1, VIC_REDIRECT_REGISTER_1);
290 /* clear the claim registers for dynamic routing */
291 outb(0, VIC_CLAIM_REGISTER_0);
292 outb(0, VIC_CLAIM_REGISTER_1);
293
294 outb(0, VIC_PRIORITY_REGISTER);
295 /* Set the Primary and Secondary Microchannel vector
296 * bases to be the same as the ordinary interrupts
297 *
298 * FIXME: This would be more efficient using separate
299 * vectors. */
300 outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
301 outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
302 /* Now initiallise the master PIC belonging to this CPU by
303 * sending the four ICWs */
304
305 /* ICW1: level triggered, ICW4 needed */
306 outb(0x19, 0x20);
307
308 /* ICW2: vector base */
309 outb(FIRST_EXTERNAL_VECTOR, 0x21);
310
311 /* ICW3: slave at line 2 */
312 outb(0x04, 0x21);
313
314 /* ICW4: 8086 mode */
315 outb(0x01, 0x21);
316
317 /* now the same for the slave PIC */
318
319 /* ICW1: level trigger, ICW4 needed */
320 outb(0x19, 0xA0);
321
322 /* ICW2: slave vector base */
323 outb(FIRST_EXTERNAL_VECTOR + 8, 0xA1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100324
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325 /* ICW3: slave ID */
326 outb(0x02, 0xA1);
327
328 /* ICW4: 8086 mode */
329 outb(0x01, 0xA1);
330}
331
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100332static void do_quad_bootstrap(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100334 if (is_cpu_quad() && is_cpu_vic_boot()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 int i;
336 unsigned long flags;
337 __u8 cpuid = hard_smp_processor_id();
338
339 local_irq_save(flags);
340
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100341 for (i = 0; i < 4; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 /* FIXME: this would be >>3 &0x7 on the 32 way */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100343 if (((cpuid >> 2) & 0x03) == i)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 /* don't lower our own mask! */
345 continue;
346
347 /* masquerade as local Quad CPU */
348 outb(QIC_CPUID_ENABLE | i, QIC_PROCESSOR_ID);
349 /* enable the startup CPI */
350 outb(QIC_BOOT_CPI_MASK, QIC_MASK_REGISTER1);
351 /* restore cpu id */
352 outb(0, QIC_PROCESSOR_ID);
353 }
354 local_irq_restore(flags);
355 }
356}
357
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358/* Set up all the basic stuff: read the SMP config and make all the
359 * SMP information reflect only the boot cpu. All others will be
360 * brought on-line later. */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100361void __init find_smp_config(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362{
363 int i;
364
365 boot_cpu_id = hard_smp_processor_id();
366
367 printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
368
369 /* initialize the CPU structures (moved from smp_boot_cpus) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100370 for (i = 0; i < NR_CPUS; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 cpu_irq_affinity[i] = ~0;
372 }
373 cpu_online_map = cpumask_of_cpu(boot_cpu_id);
374
375 /* The boot CPU must be extended */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100376 voyager_extended_vic_processors = 1 << boot_cpu_id;
Simon Arlott27b46d72007-10-20 01:13:56 +0200377 /* initially, all of the first 8 CPUs can boot */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 voyager_allowed_boot_processors = 0xff;
379 /* set up everything for just this CPU, we can alter
380 * this as we start the other CPUs later */
381 /* now get the CPU disposition from the extended CMOS */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100382 cpus_addr(phys_cpu_present_map)[0] =
383 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
384 cpus_addr(phys_cpu_present_map)[0] |=
385 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
386 cpus_addr(phys_cpu_present_map)[0] |=
387 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
388 2) << 16;
389 cpus_addr(phys_cpu_present_map)[0] |=
390 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
391 3) << 24;
James Bottomleyf68a1062006-02-24 13:04:11 -0800392 cpu_possible_map = phys_cpu_present_map;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100393 printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
394 cpus_addr(phys_cpu_present_map)[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 /* Here we set up the VIC to enable SMP */
396 /* enable the CPIs by writing the base vector to their register */
397 outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
398 outb(1, VIC_REDIRECT_REGISTER_1);
399 /* set the claim registers for static routing --- Boot CPU gets
400 * all interrupts untill all other CPUs started */
401 outb(0xff, VIC_CLAIM_REGISTER_0);
402 outb(0xff, VIC_CLAIM_REGISTER_1);
403 /* Set the Primary and Secondary Microchannel vector
404 * bases to be the same as the ordinary interrupts
405 *
406 * FIXME: This would be more efficient using separate
407 * vectors. */
408 outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
409 outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
410
411 /* Finally tell the firmware that we're driving */
412 outb(inb(VOYAGER_SUS_IN_CONTROL_PORT) | VOYAGER_IN_CONTROL_FLAG,
413 VOYAGER_SUS_IN_CONTROL_PORT);
414
415 current_thread_info()->cpu = boot_cpu_id;
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700416 x86_write_percpu(cpu_number, boot_cpu_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417}
418
419/*
420 * The bootstrap kernel entry code has set these up. Save them
421 * for a given CPU, id is physical */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100422void __init smp_store_cpu_info(int id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423{
Mike Travis92cb7612007-10-19 20:35:04 +0200424 struct cpuinfo_x86 *c = &cpu_data(id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425
426 *c = boot_cpu_data;
427
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700428 identify_secondary_cpu(c);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429}
430
431/* set up the trampoline and return the physical address of the code */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100432static __u32 __init setup_trampoline(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433{
434 /* these two are global symbols in trampoline.S */
Jan Beulich121d7bf2007-10-17 18:04:37 +0200435 extern const __u8 trampoline_end[];
436 extern const __u8 trampoline_data[];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100438 memcpy((__u8 *) trampoline_base, trampoline_data,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 trampoline_end - trampoline_data);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100440 return virt_to_phys((__u8 *) trampoline_base);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441}
442
443/* Routine initially called when a non-boot CPU is brought online */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100444static void __init start_secondary(void *unused)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445{
446 __u8 cpuid = hard_smp_processor_id();
447 /* external functions not defined in the headers */
448 extern void calibrate_delay(void);
449
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700450 cpu_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451
452 /* OK, we're in the routine */
453 ack_CPI(VIC_CPU_BOOT_CPI);
454
455 /* setup the 8259 master slave pair belonging to this CPU ---
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100456 * we won't actually receive any until the boot CPU
457 * relinquishes it's static routing mask */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700458 vic_setup_pic();
459
460 qic_setup();
461
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100462 if (is_cpu_quad() && !is_cpu_vic_boot()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 /* clear the boot CPI */
464 __u8 dummy;
465
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100466 dummy =
467 voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 printk("read dummy %d\n", dummy);
469 }
470
471 /* lower the mask to receive CPIs */
472 vic_enable_cpi();
473
474 VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid));
475
476 /* enable interrupts */
477 local_irq_enable();
478
479 /* get our bogomips */
480 calibrate_delay();
481
482 /* save our processor parameters */
483 smp_store_cpu_info(cpuid);
484
485 /* if we're a quad, we may need to bootstrap other CPUs */
486 do_quad_bootstrap();
487
488 /* FIXME: this is rather a poor hack to prevent the CPU
489 * activating softirqs while it's supposed to be waiting for
490 * permission to proceed. Without this, the new per CPU stuff
491 * in the softirqs will fail */
492 local_irq_disable();
493 cpu_set(cpuid, cpu_callin_map);
494
495 /* signal that we're done */
496 cpu_booted_map = 1;
497
498 while (!cpu_isset(cpuid, smp_commenced_mask))
499 rep_nop();
500 local_irq_enable();
501
502 local_flush_tlb();
503
504 cpu_set(cpuid, cpu_online_map);
505 wmb();
506 cpu_idle();
507}
508
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509/* Routine to kick start the given CPU and wait for it to report ready
510 * (or timeout in startup). When this routine returns, the requested
511 * CPU is either fully running and configured or known to be dead.
512 *
513 * We call this routine sequentially 1 CPU at a time, so no need for
514 * locking */
515
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100516static void __init do_boot_cpu(__u8 cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517{
518 struct task_struct *idle;
519 int timeout;
520 unsigned long flags;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100521 int quad_boot = (1 << cpu) & voyager_quad_processors
522 & ~(voyager_extended_vic_processors
523 & voyager_allowed_boot_processors);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 /* This is an area in head.S which was used to set up the
526 * initial kernel stack. We need to alter this to give the
527 * booting CPU a new stack (taken from its idle process) */
528 extern struct {
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100529 __u8 *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 unsigned short ss;
531 } stack_start;
532 /* This is the format of the CPI IDT gate (in real mode) which
533 * we're hijacking to boot the CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100534 union IDTFormat {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 struct seg {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100536 __u16 Offset;
537 __u16 Segment;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 } idt;
539 __u32 val;
540 } hijack_source;
541
542 __u32 *hijack_vector;
543 __u32 start_phys_address = setup_trampoline();
544
545 /* There's a clever trick to this: The linux trampoline is
546 * compiled to begin at absolute location zero, so make the
547 * address zero but have the data segment selector compensate
548 * for the actual address */
549 hijack_source.idt.Offset = start_phys_address & 0x000F;
550 hijack_source.idt.Segment = (start_phys_address >> 4) & 0xFFFF;
551
552 cpucount++;
James Bottomleyd6444512007-05-01 10:13:46 -0500553 alternatives_smp_switch(1);
554
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 idle = fork_idle(cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100556 if (IS_ERR(idle))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700557 panic("failed fork for CPU%d", cpu);
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100558 idle->thread.ip = (unsigned long)start_secondary;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 /* init_tasks (in sched.c) is indexed logically */
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100560 stack_start.sp = (void *)idle->thread.sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700562 init_gdt(cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100563 per_cpu(current_task, cpu) = idle;
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700564 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 irq_ctx_init(cpu);
566
567 /* Note: Don't modify initial ss override */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100568 VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569 (unsigned long)hijack_source.val, hijack_source.idt.Segment,
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100570 hijack_source.idt.Offset, stack_start.sp));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
Eric W. Biederman9d0e59a2007-04-30 09:57:40 -0600572 /* init lowmem identity mapping */
573 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
574 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
575 flush_tlb_all();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100577 if (quad_boot) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 printk("CPU %d: non extended Quad boot\n", cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100579 hijack_vector =
580 (__u32 *)
581 phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE) * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 *hijack_vector = hijack_source.val;
583 } else {
584 printk("CPU%d: extended VIC boot\n", cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100585 hijack_vector =
586 (__u32 *)
587 phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE) * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 *hijack_vector = hijack_source.val;
589 /* VIC errata, may also receive interrupt at this address */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100590 hijack_vector =
591 (__u32 *)
592 phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI +
593 VIC_DEFAULT_CPI_BASE) * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594 *hijack_vector = hijack_source.val;
595 }
596 /* All non-boot CPUs start with interrupts fully masked. Need
597 * to lower the mask of the CPI we're about to send. We do
598 * this in the VIC by masquerading as the processor we're
599 * about to boot and lowering its interrupt mask */
600 local_irq_save(flags);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100601 if (quad_boot) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI);
603 } else {
604 outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
605 /* here we're altering registers belonging to `cpu' */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100606
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 outb(VIC_BOOT_INTERRUPT_MASK, 0x21);
608 /* now go back to our original identity */
609 outb(boot_cpu_id, VIC_PROCESSOR_ID);
610
611 /* and boot the CPU */
612
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100613 send_CPI((1 << cpu), VIC_CPU_BOOT_CPI);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 }
615 cpu_booted_map = 0;
616 local_irq_restore(flags);
617
618 /* now wait for it to become ready (or timeout) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100619 for (timeout = 0; timeout < 50000; timeout++) {
620 if (cpu_booted_map)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621 break;
622 udelay(100);
623 }
624 /* reset the page table */
Eric W. Biederman9d0e59a2007-04-30 09:57:40 -0600625 zap_low_mappings();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100626
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627 if (cpu_booted_map) {
628 VDEBUG(("CPU%d: Booted successfully, back in CPU %d\n",
629 cpu, smp_processor_id()));
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100630
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631 printk("CPU%d: ", cpu);
Mike Travis92cb7612007-10-19 20:35:04 +0200632 print_cpu_info(&cpu_data(cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633 wmb();
634 cpu_set(cpu, cpu_callout_map);
James Bottomley3c101cf2006-06-26 21:33:09 -0500635 cpu_set(cpu, cpu_present_map);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100636 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 printk("CPU%d FAILED TO BOOT: ", cpu);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100638 if (*
639 ((volatile unsigned char *)phys_to_virt(start_phys_address))
640 == 0xA5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641 printk("Stuck.\n");
642 else
643 printk("Not responding.\n");
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100644
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645 cpucount--;
646 }
647}
648
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100649void __init smp_boot_cpus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650{
651 int i;
652
653 /* CAT BUS initialisation must be done after the memory */
654 /* FIXME: The L4 has a catbus too, it just needs to be
655 * accessed in a totally different way */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100656 if (voyager_level == 5) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700657 voyager_cat_init();
658
659 /* now that the cat has probed the Voyager System Bus, sanity
660 * check the cpu map */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100661 if (((voyager_quad_processors | voyager_extended_vic_processors)
662 & cpus_addr(phys_cpu_present_map)[0]) !=
663 cpus_addr(phys_cpu_present_map)[0]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 /* should panic */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100665 printk("\n\n***WARNING*** "
666 "Sanity check of CPU present map FAILED\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100668 } else if (voyager_level == 4)
669 voyager_extended_vic_processors =
670 cpus_addr(phys_cpu_present_map)[0];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671
672 /* this sets up the idle task to run on the current cpu */
673 voyager_extended_cpus = 1;
674 /* Remove the global_irq_holder setting, it triggers a BUG() on
675 * schedule at the moment */
676 //global_irq_holder = boot_cpu_id;
677
678 /* FIXME: Need to do something about this but currently only works
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100679 * on CPUs with a tsc which none of mine have.
680 smp_tune_scheduling();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 */
682 smp_store_cpu_info(boot_cpu_id);
683 printk("CPU%d: ", boot_cpu_id);
Mike Travis92cb7612007-10-19 20:35:04 +0200684 print_cpu_info(&cpu_data(boot_cpu_id));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100686 if (is_cpu_quad()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 /* booting on a Quad CPU */
688 printk("VOYAGER SMP: Boot CPU is Quad\n");
689 qic_setup();
690 do_quad_bootstrap();
691 }
692
693 /* enable our own CPIs */
694 vic_enable_cpi();
695
696 cpu_set(boot_cpu_id, cpu_online_map);
697 cpu_set(boot_cpu_id, cpu_callout_map);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100698
699 /* loop over all the extended VIC CPUs and boot them. The
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 * Quad CPUs must be bootstrapped by their extended VIC cpu */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100701 for (i = 0; i < NR_CPUS; i++) {
702 if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 continue;
704 do_boot_cpu(i);
705 /* This udelay seems to be needed for the Quad boots
706 * don't remove unless you know what you're doing */
707 udelay(1000);
708 }
709 /* we could compute the total bogomips here, but why bother?,
710 * Code added from smpboot.c */
711 {
712 unsigned long bogosum = 0;
713 for (i = 0; i < NR_CPUS; i++)
714 if (cpu_isset(i, cpu_online_map))
Mike Travis92cb7612007-10-19 20:35:04 +0200715 bogosum += cpu_data(i).loops_per_jiffy;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100716 printk(KERN_INFO "Total of %d processors activated "
717 "(%lu.%02lu BogoMIPS).\n",
718 cpucount + 1, bogosum / (500000 / HZ),
719 (bogosum / (5000 / HZ)) % 100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720 }
721 voyager_extended_cpus = hweight32(voyager_extended_vic_processors);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100722 printk("VOYAGER: Extended (interrupt handling CPUs): "
723 "%d, non-extended: %d\n", voyager_extended_cpus,
724 num_booting_cpus() - voyager_extended_cpus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725 /* that's it, switch to symmetric mode */
726 outb(0, VIC_PRIORITY_REGISTER);
727 outb(0, VIC_CLAIM_REGISTER_0);
728 outb(0, VIC_CLAIM_REGISTER_1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100729
Linus Torvalds1da177e2005-04-16 15:20:36 -0700730 VDEBUG(("VOYAGER SMP: Booted with %d CPUs\n", num_booting_cpus()));
731}
732
733/* Reload the secondary CPUs task structure (this function does not
734 * return ) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100735void __init initialize_secondary(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736{
737#if 0
738 // AC kernels only
739 set_current(hard_get_current());
740#endif
741
742 /*
743 * We don't actually need to load the full TSS,
744 * basically just the stack pointer and the eip.
745 */
746
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100747 asm volatile ("movl %0,%%esp\n\t"
H. Peter Anvin65ea5b02008-01-30 13:30:56 +0100748 "jmp *%1"::"r" (current->thread.sp),
749 "r"(current->thread.ip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750}
751
752/* handle a Voyager SYS_INT -- If we don't, the base board will
753 * panic the system.
754 *
755 * System interrupts occur because some problem was detected on the
756 * various busses. To find out what you have to probe all the
757 * hardware via the CAT bus. FIXME: At the moment we do nothing. */
Harvey Harrison75604d72008-01-30 13:31:17 +0100758void smp_vic_sys_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700759{
760 ack_CPI(VIC_SYS_INT);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100761 printk("Voyager SYSTEM INTERRUPT\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762}
763
764/* Handle a voyager CMN_INT; These interrupts occur either because of
765 * a system status change or because a single bit memory error
766 * occurred. FIXME: At the moment, ignore all this. */
Harvey Harrison75604d72008-01-30 13:31:17 +0100767void smp_vic_cmn_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768{
769 static __u8 in_cmn_int = 0;
770 static DEFINE_SPINLOCK(cmn_int_lock);
771
772 /* common ints are broadcast, so make sure we only do this once */
773 _raw_spin_lock(&cmn_int_lock);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100774 if (in_cmn_int)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700775 goto unlock_end;
776
777 in_cmn_int++;
778 _raw_spin_unlock(&cmn_int_lock);
779
780 VDEBUG(("Voyager COMMON INTERRUPT\n"));
781
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100782 if (voyager_level == 5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700783 voyager_cat_do_common_interrupt();
784
785 _raw_spin_lock(&cmn_int_lock);
786 in_cmn_int = 0;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100787 unlock_end:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788 _raw_spin_unlock(&cmn_int_lock);
789 ack_CPI(VIC_CMN_INT);
790}
791
792/*
793 * Reschedule call back. Nothing to do, all the work is done
794 * automatically when we return from the interrupt. */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100795static void smp_reschedule_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796{
797 /* do nothing */
798}
799
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100800static struct mm_struct *flush_mm;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801static unsigned long flush_va;
802static DEFINE_SPINLOCK(tlbstate_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803
804/*
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100805 * We cannot call mmdrop() because we are in interrupt context,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700806 * instead update mm->cpu_vm_mask.
807 *
808 * We need to reload %cr3 since the page tables may be going
809 * away from under us..
810 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100811static inline void leave_mm(unsigned long cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812{
813 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
814 BUG();
815 cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
816 load_cr3(swapper_pg_dir);
817}
818
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819/*
820 * Invalidate call-back
821 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100822static void smp_invalidate_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823{
824 __u8 cpu = smp_processor_id();
825
826 if (!test_bit(cpu, &smp_invalidate_needed))
827 return;
828 /* This will flood messages. Don't uncomment unless you see
829 * Problems with cross cpu invalidation
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100830 VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
831 smp_processor_id()));
832 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833
834 if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
835 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
Thomas Gleixner0b9c99b2008-01-30 13:30:35 +0100836 if (flush_va == TLB_FLUSH_ALL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 local_flush_tlb();
838 else
839 __flush_tlb_one(flush_va);
840 } else
841 leave_mm(cpu);
842 }
843 smp_mb__before_clear_bit();
844 clear_bit(cpu, &smp_invalidate_needed);
845 smp_mb__after_clear_bit();
846}
847
848/* All the new flush operations for 2.4 */
849
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850/* This routine is called with a physical cpu mask */
851static void
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100852voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm,
853 unsigned long va)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854{
855 int stuck = 50000;
856
857 if (!cpumask)
858 BUG();
859 if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask)
860 BUG();
861 if (cpumask & (1 << smp_processor_id()))
862 BUG();
863 if (!mm)
864 BUG();
865
866 spin_lock(&tlbstate_lock);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100867
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 flush_mm = mm;
869 flush_va = va;
870 atomic_set_mask(cpumask, &smp_invalidate_needed);
871 /*
872 * We have to send the CPI only to
873 * CPUs affected.
874 */
875 send_CPI(cpumask, VIC_INVALIDATE_CPI);
876
877 while (smp_invalidate_needed) {
878 mb();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100879 if (--stuck == 0) {
880 printk("***WARNING*** Stuck doing invalidate CPI "
881 "(CPU%d)\n", smp_processor_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882 break;
883 }
884 }
885
886 /* Uncomment only to debug invalidation problems
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100887 VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
888 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889
890 flush_mm = NULL;
891 flush_va = 0;
892 spin_unlock(&tlbstate_lock);
893}
894
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100895void flush_tlb_current_task(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896{
897 struct mm_struct *mm = current->mm;
898 unsigned long cpu_mask;
899
900 preempt_disable();
901
902 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
903 local_flush_tlb();
904 if (cpu_mask)
Thomas Gleixner0b9c99b2008-01-30 13:30:35 +0100905 voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700906
907 preempt_enable();
908}
909
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100910void flush_tlb_mm(struct mm_struct *mm)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911{
912 unsigned long cpu_mask;
913
914 preempt_disable();
915
916 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
917
918 if (current->active_mm == mm) {
919 if (current->mm)
920 local_flush_tlb();
921 else
922 leave_mm(smp_processor_id());
923 }
924 if (cpu_mask)
Thomas Gleixner0b9c99b2008-01-30 13:30:35 +0100925 voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926
927 preempt_enable();
928}
929
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100930void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931{
932 struct mm_struct *mm = vma->vm_mm;
933 unsigned long cpu_mask;
934
935 preempt_disable();
936
937 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
938 if (current->active_mm == mm) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100939 if (current->mm)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 __flush_tlb_one(va);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100941 else
942 leave_mm(smp_processor_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700943 }
944
945 if (cpu_mask)
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -0700946 voyager_flush_tlb_others(cpu_mask, mm, va);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947
948 preempt_enable();
949}
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100950
James Bottomley153f8052005-07-13 09:38:05 -0400951EXPORT_SYMBOL(flush_tlb_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952
953/* enable the requested IRQs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100954static void smp_enable_irq_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955{
956 __u8 irq;
957 __u8 cpu = get_cpu();
958
959 VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu,
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100960 vic_irq_enable_mask[cpu]));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961
962 spin_lock(&vic_irq_lock);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100963 for (irq = 0; irq < 16; irq++) {
964 if (vic_irq_enable_mask[cpu] & (1 << irq))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965 enable_local_vic_irq(irq);
966 }
967 vic_irq_enable_mask[cpu] = 0;
968 spin_unlock(&vic_irq_lock);
969
970 put_cpu_no_resched();
971}
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100972
Linus Torvalds1da177e2005-04-16 15:20:36 -0700973/*
974 * CPU halt call-back
975 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100976static void smp_stop_cpu_function(void *dummy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977{
978 VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id()));
979 cpu_clear(smp_processor_id(), cpu_online_map);
980 local_irq_disable();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100981 for (;;)
Zachary Amsdenf2ab4462005-09-03 15:56:42 -0700982 halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983}
984
985static DEFINE_SPINLOCK(call_lock);
986
987struct call_data_struct {
988 void (*func) (void *info);
989 void *info;
990 volatile unsigned long started;
991 volatile unsigned long finished;
992 int wait;
993};
994
Ingo Molnara4ec1ef2008-01-30 13:30:10 +0100995static struct call_data_struct *call_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700996
997/* execute a thread on a new CPU. The function to be called must be
998 * previously set up. This is used to schedule a function for
Simon Arlott27b46d72007-10-20 01:13:56 +0200999 * execution on all CPUs - set up the function then broadcast a
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000 * function_interrupt CPI to come here on each CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001001static void smp_call_function_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002{
1003 void (*func) (void *info) = call_data->func;
1004 void *info = call_data->info;
1005 /* must take copy of wait because call_data may be replaced
1006 * unless the function is waiting for us to finish */
1007 int wait = call_data->wait;
1008 __u8 cpu = smp_processor_id();
1009
1010 /*
1011 * Notify initiating CPU that I've grabbed the data and am
1012 * about to execute the function
1013 */
1014 mb();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001015 if (!test_and_clear_bit(cpu, &call_data->started)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016 /* If the bit wasn't set, this could be a replay */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001017 printk(KERN_WARNING "VOYAGER SMP: CPU %d received call funtion"
1018 " with no call pending\n", cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019 return;
1020 }
1021 /*
1022 * At this point the info structure may be out of scope unless wait==1
1023 */
1024 irq_enter();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001025 (*func) (info);
Joe Korty38e760a2007-10-17 18:04:40 +02001026 __get_cpu_var(irq_stat).irq_call_count++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027 irq_exit();
1028 if (wait) {
1029 mb();
1030 clear_bit(cpu, &call_data->finished);
1031 }
1032}
1033
James Bottomley0293ca82007-04-30 11:24:05 -05001034static int
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001035voyager_smp_call_function_mask(cpumask_t cpumask,
1036 void (*func) (void *info), void *info, int wait)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001037{
1038 struct call_data_struct data;
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001039 u32 mask = cpus_addr(cpumask)[0];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001041 mask &= ~(1 << smp_processor_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042
1043 if (!mask)
1044 return 0;
1045
1046 /* Can deadlock when called with interrupts disabled */
1047 WARN_ON(irqs_disabled());
1048
1049 data.func = func;
1050 data.info = info;
1051 data.started = mask;
1052 data.wait = wait;
1053 if (wait)
1054 data.finished = mask;
1055
1056 spin_lock(&call_lock);
1057 call_data = &data;
1058 wmb();
1059 /* Send a message to all other CPUs and wait for them to respond */
James Bottomley0293ca82007-04-30 11:24:05 -05001060 send_CPI(mask, VIC_CALL_FUNCTION_CPI);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061
1062 /* Wait for response */
1063 while (data.started)
1064 barrier();
1065
1066 if (wait)
1067 while (data.finished)
1068 barrier();
1069
1070 spin_unlock(&call_lock);
1071
1072 return 0;
1073}
James Bottomley0293ca82007-04-30 11:24:05 -05001074
Linus Torvalds1da177e2005-04-16 15:20:36 -07001075/* Sorry about the name. In an APIC based system, the APICs
1076 * themselves are programmed to send a timer interrupt. This is used
1077 * by linux to reschedule the processor. Voyager doesn't have this,
1078 * so we use the system clock to interrupt one processor, which in
1079 * turn, broadcasts a timer CPI to all the others --- we receive that
1080 * CPI here. We don't use this actually for counting so losing
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001081 * ticks doesn't matter
Linus Torvalds1da177e2005-04-16 15:20:36 -07001082 *
Simon Arlott27b46d72007-10-20 01:13:56 +02001083 * FIXME: For those CPUs which actually have a local APIC, we could
Linus Torvalds1da177e2005-04-16 15:20:36 -07001084 * try to use it to trigger this interrupt instead of having to
1085 * broadcast the timer tick. Unfortunately, all my pentium DYADs have
1086 * no local APIC, so I can't do this
1087 *
1088 * This function is currently a placeholder and is unused in the code */
Harvey Harrison75604d72008-01-30 13:31:17 +01001089void smp_apic_timer_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001090{
David Howells7d12e782006-10-05 14:55:46 +01001091 struct pt_regs *old_regs = set_irq_regs(regs);
1092 wrapper_smp_local_timer_interrupt();
1093 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001094}
1095
1096/* All of the QUAD interrupt GATES */
Harvey Harrison75604d72008-01-30 13:31:17 +01001097void smp_qic_timer_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001098{
David Howells7d12e782006-10-05 14:55:46 +01001099 struct pt_regs *old_regs = set_irq_regs(regs);
James Bottomley81c06b12006-10-12 22:25:03 -05001100 ack_QIC_CPI(QIC_TIMER_CPI);
1101 wrapper_smp_local_timer_interrupt();
David Howells7d12e782006-10-05 14:55:46 +01001102 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001103}
1104
Harvey Harrison75604d72008-01-30 13:31:17 +01001105void smp_qic_invalidate_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001106{
1107 ack_QIC_CPI(QIC_INVALIDATE_CPI);
1108 smp_invalidate_interrupt();
1109}
1110
Harvey Harrison75604d72008-01-30 13:31:17 +01001111void smp_qic_reschedule_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001112{
1113 ack_QIC_CPI(QIC_RESCHEDULE_CPI);
1114 smp_reschedule_interrupt();
1115}
1116
Harvey Harrison75604d72008-01-30 13:31:17 +01001117void smp_qic_enable_irq_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001118{
1119 ack_QIC_CPI(QIC_ENABLE_IRQ_CPI);
1120 smp_enable_irq_interrupt();
1121}
1122
Harvey Harrison75604d72008-01-30 13:31:17 +01001123void smp_qic_call_function_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124{
1125 ack_QIC_CPI(QIC_CALL_FUNCTION_CPI);
1126 smp_call_function_interrupt();
1127}
1128
Harvey Harrison75604d72008-01-30 13:31:17 +01001129void smp_vic_cpi_interrupt(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001130{
David Howells7d12e782006-10-05 14:55:46 +01001131 struct pt_regs *old_regs = set_irq_regs(regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001132 __u8 cpu = smp_processor_id();
1133
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001134 if (is_cpu_quad())
Linus Torvalds1da177e2005-04-16 15:20:36 -07001135 ack_QIC_CPI(VIC_CPI_LEVEL0);
1136 else
1137 ack_VIC_CPI(VIC_CPI_LEVEL0);
1138
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001139 if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
David Howells7d12e782006-10-05 14:55:46 +01001140 wrapper_smp_local_timer_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001141 if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001142 smp_invalidate_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001143 if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001144 smp_reschedule_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001145 if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146 smp_enable_irq_interrupt();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001147 if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001148 smp_call_function_interrupt();
David Howells7d12e782006-10-05 14:55:46 +01001149 set_irq_regs(old_regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150}
1151
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001152static void do_flush_tlb_all(void *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001153{
1154 unsigned long cpu = smp_processor_id();
1155
1156 __flush_tlb_all();
1157 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY)
1158 leave_mm(cpu);
1159}
1160
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161/* flush the TLB of every active CPU in the system */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001162void flush_tlb_all(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001163{
1164 on_each_cpu(do_flush_tlb_all, 0, 1, 1);
1165}
1166
1167/* used to set up the trampoline for other CPUs when the memory manager
1168 * is sorted out */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001169void __init smp_alloc_memory(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001170{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001171 trampoline_base = (__u32) alloc_bootmem_low_pages(PAGE_SIZE);
1172 if (__pa(trampoline_base) >= 0x93000)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001173 BUG();
1174}
1175
1176/* send a reschedule CPI to one CPU by physical CPU number*/
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001177static void voyager_smp_send_reschedule(int cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178{
1179 send_one_CPI(cpu, VIC_RESCHEDULE_CPI);
1180}
1181
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001182int hard_smp_processor_id(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183{
1184 __u8 i;
1185 __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001186 if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001187 return cpumask & 0x1F;
1188
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001189 for (i = 0; i < 8; i++) {
1190 if (cpumask & (1 << i))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191 return i;
1192 }
1193 printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
1194 return 0;
1195}
1196
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001197int safe_smp_processor_id(void)
Fernando Vazquez2654c082006-09-30 23:29:08 -07001198{
1199 return hard_smp_processor_id();
1200}
1201
Linus Torvalds1da177e2005-04-16 15:20:36 -07001202/* broadcast a halt to all other CPUs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001203static void voyager_smp_send_stop(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204{
1205 smp_call_function(smp_stop_cpu_function, NULL, 1, 1);
1206}
1207
1208/* this function is triggered in time.c when a clock tick fires
1209 * we need to re-broadcast the tick to all CPUs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001210void smp_vic_timer_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001211{
1212 send_CPI_allbutself(VIC_TIMER_CPI);
David Howells7d12e782006-10-05 14:55:46 +01001213 smp_local_timer_interrupt();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001214}
1215
Linus Torvalds1da177e2005-04-16 15:20:36 -07001216/* local (per CPU) timer interrupt. It does both profiling and
1217 * process statistics/rescheduling.
1218 *
1219 * We do profiling in every local tick, statistics/rescheduling
1220 * happen only every 'profiling multiplier' ticks. The default
1221 * multiplier is 1 and it can be changed by writing the new multiplier
1222 * value into /proc/profile.
1223 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001224void smp_local_timer_interrupt(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001225{
1226 int cpu = smp_processor_id();
1227 long weight;
1228
David Howells7d12e782006-10-05 14:55:46 +01001229 profile_tick(CPU_PROFILING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001230 if (--per_cpu(prof_counter, cpu) <= 0) {
1231 /*
1232 * The multiplier may have changed since the last time we got
1233 * to this point as a result of the user writing to
1234 * /proc/profile. In this case we need to adjust the APIC
1235 * timer accordingly.
1236 *
1237 * Interrupts are already masked off at this point.
1238 */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001239 per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001240 if (per_cpu(prof_counter, cpu) !=
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001241 per_cpu(prof_old_multiplier, cpu)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001242 /* FIXME: need to update the vic timer tick here */
1243 per_cpu(prof_old_multiplier, cpu) =
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001244 per_cpu(prof_counter, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245 }
1246
James Bottomley81c06b12006-10-12 22:25:03 -05001247 update_process_times(user_mode_vm(get_irq_regs()));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001248 }
1249
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001250 if (((1 << cpu) & voyager_extended_vic_processors) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001251 /* only extended VIC processors participate in
1252 * interrupt distribution */
1253 return;
1254
1255 /*
1256 * We take the 'long' return path, and there every subsystem
Simon Arlott27b46d72007-10-20 01:13:56 +02001257 * grabs the appropriate locks (kernel lock/ irq lock).
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258 *
1259 * we might want to decouple profiling from the 'long path',
1260 * and do the profiling totally in assembly.
1261 *
1262 * Currently this isn't too much of an issue (performance wise),
1263 * we can take more than 100K local irqs per second on a 100 MHz P5.
1264 */
1265
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001266 if ((++vic_tick[cpu] & 0x7) != 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001267 return;
1268 /* get here every 16 ticks (about every 1/6 of a second) */
1269
1270 /* Change our priority to give someone else a chance at getting
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001271 * the IRQ. The algorithm goes like this:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001272 *
1273 * In the VIC, the dynamically routed interrupt is always
1274 * handled by the lowest priority eligible (i.e. receiving
1275 * interrupts) CPU. If >1 eligible CPUs are equal lowest, the
1276 * lowest processor number gets it.
1277 *
1278 * The priority of a CPU is controlled by a special per-CPU
1279 * VIC priority register which is 3 bits wide 0 being lowest
1280 * and 7 highest priority..
1281 *
1282 * Therefore we subtract the average number of interrupts from
1283 * the number we've fielded. If this number is negative, we
1284 * lower the activity count and if it is positive, we raise
1285 * it.
1286 *
1287 * I'm afraid this still leads to odd looking interrupt counts:
1288 * the totals are all roughly equal, but the individual ones
1289 * look rather skewed.
1290 *
1291 * FIXME: This algorithm is total crap when mixed with SMP
1292 * affinity code since we now try to even up the interrupt
1293 * counts when an affinity binding is keeping them on a
1294 * particular CPU*/
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001295 weight = (vic_intr_count[cpu] * voyager_extended_cpus
Linus Torvalds1da177e2005-04-16 15:20:36 -07001296 - vic_intr_total) >> 4;
1297 weight += 4;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001298 if (weight > 7)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001299 weight = 7;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001300 if (weight < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001301 weight = 0;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001302
1303 outb((__u8) weight, VIC_PRIORITY_REGISTER);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001304
1305#ifdef VOYAGER_DEBUG
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001306 if ((vic_tick[cpu] & 0xFFF) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001307 /* print this message roughly every 25 secs */
1308 printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n",
1309 cpu, vic_tick[cpu], weight);
1310 }
1311#endif
1312}
1313
1314/* setup the profiling timer */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001315int setup_profiling_timer(unsigned int multiplier)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001316{
1317 int i;
1318
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001319 if ((!multiplier))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001320 return -EINVAL;
1321
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001322 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001323 * Set the new multiplier for each CPU. CPUs don't start using the
1324 * new values until the next timer interrupt in which they do process
1325 * accounting.
1326 */
1327 for (i = 0; i < NR_CPUS; ++i)
1328 per_cpu(prof_multiplier, i) = multiplier;
1329
1330 return 0;
1331}
1332
James Bottomleyc7717462006-10-12 22:21:16 -05001333/* This is a bit of a mess, but forced on us by the genirq changes
1334 * there's no genirq handler that really does what voyager wants
1335 * so hack it up with the simple IRQ handler */
Harvey Harrison75604d72008-01-30 13:31:17 +01001336static void handle_vic_irq(unsigned int irq, struct irq_desc *desc)
James Bottomleyc7717462006-10-12 22:21:16 -05001337{
1338 before_handle_vic_irq(irq);
1339 handle_simple_irq(irq, desc);
1340 after_handle_vic_irq(irq);
1341}
1342
Linus Torvalds1da177e2005-04-16 15:20:36 -07001343/* The CPIs are handled in the per cpu 8259s, so they must be
1344 * enabled to be received: FIX: enabling the CPIs in the early
1345 * boot sequence interferes with bug checking; enable them later
1346 * on in smp_init */
1347#define VIC_SET_GATE(cpi, vector) \
1348 set_intr_gate((cpi) + VIC_DEFAULT_CPI_BASE, (vector))
1349#define QIC_SET_GATE(cpi, vector) \
1350 set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
1351
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001352void __init smp_intr_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001353{
1354 int i;
1355
1356 /* initialize the per cpu irq mask to all disabled */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001357 for (i = 0; i < NR_CPUS; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001358 vic_irq_mask[i] = 0xFFFF;
1359
1360 VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt);
1361
1362 VIC_SET_GATE(VIC_SYS_INT, vic_sys_interrupt);
1363 VIC_SET_GATE(VIC_CMN_INT, vic_cmn_interrupt);
1364
1365 QIC_SET_GATE(QIC_TIMER_CPI, qic_timer_interrupt);
1366 QIC_SET_GATE(QIC_INVALIDATE_CPI, qic_invalidate_interrupt);
1367 QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt);
1368 QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt);
1369 QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001370
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001371 /* now put the VIC descriptor into the first 48 IRQs
Linus Torvalds1da177e2005-04-16 15:20:36 -07001372 *
1373 * This is for later: first 16 correspond to PC IRQs; next 16
1374 * are Primary MC IRQs and final 16 are Secondary MC IRQs */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001375 for (i = 0; i < 48; i++)
James Bottomleyc7717462006-10-12 22:21:16 -05001376 set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001377}
1378
1379/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
1380 * processor to receive CPI */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001381static void send_CPI(__u32 cpuset, __u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001382{
1383 int cpu;
1384 __u32 quad_cpuset = (cpuset & voyager_quad_processors);
1385
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001386 if (cpi < VIC_START_FAKE_CPI) {
1387 /* fake CPI are only used for booting, so send to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 * extended quads as well---Quads must be VIC booted */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001389 outb((__u8) (cpuset), VIC_CPI_Registers[cpi]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390 return;
1391 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001392 if (quad_cpuset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001393 send_QIC_CPI(quad_cpuset, cpi);
1394 cpuset &= ~quad_cpuset;
1395 cpuset &= 0xff; /* only first 8 CPUs vaild for VIC CPI */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001396 if (cpuset == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001397 return;
1398 for_each_online_cpu(cpu) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001399 if (cpuset & (1 << cpu))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001400 set_bit(cpi, &vic_cpi_mailbox[cpu]);
1401 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001402 if (cpuset)
1403 outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001404}
1405
1406/* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
1407 * set the cache line to shared by reading it.
1408 *
1409 * DON'T make this inline otherwise the cache line read will be
1410 * optimised away
1411 * */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001412static int ack_QIC_CPI(__u8 cpi)
1413{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414 __u8 cpu = hard_smp_processor_id();
1415
1416 cpi &= 7;
1417
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001418 outb(1 << cpi, QIC_INTERRUPT_CLEAR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419 return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi;
1420}
1421
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001422static void ack_special_QIC_CPI(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001423{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001424 switch (cpi) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001425 case VIC_CMN_INT:
1426 outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0);
1427 break;
1428 case VIC_SYS_INT:
1429 outb(QIC_SYS_INT, QIC_INTERRUPT_CLEAR0);
1430 break;
1431 }
1432 /* also clear at the VIC, just in case (nop for non-extended proc) */
1433 ack_VIC_CPI(cpi);
1434}
1435
1436/* Acknowledge receipt of CPI in the VIC (essentially an EOI) */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001437static void ack_VIC_CPI(__u8 cpi)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001438{
1439#ifdef VOYAGER_DEBUG
1440 unsigned long flags;
1441 __u16 isr;
1442 __u8 cpu = smp_processor_id();
1443
1444 local_irq_save(flags);
1445 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001446 if ((isr & (1 << (cpi & 7))) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001447 printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi);
1448 }
1449#endif
1450 /* send specific EOI; the two system interrupts have
1451 * bit 4 set for a separate vector but behave as the
1452 * corresponding 3 bit intr */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001453 outb_p(0x60 | (cpi & 7), 0x20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001454
1455#ifdef VOYAGER_DEBUG
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001456 if ((vic_read_isr() & (1 << (cpi & 7))) != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001457 printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi);
1458 }
1459 local_irq_restore(flags);
1460#endif
1461}
1462
1463/* cribbed with thanks from irq.c */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001464#define __byte(x,y) (((unsigned char *)&(y))[x])
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465#define cached_21(cpu) (__byte(0,vic_irq_mask[cpu]))
1466#define cached_A1(cpu) (__byte(1,vic_irq_mask[cpu]))
1467
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001468static unsigned int startup_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001469{
James Bottomleyc7717462006-10-12 22:21:16 -05001470 unmask_vic_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001471
1472 return 0;
1473}
1474
1475/* The enable and disable routines. This is where we run into
1476 * conflicting architectural philosophy. Fundamentally, the voyager
1477 * architecture does not expect to have to disable interrupts globally
1478 * (the IRQ controllers belong to each CPU). The processor masquerade
1479 * which is used to start the system shouldn't be used in a running OS
1480 * since it will cause great confusion if two separate CPUs drive to
1481 * the same IRQ controller (I know, I've tried it).
1482 *
1483 * The solution is a variant on the NCR lazy SPL design:
1484 *
1485 * 1) To disable an interrupt, do nothing (other than set the
1486 * IRQ_DISABLED flag). This dares the interrupt actually to arrive.
1487 *
1488 * 2) If the interrupt dares to come in, raise the local mask against
1489 * it (this will result in all the CPU masks being raised
1490 * eventually).
1491 *
1492 * 3) To enable the interrupt, lower the mask on the local CPU and
1493 * broadcast an Interrupt enable CPI which causes all other CPUs to
1494 * adjust their masks accordingly. */
1495
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001496static void unmask_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001497{
1498 /* linux doesn't to processor-irq affinity, so enable on
1499 * all CPUs we know about */
1500 int cpu = smp_processor_id(), real_cpu;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001501 __u16 mask = (1 << irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001502 __u32 processorList = 0;
1503 unsigned long flags;
1504
James Bottomleyc7717462006-10-12 22:21:16 -05001505 VDEBUG(("VOYAGER: unmask_vic_irq(%d) CPU%d affinity 0x%lx\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001506 irq, cpu, cpu_irq_affinity[cpu]));
1507 spin_lock_irqsave(&vic_irq_lock, flags);
1508 for_each_online_cpu(real_cpu) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001509 if (!(voyager_extended_vic_processors & (1 << real_cpu)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001510 continue;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001511 if (!(cpu_irq_affinity[real_cpu] & mask)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001512 /* irq has no affinity for this CPU, ignore */
1513 continue;
1514 }
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001515 if (real_cpu == cpu) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001516 enable_local_vic_irq(irq);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001517 } else if (vic_irq_mask[real_cpu] & mask) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001518 vic_irq_enable_mask[real_cpu] |= mask;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001519 processorList |= (1 << real_cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001520 }
1521 }
1522 spin_unlock_irqrestore(&vic_irq_lock, flags);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001523 if (processorList)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001524 send_CPI(processorList, VIC_ENABLE_IRQ_CPI);
1525}
1526
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001527static void mask_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001528{
1529 /* lazy disable, do nothing */
1530}
1531
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001532static void enable_local_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001533{
1534 __u8 cpu = smp_processor_id();
1535 __u16 mask = ~(1 << irq);
1536 __u16 old_mask = vic_irq_mask[cpu];
1537
1538 vic_irq_mask[cpu] &= mask;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001539 if (vic_irq_mask[cpu] == old_mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001540 return;
1541
1542 VDEBUG(("VOYAGER DEBUG: Enabling irq %d in hardware on CPU %d\n",
1543 irq, cpu));
1544
1545 if (irq & 8) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001546 outb_p(cached_A1(cpu), 0xA1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547 (void)inb_p(0xA1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001548 } else {
1549 outb_p(cached_21(cpu), 0x21);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001550 (void)inb_p(0x21);
1551 }
1552}
1553
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001554static void disable_local_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001555{
1556 __u8 cpu = smp_processor_id();
1557 __u16 mask = (1 << irq);
1558 __u16 old_mask = vic_irq_mask[cpu];
1559
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001560 if (irq == 7)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001561 return;
1562
1563 vic_irq_mask[cpu] |= mask;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001564 if (old_mask == vic_irq_mask[cpu])
Linus Torvalds1da177e2005-04-16 15:20:36 -07001565 return;
1566
1567 VDEBUG(("VOYAGER DEBUG: Disabling irq %d in hardware on CPU %d\n",
1568 irq, cpu));
1569
1570 if (irq & 8) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001571 outb_p(cached_A1(cpu), 0xA1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001572 (void)inb_p(0xA1);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001573 } else {
1574 outb_p(cached_21(cpu), 0x21);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001575 (void)inb_p(0x21);
1576 }
1577}
1578
1579/* The VIC is level triggered, so the ack can only be issued after the
1580 * interrupt completes. However, we do Voyager lazy interrupt
1581 * handling here: It is an extremely expensive operation to mask an
1582 * interrupt in the vic, so we merely set a flag (IRQ_DISABLED). If
1583 * this interrupt actually comes in, then we mask and ack here to push
1584 * the interrupt off to another CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001585static void before_handle_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001586{
1587 irq_desc_t *desc = irq_desc + irq;
1588 __u8 cpu = smp_processor_id();
1589
1590 _raw_spin_lock(&vic_irq_lock);
1591 vic_intr_total++;
1592 vic_intr_count[cpu]++;
1593
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001594 if (!(cpu_irq_affinity[cpu] & (1 << irq))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001595 /* The irq is not in our affinity mask, push it off
1596 * onto another CPU */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001597 VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d "
1598 "on cpu %d\n", irq, cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001599 disable_local_vic_irq(irq);
1600 /* set IRQ_INPROGRESS to prevent the handler in irq.c from
1601 * actually calling the interrupt routine */
1602 desc->status |= IRQ_REPLAY | IRQ_INPROGRESS;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001603 } else if (desc->status & IRQ_DISABLED) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001604 /* Damn, the interrupt actually arrived, do the lazy
1605 * disable thing. The interrupt routine in irq.c will
1606 * not handle a IRQ_DISABLED interrupt, so nothing more
1607 * need be done here */
1608 VDEBUG(("VOYAGER DEBUG: lazy disable of irq %d on CPU %d\n",
1609 irq, cpu));
1610 disable_local_vic_irq(irq);
1611 desc->status |= IRQ_REPLAY;
1612 } else {
1613 desc->status &= ~IRQ_REPLAY;
1614 }
1615
1616 _raw_spin_unlock(&vic_irq_lock);
1617}
1618
1619/* Finish the VIC interrupt: basically mask */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001620static void after_handle_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621{
1622 irq_desc_t *desc = irq_desc + irq;
1623
1624 _raw_spin_lock(&vic_irq_lock);
1625 {
1626 unsigned int status = desc->status & ~IRQ_INPROGRESS;
1627#ifdef VOYAGER_DEBUG
1628 __u16 isr;
1629#endif
1630
1631 desc->status = status;
1632 if ((status & IRQ_DISABLED))
1633 disable_local_vic_irq(irq);
1634#ifdef VOYAGER_DEBUG
1635 /* DEBUG: before we ack, check what's in progress */
1636 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001637 if ((isr & (1 << irq) && !(status & IRQ_REPLAY)) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001638 int i;
1639 __u8 cpu = smp_processor_id();
1640 __u8 real_cpu;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001641 int mask; /* Um... initialize me??? --RR */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001642
1643 printk("VOYAGER SMP: CPU%d lost interrupt %d\n",
1644 cpu, irq);
KAMEZAWA Hiroyukic8912592006-03-28 01:56:39 -08001645 for_each_possible_cpu(real_cpu, mask) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001646
1647 outb(VIC_CPU_MASQUERADE_ENABLE | real_cpu,
1648 VIC_PROCESSOR_ID);
1649 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001650 if (isr & (1 << irq)) {
1651 printk
1652 ("VOYAGER SMP: CPU%d ack irq %d\n",
1653 real_cpu, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001654 ack_vic_irq(irq);
1655 }
1656 outb(cpu, VIC_PROCESSOR_ID);
1657 }
1658 }
1659#endif /* VOYAGER_DEBUG */
1660 /* as soon as we ack, the interrupt is eligible for
1661 * receipt by another CPU so everything must be in
1662 * order here */
1663 ack_vic_irq(irq);
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001664 if (status & IRQ_REPLAY) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001665 /* replay is set if we disable the interrupt
1666 * in the before_handle_vic_irq() routine, so
1667 * clear the in progress bit here to allow the
1668 * next CPU to handle this correctly */
1669 desc->status &= ~(IRQ_REPLAY | IRQ_INPROGRESS);
1670 }
1671#ifdef VOYAGER_DEBUG
1672 isr = vic_read_isr();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001673 if ((isr & (1 << irq)) != 0)
1674 printk("VOYAGER SMP: after_handle_vic_irq() after "
1675 "ack irq=%d, isr=0x%x\n", irq, isr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001676#endif /* VOYAGER_DEBUG */
1677 }
1678 _raw_spin_unlock(&vic_irq_lock);
1679
1680 /* All code after this point is out of the main path - the IRQ
1681 * may be intercepted by another CPU if reasserted */
1682}
1683
Linus Torvalds1da177e2005-04-16 15:20:36 -07001684/* Linux processor - interrupt affinity manipulations.
1685 *
1686 * For each processor, we maintain a 32 bit irq affinity mask.
1687 * Initially it is set to all 1's so every processor accepts every
1688 * interrupt. In this call, we change the processor's affinity mask:
1689 *
1690 * Change from enable to disable:
1691 *
1692 * If the interrupt ever comes in to the processor, we will disable it
1693 * and ack it to push it off to another CPU, so just accept the mask here.
1694 *
1695 * Change from disable to enable:
1696 *
1697 * change the mask and then do an interrupt enable CPI to re-enable on
1698 * the selected processors */
1699
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001700void set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001701{
1702 /* Only extended processors handle interrupts */
1703 unsigned long real_mask;
1704 unsigned long irq_mask = 1 << irq;
1705 int cpu;
1706
1707 real_mask = cpus_addr(mask)[0] & voyager_extended_vic_processors;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001708
1709 if (cpus_addr(mask)[0] == 0)
Simon Arlott27b46d72007-10-20 01:13:56 +02001710 /* can't have no CPUs to accept the interrupt -- extremely
Linus Torvalds1da177e2005-04-16 15:20:36 -07001711 * bad things will happen */
1712 return;
1713
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001714 if (irq == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001715 /* can't change the affinity of the timer IRQ. This
1716 * is due to the constraint in the voyager
1717 * architecture that the CPI also comes in on and IRQ
1718 * line and we have chosen IRQ0 for this. If you
1719 * raise the mask on this interrupt, the processor
1720 * will no-longer be able to accept VIC CPIs */
1721 return;
1722
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001723 if (irq >= 32)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001724 /* You can only have 32 interrupts in a voyager system
1725 * (and 32 only if you have a secondary microchannel
1726 * bus) */
1727 return;
1728
1729 for_each_online_cpu(cpu) {
1730 unsigned long cpu_mask = 1 << cpu;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001731
1732 if (cpu_mask & real_mask) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001733 /* enable the interrupt for this cpu */
1734 cpu_irq_affinity[cpu] |= irq_mask;
1735 } else {
1736 /* disable the interrupt for this cpu */
1737 cpu_irq_affinity[cpu] &= ~irq_mask;
1738 }
1739 }
1740 /* this is magic, we now have the correct affinity maps, so
1741 * enable the interrupt. This will send an enable CPI to
Simon Arlott27b46d72007-10-20 01:13:56 +02001742 * those CPUs who need to enable it in their local masks,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001743 * causing them to correct for the new affinity . If the
1744 * interrupt is currently globally disabled, it will simply be
1745 * disabled again as it comes in (voyager lazy disable). If
1746 * the affinity map is tightened to disable the interrupt on a
1747 * cpu, it will be pushed off when it comes in */
James Bottomleyc7717462006-10-12 22:21:16 -05001748 unmask_vic_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001749}
1750
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001751static void ack_vic_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001752{
1753 if (irq & 8) {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001754 outb(0x62, 0x20); /* Specific EOI to cascade */
1755 outb(0x60 | (irq & 7), 0xA0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001756 } else {
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001757 outb(0x60 | (irq & 7), 0x20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001758 }
1759}
1760
1761/* enable the CPIs. In the VIC, the CPIs are delivered by the 8259
1762 * but are not vectored by it. This means that the 8259 mask must be
1763 * lowered to receive them */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001764static __init void vic_enable_cpi(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001765{
1766 __u8 cpu = smp_processor_id();
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001767
Linus Torvalds1da177e2005-04-16 15:20:36 -07001768 /* just take a copy of the current mask (nop for boot cpu) */
1769 vic_irq_mask[cpu] = vic_irq_mask[boot_cpu_id];
1770
1771 enable_local_vic_irq(VIC_CPI_LEVEL0);
1772 enable_local_vic_irq(VIC_CPI_LEVEL1);
1773 /* for sys int and cmn int */
1774 enable_local_vic_irq(7);
1775
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001776 if (is_cpu_quad()) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001777 outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
1778 outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
1779 VDEBUG(("VOYAGER SMP: QIC ENABLE CPI: CPU%d: MASK 0x%x\n",
1780 cpu, QIC_CPI_ENABLE));
1781 }
1782
1783 VDEBUG(("VOYAGER SMP: ENABLE CPI: CPU%d: MASK 0x%x\n",
1784 cpu, vic_irq_mask[cpu]));
1785}
1786
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001787void voyager_smp_dump()
Linus Torvalds1da177e2005-04-16 15:20:36 -07001788{
1789 int old_cpu = smp_processor_id(), cpu;
1790
1791 /* dump the interrupt masks of each processor */
1792 for_each_online_cpu(cpu) {
1793 __u16 imr, isr, irr;
1794 unsigned long flags;
1795
1796 local_irq_save(flags);
1797 outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
1798 imr = (inb(0xa1) << 8) | inb(0x21);
1799 outb(0x0a, 0xa0);
1800 irr = inb(0xa0) << 8;
1801 outb(0x0a, 0x20);
1802 irr |= inb(0x20);
1803 outb(0x0b, 0xa0);
1804 isr = inb(0xa0) << 8;
1805 outb(0x0b, 0x20);
1806 isr |= inb(0x20);
1807 outb(old_cpu, VIC_PROCESSOR_ID);
1808 local_irq_restore(flags);
1809 printk("\tCPU%d: mask=0x%x, IMR=0x%x, IRR=0x%x, ISR=0x%x\n",
1810 cpu, vic_irq_mask[cpu], imr, irr, isr);
1811#if 0
1812 /* These lines are put in to try to unstick an un ack'd irq */
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001813 if (isr != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001814 int irq;
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001815 for (irq = 0; irq < 16; irq++) {
1816 if (isr & (1 << irq)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001817 printk("\tCPU%d: ack irq %d\n",
1818 cpu, irq);
1819 local_irq_save(flags);
1820 outb(VIC_CPU_MASQUERADE_ENABLE | cpu,
1821 VIC_PROCESSOR_ID);
1822 ack_vic_irq(irq);
1823 outb(old_cpu, VIC_PROCESSOR_ID);
1824 local_irq_restore(flags);
1825 }
1826 }
1827 }
1828#endif
1829 }
1830}
1831
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001832void smp_voyager_power_off(void *dummy)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001833{
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001834 if (smp_processor_id() == boot_cpu_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001835 voyager_power_off();
1836 else
1837 smp_stop_cpu_function(NULL);
1838}
1839
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001840static void __init voyager_smp_prepare_cpus(unsigned int max_cpus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001841{
1842 /* FIXME: ignore max_cpus for now */
1843 smp_boot_cpus();
1844}
1845
Randy Dunlap8f818212007-11-11 21:06:45 -08001846static void __cpuinit voyager_smp_prepare_boot_cpu(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001847{
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001848 init_gdt(smp_processor_id());
1849 switch_to_new_gdt();
1850
Linus Torvalds1da177e2005-04-16 15:20:36 -07001851 cpu_set(smp_processor_id(), cpu_online_map);
1852 cpu_set(smp_processor_id(), cpu_callout_map);
Zwane Mwaikambo4ad8d382005-09-03 15:56:51 -07001853 cpu_set(smp_processor_id(), cpu_possible_map);
James Bottomley3c101cf2006-06-26 21:33:09 -05001854 cpu_set(smp_processor_id(), cpu_present_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001855}
1856
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001857static int __cpuinit voyager_cpu_up(unsigned int cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001858{
1859 /* This only works at boot for x86. See "rewrite" above. */
1860 if (cpu_isset(cpu, smp_commenced_mask))
1861 return -ENOSYS;
1862
1863 /* In case one didn't come up */
1864 if (!cpu_isset(cpu, cpu_callin_map))
1865 return -EIO;
1866 /* Unleash the CPU! */
1867 cpu_set(cpu, smp_commenced_mask);
1868 while (!cpu_isset(cpu, cpu_online_map))
1869 mb();
1870 return 0;
1871}
1872
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001873static void __init voyager_smp_cpus_done(unsigned int max_cpus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001874{
1875 zap_low_mappings();
1876}
Andrew Morton033ab7f2006-06-30 01:55:50 -07001877
Ingo Molnara4ec1ef2008-01-30 13:30:10 +01001878void __init smp_setup_processor_id(void)
Andrew Morton033ab7f2006-06-30 01:55:50 -07001879{
1880 current_thread_info()->cpu = hard_smp_processor_id();
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001881 x86_write_percpu(cpu_number, hard_smp_processor_id());
Andrew Morton033ab7f2006-06-30 01:55:50 -07001882}
Jeremy Fitzhardinge6a3ee3d2007-05-15 01:41:59 -07001883
1884struct smp_ops smp_ops = {
1885 .smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu,
1886 .smp_prepare_cpus = voyager_smp_prepare_cpus,
1887 .cpu_up = voyager_cpu_up,
1888 .smp_cpus_done = voyager_smp_cpus_done,
1889
1890 .smp_send_stop = voyager_smp_send_stop,
1891 .smp_send_reschedule = voyager_smp_send_reschedule,
1892 .smp_call_function_mask = voyager_smp_call_function_mask,
1893};