| #ifndef __ASMARM_ARCH_TIMER_H |
| #define __ASMARM_ARCH_TIMER_H |
| |
| #include <asm/barrier.h> |
| #include <asm/errno.h> |
| #include <linux/clocksource.h> |
| #include <linux/init.h> |
| #include <linux/types.h> |
| |
| #include <clocksource/arm_arch_timer.h> |
| |
| #ifdef CONFIG_ARM_ARCH_TIMER |
| int arch_timer_arch_init(void); |
| |
| /* |
| * These register accessors are marked inline so the compiler can |
| * nicely work out which register we want, and chuck away the rest of |
| * the code. At least it does so with a recent GCC (4.6.3). |
| */ |
| static inline void arch_timer_reg_write(const int access, const int reg, u32 val) |
| { |
| if (access == ARCH_TIMER_PHYS_ACCESS) { |
| switch (reg) { |
| case ARCH_TIMER_REG_CTRL: |
| asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val)); |
| break; |
| case ARCH_TIMER_REG_TVAL: |
| asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val)); |
| break; |
| } |
| } |
| |
| if (access == ARCH_TIMER_VIRT_ACCESS) { |
| switch (reg) { |
| case ARCH_TIMER_REG_CTRL: |
| asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" (val)); |
| break; |
| case ARCH_TIMER_REG_TVAL: |
| asm volatile("mcr p15, 0, %0, c14, c3, 0" : : "r" (val)); |
| break; |
| } |
| } |
| |
| isb(); |
| } |
| |
| static inline u32 arch_timer_reg_read(const int access, const int reg) |
| { |
| u32 val = 0; |
| |
| if (access == ARCH_TIMER_PHYS_ACCESS) { |
| switch (reg) { |
| case ARCH_TIMER_REG_CTRL: |
| asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val)); |
| break; |
| case ARCH_TIMER_REG_TVAL: |
| asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val)); |
| break; |
| } |
| } |
| |
| if (access == ARCH_TIMER_VIRT_ACCESS) { |
| switch (reg) { |
| case ARCH_TIMER_REG_CTRL: |
| asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r" (val)); |
| break; |
| case ARCH_TIMER_REG_TVAL: |
| asm volatile("mrc p15, 0, %0, c14, c3, 0" : "=r" (val)); |
| break; |
| } |
| } |
| |
| return val; |
| } |
| |
| static inline u32 arch_timer_get_cntfrq(void) |
| { |
| u32 val; |
| asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val)); |
| return val; |
| } |
| |
| static inline u64 arch_counter_get_cntvct(void) |
| { |
| u64 cval; |
| |
| isb(); |
| asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval)); |
| return cval; |
| } |
| |
| static inline void __cpuinit arch_counter_set_user_access(void) |
| { |
| u32 cntkctl; |
| |
| asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); |
| |
| /* disable user access to everything */ |
| cntkctl &= ~((3 << 8) | (7 << 0)); |
| |
| asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); |
| } |
| #endif |
| |
| #endif |