| /* |
| * SAMSUNG EXYNOS8890 board device tree source |
| * |
| * Copyright (c) 2016 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| #include "exynos8890.dtsi" |
| #include "exynos8890-rmem.dtsi" |
| #include "exynos8890-display-lcd.dtsi" |
| #include "exynos8890-modem-sh340ap.dtsi" |
| |
| / { |
| model = "Samsung MASTRO board based on EXYNOS8890"; |
| compatible = "samsung,exynos8890", "samsung,MAESTRO"; |
| |
| ect { |
| parameter_address = <0x90000000>; |
| parameter_size = <0x19000>; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x0 0x80000000 0x80000000>; |
| }; |
| |
| memory@880000000 { |
| device_type = "memory"; |
| reg = <0x00000008 0x80000000 0x80000000>; |
| }; |
| |
| chosen { |
| bootargs = "console=ttySAC2,115200 clk_ignore_unused pmic_info=3 androidboot.hardware=samsungexynos8890 androidboot.selinux=permissive ess_setup=0x86000000 firmware_class.path=/vendor/firmware"; |
| linux,initrd-start = <0x82000000>; |
| linux,initrd-end = <0x820FFFFF>; |
| }; |
| |
| fixed-rate-clocks { |
| oscclk { |
| compatible = "samsung,exynos8890-oscclk"; |
| clock-frequency = <26000000>; |
| }; |
| }; |
| |
| serial_0: uart@13630000 { |
| status = "okay"; |
| }; |
| |
| serial_1: uart@14C20000 { |
| status = "okay"; |
| }; |
| |
| serial_2: uart@14C30000 { |
| status = "okay"; |
| }; |
| |
| serial_3: uart@14C40000 { |
| status = "okay"; |
| }; |
| |
| serial_4: uart@14C50000 { |
| status = "okay"; |
| }; |
| |
| serial_5: uart@14C10000 { |
| status = "okay"; |
| }; |
| |
| ufs@0x155A0000 { |
| status = "okay"; |
| ufs,pmd-attr-mode = "FAST"; |
| ufs,pmd-attr-lane = /bits/ 8 <1>; |
| ufs,pmd-attr-gear = /bits/ 8 <3>; |
| ufs,pmd-attr-hs-series = "HS_rate_b"; |
| ufs-opts-skip-connection-estab; |
| ufs-opts-use-seperated-pclk; |
| ufs-rx-adv-fine-gran-sup_en = <0>; |
| ufs-rx-min-activate-time-cap = <3>; |
| ufs-rx-hibern8-time-cap = <2>; |
| ufs-tx-hibern8-time-cap = <2>; |
| ufs-wait-cdr-lock = <0x6e>; |
| |
| vcc-supply = <&ufs_fixed_vcc>; |
| vccq-supply = <&ufs_fixed_vccq>; |
| vccq2-supply = <&ufs_fixed_vccq2>; |
| vcc-fixed-regulator; |
| vccq-fixed-regulator; |
| vccq2-fixed-regulator; |
| |
| ufs-cap-clk-gating; |
| ufs-cap-hibern8-with-clk-gating; |
| |
| phy-init = |
| <0x9564 0x2e030103 PMD_ALL UNIPRO_DBG_MIB>, // PA_DBG_OPTION_SUITE |
| <0x155E 0x0 PMD_ALL UNIPRO_STD_MIB>, |
| <0x00f 0xfa PMD_ALL PHY_PMA_COMN>, |
| <0x010 0x82 PMD_ALL PHY_PMA_COMN>, |
| <0x011 0x1e PMD_ALL PHY_PMA_COMN>, |
| <0x012 0x80 PMD_ALL PHY_PMA_COMN>, |
| <0x017 0x94 PMD_ALL PHY_PMA_COMN>, |
| <0x034 0x31 PMD_ALL PHY_PMA_TRSV>, |
| <0x035 0x40 PMD_ALL PHY_PMA_TRSV>, |
| <0x038 0x3f PMD_ALL PHY_PMA_TRSV>, |
| <0x049 0x00 PMD_ALL PHY_PMA_TRSV>, |
| <0x04a 0x10 PMD_ALL PHY_PMA_TRSV>, |
| <0x04c 0x5b PMD_ALL PHY_PMA_TRSV>, |
| <0x05c 0x14 PMD_ALL PHY_PMA_TRSV>, |
| <0x9540 true PMD_ALL PHY_PCS_COMN>, // PA_DBG_OV_TM |
| <0x401 0x09 PMD_ALL PHY_PCS_COMN>, |
| <0x27a 0x10 PMD_ALL PHY_PCS_RXTX>, |
| <0x30e 0x01 PMD_ALL PHY_PCS_RXTX>, |
| <0x31f 0x04 PMD_ALL PHY_PCS_RXTX>, |
| <0x32c 0x00 PMD_ALL PHY_PCS_RXTX>, |
| <0x9540 false PMD_ALL PHY_PCS_COMN>, // PA_DBG_OV_TM |
| <0 0 0 0>; |
| |
| post-phy-init = |
| <0x9529 0x1 PMD_ALL UNIPRO_DBG_MIB>, // PA_DBG_MODE |
| <PA_SAVECONFIGTIME 0x7d0 PMD_ALL UNIPRO_STD_MIB>, |
| <0x9529 0x0 PMD_ALL UNIPRO_DBG_MIB>, // PA_DBG_MODE |
| <0 0 0 0>; |
| |
| calib-of-pwm = |
| <0x9540 true PMD_ALL PHY_PCS_COMN>, // PA_DBG_OV_TM |
| <0x337 0x21 PMD_PWM PHY_PCS_RXTX>, |
| <0x9540 false PMD_ALL PHY_PCS_COMN>, // PA_DBG_OV_TM |
| <0 0 0 0>; |
| |
| calib-of-hs-rate-a = |
| <0x034 0x32 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x035 0x40 (PMD_HS_G1_L1 | PMD_HS_G2_L1) PHY_PMA_TRSV>, |
| <0x035 0x42 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x037 0x43 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x41a 0x01 PMD_HS_G3_L1 PHY_PCS_COMN>, |
| <0 0 0 0>; |
| |
| calib-of-hs-rate-b = |
| <0x034 0x32 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x035 0x40 (PMD_HS_G1_L1 | PMD_HS_G2_L1) PHY_PMA_TRSV>, |
| <0x035 0x42 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x037 0x43 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x41a 0x01 PMD_HS_G3_L1 PHY_PCS_COMN>, |
| <0 0 0 0>; |
| |
| post-calib-of-pwm = |
| <0x015 0x00 PMD_PWM PHY_PMA_COMN>, |
| <0x41a 0x00 PMD_PWM PHY_PCS_COMN>, |
| <0 0 0 0>; |
| |
| post-calib-of-hs-rate-a = |
| <0x049 0x02 (PMD_HS_G2_L1 | PMD_HS_G3_L1) PHY_PMA_TRSV>, |
| <0x04a 0x37 (PMD_HS_G2_L1 | PMD_HS_G3_L1) PHY_PMA_TRSV>, |
| <0 0 0 0>; |
| |
| post-calib-of-hs-rate-b = |
| <0x049 0x02 (PMD_HS_G2_L1 | PMD_HS_G3_L1) PHY_PMA_TRSV>, |
| <0x04a 0x37 (PMD_HS_G2_L1 | PMD_HS_G3_L1) PHY_PMA_TRSV>, |
| <0 0 0 0>; |
| |
| pma-restore = |
| <0x00f 0xfa PMD_ALL PHY_PMA_COMN>, |
| <0x010 0x82 PMD_ALL PHY_PMA_COMN>, |
| <0x011 0x1e PMD_ALL PHY_PMA_COMN>, |
| <0x012 0x80 PMD_ALL PHY_PMA_COMN>, |
| <0x017 0x94 PMD_ALL PHY_PMA_COMN>, |
| <0x034 0x31 (PMD_PWM |(PMD_HS_G1_L1 | PMD_HS_G2_L1)) PHY_PMA_TRSV>, |
| <0x034 0x32 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x035 0x40 PMD_PWM PHY_PMA_TRSV>, |
| <0x035 0x40 (PMD_HS_G1_L1 | PMD_HS_G2_L1) PHY_PMA_TRSV>, |
| <0x035 0x42 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x037 0x43 PMD_HS_G3_L1 PHY_PMA_TRSV>, |
| <0x038 0x3f PMD_ALL PHY_PMA_TRSV>, |
| <0x049 0x00 PMD_PWM PHY_PMA_TRSV>, |
| <0x04a 0x10 PMD_PWM PHY_PMA_TRSV>, |
| <0x049 0x02 PMD_HS PHY_PMA_TRSV>, |
| <0x04a 0x37 PMD_HS PHY_PMA_TRSV>, |
| <0x04c 0x5b PMD_HS PHY_PMA_TRSV>, |
| <0x05c 0x14 PMD_HS PHY_PMA_TRSV>, |
| <0 0 0 0>; |
| }; |
| |
| ufs_fixed_vcc: fixedregulator@0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "ufs-vcc"; |
| gpio = <&gpg0 0 0>; |
| regulator-boot-on; |
| enable-active-high; |
| }; |
| |
| ufs_fixed_vccq: fixedregulator@1 { |
| compatible = "regulator-fixed"; |
| regulator-name = "ufs-vccq"; |
| gpio = <&gpg0 0 0>; |
| regulator-boot-on; |
| enable-active-high; |
| }; |
| |
| ufs_fixed_vccq2: fixedregulator@2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "ufs-vccq2"; |
| gpio = <&gpg0 0 0>; |
| regulator-boot-on; |
| enable-active-high; |
| startup-delay-us = <2000>; |
| endup-delay-us = <2000>; |
| }; |
| |
| pinctrl@10580000 { |
| dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq { |
| samsung,pins = "gpa3-2"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <3>; |
| samsung,pin-drv = <4>; |
| }; |
| |
| }; |
| |
| dwmmc2@15740000 { |
| status = "okay"; |
| num-slots = <1>; |
| card-detect-gpio; |
| supports-4bit; |
| supports-cmd23; |
| supports-erase; |
| supports-highspeed; |
| sd-uhs-sdr104; |
| bypass-for-allpass; |
| use-fine-tuning; |
| card-init-hwacg-ctrl; |
| samsung,voltage-int-extra = <0x7>; |
| fifo-depth = <0x40>; |
| qos_int_level = <255000>; |
| samsung,dw-mshc-ciu-div = <3>; |
| desc-size = <4>; |
| card-detect-delay = <200>; |
| data-timeout = <200>; |
| hto-timeout = <550>; |
| clock-frequency = <800000000>; |
| samsung,dw-mshc-sdr-timing = <3 0 2 0>; |
| samsung,dw-mshc-ddr-timing = <3 0 2 1>; |
| |
| num-ref-clks = <8>; |
| ciu_clkin = <25 50 50 100 200 100 200 200>; |
| |
| /* Swapping clock drive strength */ |
| clk-drive-number = <4>; |
| pinctrl-names = "default", |
| "fast-slew-rate-1x", |
| "fast-slew-rate-2x", |
| "fast-slew-rate-3x", |
| "fast-slew-rate-4x"; |
| pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4 &dwmmc2_cd_ext_irq>; |
| pinctrl-1 = <&sd2_clk_fast_slew_rate_1x>; |
| pinctrl-2 = <&sd2_clk_fast_slew_rate_2x>; |
| pinctrl-3 = <&sd2_clk_fast_slew_rate_3x>; |
| pinctrl-4 = <&sd2_clk_fast_slew_rate_4x>; |
| |
| card-detect = <&gpa3 2 0xf>; |
| slot@0 { |
| reg = <0>; |
| bus-width = <4>; |
| disable-wp; |
| }; |
| }; |
| |
| pinctrl@10580000 { |
| key_power: key-power { |
| samsung,pins = "gpa2-7"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| |
| key_voldown: key-voldown { |
| samsung,pins = "gpa2-1"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| |
| key_volup: key-volup { |
| samsung,pins = "gpa2-0"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| }; |
| |
| gpio_keys { |
| compatible = "gpio-keys"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&key_power &key_voldown &key_volup>; |
| button@1 { |
| label = "gpio-keys: KEY_POWER"; |
| linux,code = <116>; |
| gpios = <&gpa2 7 0xf>; |
| gpio-key,wakeup = <1>; |
| }; |
| button@2 { |
| label = "gpio-keys: KEY_VOLUMEDOWN"; |
| linux,code = <114>; |
| gpios = <&gpa2 1 0xf>; |
| }; |
| button@3 { |
| label = "gpio-keys: KEY_VOLUMEUP"; |
| linux,code = <115>; |
| gpios = <&gpa2 0 0xf>; |
| }; |
| }; |
| |
| pinctrl@10580000 { |
| pmic_irq: pmic-irq { |
| samsung,pins = "gpa0-2"; |
| samsung,pin-pud = <3>; |
| samsung,pin-drv = <3>; |
| }; |
| |
| chg_irq: chg-irq { |
| samsung,pins = "gpa0-0"; |
| samsung,pin-function = <0>; |
| samsung,pin-pud = <3>; |
| samsung,pin-drv = <3>; |
| }; |
| muic_irq: muic-irq { |
| samsung,pins = "gpa1-1"; |
| samsung,pin-function = <0x0>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| }; |
| |
| pinctrl@14CC0000 { |
| /* Warm reset information from AP */ |
| pm_wrsti: pm-wrsti { |
| samsung,pins = "gpe6-7"; |
| samsung,pin-con-pdn = <3>; |
| }; |
| }; |
| |
| pinctrl@136D0000 { |
| g3d_dvs: g3d-dvs { |
| samsung,pins = "gpb2-0"; |
| samsung,pin-function = <0x2>; |
| }; |
| }; |
| |
| hsi2c@10550000{ |
| status = "okay"; |
| samsung,hs-mode; |
| clock-frequency = <3000000>; |
| samsung,hsi2c-batcher; |
| samsung,use-apm; |
| samsung,apm-always-clkon; |
| s2mps16_pmic@66 { |
| compatible = "samsung,s2mps16-pmic"; |
| reg = <0x66>; |
| interrupts = <2 0 0>; |
| interrupt-parent = <&gpa0>; |
| pinctrl-names = "default"; |
| ten-bit-address; |
| pinctrl-0 = <&pmic_irq &pm_wrsti &g3d_dvs>; |
| gpios = <&gpb2 1 0>, <&gpb2 0 0x2>; |
| smpl_warn_en = <1>; /* 1 : enable , 0 : disable*/ |
| /* range of smpl_warn_vth */ |
| /* 0x00 : 2.1V, 0x20 : 2.3V, 0x40 : 2.5V, 0x60 : 2.7V 0x80 : 2.9V */ |
| /* 0xA0 : 3.1V, 0xC0 : 3.3V, 0xE0 : 3.5V */ |
| smpl_warn_vth = <0x80>; |
| /* LowBat_Hys[4:3] 00(100mV), 01(200mV), 10(300mV), 11(400mV) */ |
| smpl_warn_hys = <0x00>; |
| adc-on; |
| cache_data = <1>; /* 1: enable, 0 : disable */ |
| g3d_en = <1>; /* 1 : enable , 0 : disable */ |
| dvs_en = <1>; /* 1 : enable , 0 : disable */ |
| ldo8_7_seq = <0x05>; |
| ldo10_9_seq = <0x63>; |
| /* RTC: wtsr/smpl */ |
| wtsr_en = <1>; /* enable */ |
| smpl_en = <1>; /* enable */ |
| wtsr_timer_val = <3>; /* 1000ms */ |
| smpl_timer_val = <4>; /* 500ms */ |
| check_jigon = <0>; /* do not check jigon */ |
| /* RTC: If it's first boot, reset rtc to 1/1/2014 12:00:00(Wed) */ |
| init_time,sec = <0>; |
| init_time,min = <0>; |
| init_time,hour = <12>; |
| init_time,mday = <1>; |
| init_time,mon = <0>; |
| init_time,year = <115>; |
| init_time,wday = <4>; |
| |
| regulators { |
| buck1_reg: BUCK1 { |
| regulator-name = "vdd_mif"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <2>; /* controlled by PWREN_MIF */ |
| }; |
| |
| buck2_reg: BUCK2 { |
| regulator-name = "vdd_mngs"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <11000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| buck3_reg: BUCK3 { |
| regulator-name = "vdd_apollo"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-ramp-delay = <11000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| buck4_reg: BUCK4 { |
| regulator-name = "vdd_int"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <2>; /* controlled by PWREN_MIF */ |
| }; |
| |
| buck5_reg: BUCK5 { |
| regulator-name = "vdd_dispcam"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| regulator-ramp-delay = <11000>; |
| regulator-initial-mode = <2>; /* controlled by PWREN_MIF */ |
| }; |
| |
| buck6_reg: BUCK6 { |
| regulator-name = "vdd_g3d"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| buck7_reg: BUCK7 { |
| regulator-name = "vdd_mem"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| buck8_reg: BUCK8 { |
| regulator-name = "vdd_lldo"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| buck9_reg: BUCK9 { |
| regulator-name = "vdd_mldo"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <2100000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| buck11_reg: BUCK11 { |
| regulator-name = "vdd_extra"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo1_reg: LDO1 { |
| regulator-name = "vdd_ldo1"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <900000>; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: LDO2 { |
| regulator-name = "vqmmc"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <2800000>; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| regulator-always-on; |
| }; |
| |
| ldo3_reg: LDO3 { |
| regulator-name = "vdd_ldo3"; |
| regulator-min-microvolt = <1620000>; |
| regulator-max-microvolt = <1980000>; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: LDO4 { |
| regulator-name = "vdd_ldo4"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1110000>; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| regulator-always-on; |
| }; |
| |
| ldo5_reg: LDO5 { |
| regulator-name = "vdd_ldo5"; |
| regulator-min-microvolt = <1625000>; |
| regulator-max-microvolt = <1975000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo6_reg: LDO6 { |
| regulator-name = "vdd_ldo6"; |
| regulator-min-microvolt = <2250000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo7_reg: LDO7 { |
| regulator-name = "vdd_ldo7"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo8_reg: LDO8 { |
| regulator-name = "vdd_ldo8"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo9_reg: LDO9 { |
| regulator-name = "vdd_ldo9"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo10_reg: LDO10 { |
| regulator-name = "vdd_ldo10"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo11_reg: LDO11 { |
| regulator-name = "vdd_ldo11"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo12_reg: LDO12 { |
| regulator-name = "vdd_ldo12"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo13_reg: LDO13 { |
| regulator-name = "vdd_ldo13"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo25_reg: LDO25 { |
| regulator-name = "vdd_ldo25"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-ramp-delay = <12000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo26_reg: LDO26 { |
| regulator-name = "vdd_ldo26"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-ramp-delay = <12000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo27_reg: LDO27 { |
| regulator-name = "vdd_ldo27"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-ramp-delay = <12000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo28_reg: LDO28 { |
| regulator-name = "vdd_ldo28"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo29_reg: LDO29 { |
| regulator-name = "vdd_ldo29"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo30_reg: LDO30 { |
| regulator-name = "vdd_ldo30"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <3>; |
| }; |
| |
| ldo31_reg: LDO31 { |
| regulator-name = "vdd_ldo31"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo32_reg: LDO32 { |
| regulator-name = "vdd_ldo32"; |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <2100000>; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <0>; |
| }; |
| |
| ldo33_reg: LDO33 { |
| regulator-name = "vdd_ldo33"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <0>; |
| }; |
| |
| ldo34_reg: LDO34 { |
| regulator-name = "vdd_ldo34"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo35_reg: LDO35 { |
| regulator-name = "vdd_ldo35"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo36_reg: LDO36 { |
| regulator-name = "vdd_ldo36"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo37_reg: LDO37 { |
| regulator-name = "vdd_ldo37"; |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <2100000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| |
| ldo38_reg: LDO38 { |
| regulator-name = "vdd_ldo38"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-ramp-delay = <12000>; |
| regulator-always-on; |
| regulator-initial-mode = <1>; |
| }; |
| }; |
| }; |
| }; |
| |
| pinctrl@10580000 { |
| sub_pmic_irq: sub-pmic-irq { |
| samsung,pins = "gpa3-7"; |
| samsung,pin-function = <0>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| }; |
| |
| hsi2c@14E20000 { |
| status = "okay"; |
| bq24193-charger@6b { |
| compatible = "ti,bq24193"; |
| reg = <0x6b>; |
| interrupts = <0 0 0>; |
| interrupt-parent = <&gpa0>; |
| pinctrl-names = "default"; |
| pinctrl-3 = <&chg_irq>; |
| dev_name = "bq24193"; |
| }; |
| s2mpb02_pmic@59 { |
| compatible = "s2mpb02,s2mpb02mfd"; |
| reg = <0x59>; |
| |
| s2mpb02,wakeup; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sub_pmic_irq>; |
| |
| regulators { |
| _buck1_reg: s2mpb02-buck1 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1700000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _buck2_reg: s2mpb02-buck2 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _buckboost_reg: s2mpb02-bb { |
| regulator-min-microvolt = <2600000>; |
| regulator-max-microvolt = <4000000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo1_reg: s2mpb02-ldo1 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <2187500>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo2_reg: s2mpb02-ldo2 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <2187500>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo3_reg: s2mpb02-ldo3 { |
| regulator-name = "VDD12_M_CAMCORE"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <2187500>; |
| }; |
| |
| _ldo4_reg: s2mpb02-ldo4 { |
| regulator-name = "VDD12_S_CAMCORE"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <2187500>; |
| }; |
| |
| _ldo5_reg: s2mpb02-ldo5 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <2187500>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo6_reg: s2mpb02-ldo6 { |
| regulator-name = "VDD18_PANEL"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| }; |
| |
| _ldo7_reg: s2mpb02-ldo7 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo8_reg: s2mpb02-ldo8 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo9_reg: s2mpb02-ldo9 { |
| regulator-name = "VDD18_VTCAMIO"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| _ldo10_reg: s2mpb02-ldo10 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo11_reg: s2mpb02-ldo11 { |
| regulator-name = "VDDA28_M_CAMSEN"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| _ldo12_reg: s2mpb02-ldo12 { |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo13_reg: s2mpb02-ldo13 { |
| regulator-name = "VDDA28_S_CAMSEN"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| _ldo14_reg: s2mpb02-ldo14 { |
| regulator-name = "VDDA30_VTCAMSEN"; |
| regulator-min-microvolt = <2800000>; |
| regulator-max-microvolt = <2800000>; |
| }; |
| |
| _ldo15_reg: s2mpb02-ldo15 { |
| regulator-name = "VDD28_M_CAMAF"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| }; |
| |
| _ldo16_reg: s2mpb02-ldo16 { |
| regulator-name = "VDD28_S_CAMAF"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| }; |
| |
| _ldo17_reg: s2mpb02-ldo17 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| _ldo18_reg: s2mpb02-ldo18 { |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <3775000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| }; |
| |
| torch { |
| torch1-gpio = "gpc1-1"; |
| flash1-gpio = "gpc0-3"; |
| |
| status = "okay"; |
| |
| leds1 { |
| ledname = "leds-sec1"; |
| id = <0>; |
| brightness = <0xC>; |
| timeout = <0x3>; |
| }; |
| |
| leds2 { |
| ledname = "torch-sec1"; |
| id = <1>; |
| brightness = <0xC>; |
| timeout = <0xF>; |
| }; |
| }; |
| }; |
| }; |
| |
| pcie0@157A0000 { |
| pcie,wlan-gpio = <&gpj1 3 0x1 /* WLAN_EN */ >; |
| pcie,bt-gpio = <&gpj1 7 0x1 /* BT_EN */ >; |
| status = "okay"; |
| }; |
| |
| pinctrl@10580000 { |
| attn_irq: attn-irq { |
| samsung,pins = "gpa0-3"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| attn_input: attn-input { |
| samsung,pins = "gpa0-3"; |
| samsung,pin-function = <0>; |
| samsung,pin-pud = <1>; |
| }; |
| }; |
| |
| hsi2c@14E10000 { |
| status = "okay"; |
| touchscreen@20 { |
| compatible = "synaptics,rmi4"; |
| reg = <0x20>; |
| pinctrl-names = "on_state", "off_state"; |
| pinctrl-0 = <&attn_irq>; |
| pinctrl-1 = <&attn_input>; |
| synaptics,irq_gpio = <&gpa0 3 0>; |
| synaptics,irq_type = <8200>; |
| synaptics,max_coords = <1440 2560>; /* x y */ |
| synaptics,num_lines = <29 16>; /* rx tx */ |
| |
| synaptics,regulator_dvdd = "vdd_ldo32"; |
| synaptics,regulator_avdd = "vdd_ldo33"; |
| synaptics,project_name = "jungfrau","espresso8890"; |
| }; |
| }; |
| |
| ion { |
| compatible = "samsung,exynos5430-ion"; |
| }; |
| |
| decon_f: decon_f@0x13960000 { |
| /* EINT for TE */ |
| gpios = <&gpe2 6 0xf>, <&gpe3 1 0xf>; |
| te_eint { |
| /* NWEINT_GPE2_PEND(GPE2_6[6]), NWEINT_GPE2_MASK(GPE2_6[6]) */ |
| reg = <0x0 0x14CC0A14 0x4>, <0x0 0x14CC0914 0x4>; |
| }; |
| }; |
| |
| decon_s: decon_s@0x13E10000 { |
| /* EINT for TE */ |
| gpios = <&gpe3 1 0xf>; |
| }; |
| |
| dsim_0: dsim@0x13900000 { |
| lcd_info = <&s6e3fa0>; |
| /* lcd reset, power */ |
| gpios = <&gpe2 5 0x1>, <&gpe3 2 0x1>; |
| }; |
| |
| dsim_1: dsim@0x13910000 { |
| lcd_info = <&s6e3ha2k>; |
| /* lcd reset, power */ |
| gpios = <&gpe3 0 0x1>; |
| }; |
| |
| hsi2c@14E60000 { |
| status = "okay"; |
| muic-tsu6721@25 { |
| compatible = "tsu6721-muic,i2c"; |
| reg = <0x25>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&muic_irq>; |
| muic,muic_int = <&gpa1 1 0>; |
| gpios = <&gpi2 3 0x1>; |
| }; |
| }; |
| |
| usb@15400000 { |
| status = "okay"; |
| |
| dwc3 { |
| maximum-speed = "super-speed"; |
| dr_mode = "otg"; |
| suspend_clk_freq = <66000000>; |
| }; |
| }; |
| |
| phy@15500000 { |
| usb_additional_tuning; |
| }; |
| |
| usb_notifier { |
| compatible = "samsung,usb-notifier"; |
| udc = <&udc>; |
| }; |
| |
| i2s0: i2s@11440000 { |
| samsung,supports-esa-dma; |
| samsung,supports-sec-compr; |
| status = "okay"; |
| }; |
| |
| audio_codec_dummy: dummy-codec { |
| compatible = "samsung,dummy-codec"; |
| status = "okay"; |
| }; |
| audio_cp_dummy: cp_dummy { |
| compatible = "samsung,cp_dummy"; |
| status = "okay"; |
| }; |
| |
| i2s_dummy: dummy-i2s { |
| compatible = "samsung,dummy-i2s"; |
| status = "okay"; |
| }; |
| audio_bt_dummy: bt_dummy { |
| compatible = "samsung,bt_dummy"; |
| status = "okay"; |
| }; |
| sound { |
| compatible = "samsung,universal-dummy"; |
| samsung,audio-cpu = < |
| &i2s0 |
| &i2s0 |
| &audio_cp_dummy /* voice call */ |
| &eax |
| &eax |
| &eax |
| &eax |
| &i2s0 |
| &i2s_dummy /* Offload Visualizer */ |
| &audio_bt_dummy /* BT */ |
| >; |
| samsung,audio-codec = < |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy |
| &audio_codec_dummy /* offload visualizer */ |
| &audio_codec_dummy /* BT */ |
| >; |
| status = "okay"; |
| }; |
| |
| /* modem_interface */ |
| mif_pdata { |
| reg = <0x0 0x20C7800 0x800>; |
| // pinctrl-names = "default"; |
| // pinctrl-0 = <&gpio_nfc>; |
| mif,ap_clk_table = < |
| /* khz */ |
| 1898000 |
| 1794000 |
| 1690000 |
| 1586000 |
| 1482000 |
| 1378000 |
| 1274000 |
| 1170000 |
| 1066000 |
| 962000 |
| 858000 |
| 754000 |
| 650000 |
| 546000 |
| 442000 |
| >; |
| |
| mif,mif_clk_table = < |
| /* khz L0-L9 */ |
| 1794000 |
| 1716000 |
| 1539200 |
| 1352000 |
| 1144000 |
| 1014000 |
| 845000 |
| 676000 |
| 546000 |
| 420875 |
| >; |
| |
| mif,int_clk_table = < |
| /* khz */ |
| 690000 |
| 680000 |
| 670000 |
| 660000 |
| 650000 |
| 640000 |
| 630000 |
| 620000 |
| 610000 |
| 600000 |
| 468000 |
| 400000 |
| 336000 |
| 255000 |
| >; |
| }; |
| }; |