| /* |
| * SAMSUNG UNIVERSAL7885 board device tree source |
| * |
| * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| #include "exynos7885-rmem.dtsi" |
| #include "exynos7885.dtsi" |
| #include "exynos7885-display-lcd.dtsi" |
| #include "modem-s327ap-sipc-pdata.dtsi" |
| #include "exynos7885-mali.dtsi" |
| |
| / { |
| model = "Samsung SMDK7885 board based on EXYNOS7885"; |
| compatible = "samsung,exynos7885", "samsung,SMDK7885"; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| |
| reg = <0x0 0x80000000 0x80000000>; |
| }; |
| memory@880000000 { |
| device_type = "memory"; |
| reg = <0x00000008 0x80000000 0x40000000>; |
| }; |
| |
| chosen { |
| bootargs = "console=ttySAC2 root=/dev/ram0 clk_ignore_unused androidboot.hardware=samsungexynos7885 androidboot.selinux=permissive ess_setup=0x86000000 ecd_setup=normal androidboot.debug_level=0x4948 firmware_class.path=/vendor/firmware reserve-fimc=0xffffff80fa000000 epx_activate=true"; |
| linux,initrd-start = <0x84000000>; |
| linux,initrd-end = <0x840FFFFF>; |
| }; |
| |
| fixed-rate-clocks { |
| oscclk { |
| compatible = "samsung,exynos7885-oscclk"; |
| clock-frequency = <26000000>; |
| }; |
| }; |
| |
| /* USI MODE SETTINGS |
| |
| usi_mode = "hsi2c0" or "hsi2c1" or "spi" or "uart" |
| or "hsi2c0_hsi2c1" or "uart_hsi2c1" |
| */ |
| usi_2: usi@10032008 { |
| usi_mode = "spi"; |
| status = "okay"; |
| }; |
| |
| |
| serial_1: uart@13810000 { |
| status = "okay"; |
| }; |
| |
| serial_2: uart@13820000 { |
| status = "okay"; |
| }; |
| |
| i2c_4:i2c@13870000 { |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| touchscreen@20 { |
| compatible = "synaptics,rmi4"; |
| reg = <0x20>; |
| pinctrl-names = "on_state", "off_state"; |
| pinctrl-0 = <&attn_irq &vdd_on>; |
| pinctrl-1 = <&attn_input &vdd_off>; |
| synaptics,irq_gpio = <&gpa2 5 0>; |
| synaptics,irq_type = <8200>; |
| synaptics,max_coords = <1440 2560>; /* x y */ |
| synaptics,num_lines = <29 16>; /* rx tx */ |
| }; |
| }; |
| |
| pinctrl@11CB0000 { |
| attn_irq: attn-irq { |
| samsung,pins = "gpa2-5"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| attn_input: attn-input { |
| samsung,pins = "gpa2-5"; |
| samsung,pin-function = <0>; |
| samsung,pin-pud = <1>; |
| }; |
| }; |
| |
| pinctrl@139B0000 { |
| vdd_on: vdd-on { |
| samsung,pins = "gpg2-2", "gpg2-3"; |
| samsung,pin-function = <1>; |
| samsung,pin-val = <1>; |
| samsung,pin-pud = <0>; |
| }; |
| vdd_off: vdd-off { |
| samsung,pins = "gpg2-2", "gpg2-3"; |
| samsung,pin-function = <0>; |
| samsung,pin-val = <0>; |
| samsung,pin-pud = <1>; |
| }; |
| }; |
| |
| pinctrl@11CB0000 { |
| dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq { |
| samsung,pins = "gpa0-7"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <3>; |
| samsung,pin-drv = <3>; |
| }; |
| }; |
| |
| dwmmc0@13500000 { |
| status = "okay"; |
| num-slots = <1>; |
| broken-cd; |
| fixed_voltage; |
| supports-highspeed; |
| mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| mmc-hs400-1_8v; |
| supports-8bit; |
| supports-cmd23; |
| supports-erase; |
| supports-hs400-enhanced-strobe; |
| card-init-hwacg-ctrl; |
| support-cmdq; |
| fifo-depth = <0x40>; |
| non-removable; |
| desc-size = <4>; |
| card-detect-delay = <200>; |
| data-timeout = <200>; |
| hto-timeout = <80>; |
| samsung,dw-mshc-ciu-div = <3>; |
| samsung,dw-mshc-txdt-crc-timer-fastlimit = <0x13>; |
| samsung,dw-mshc-txdt-crc-timer-initval = <0x15>; |
| samsung,dw-mshc-hs400-delay-line = <0x60>; |
| samsung,dw-mshc-sdr-timing = <3 0 4 0>; |
| samsung,dw-mshc-ddr-timing = <3 0 4 2>; |
| samsung,dw-mshc-hs200-timing = <3 0 3 0>; |
| samsung,dw-mshc-hs400-timing = <1 0 4 0>; |
| samsung,dw-mshc-hs400-ulp-timing = <3 0 4 0>; |
| |
| num-ref-clks = <12>; |
| ciu_clkin = <25 50 50 25 50 100 200 50 50 200 200 200>; |
| |
| /* Swapping clock drive strength */ |
| clk-drive-number = <4>; |
| pinctrl-names = "default", |
| "fast-slew-rate-1x", |
| "fast-slew-rate-2x", |
| "fast-slew-rate-3x", |
| "fast-slew-rate-4x"; |
| pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_rdqs &sd0_bus1 &sd0_bus4 &sd0_bus8>; |
| pinctrl-1 = <&sd0_clk_fast_slew_rate_1x>; |
| pinctrl-2 = <&sd0_clk_fast_slew_rate_2x>; |
| pinctrl-3 = <&sd0_clk_fast_slew_rate_3x>; |
| pinctrl-4 = <&sd0_clk_fast_slew_rate_4x>; |
| slot@0 { |
| reg = <0>; |
| bus-width = <8>; |
| }; |
| |
| }; |
| |
| dwmmc1@13510000 { |
| status = "disabled"; |
| num-slots = <1>; |
| channel = <1>; |
| fixed_voltage; |
| enable-cclk-on-suspend; |
| caps-control; |
| supports-highspeed; |
| supports-4bit; |
| keep-power-in-suspend; |
| pm-ignore-notify; |
| card-detect-type-external; |
| use-broken-voltage; |
| use-fine-tuning; |
| ignore-phase = <(1 << 7)>; |
| fifo-depth = <0x40>; |
| card-detect-delay = <200>; |
| data-timeout = <200>; |
| hto-timeout = <80>; |
| samsung,dw-mshc-ciu-div = <3>; |
| samsung,dw-mshc-sdr-timing = <3 0 2 0>; |
| samsung,dw-mshc-ddr-timing = <3 0 2 1>; |
| samsung,dw-mshc-sdr50-timing = <3 0 4 2>; |
| samsung,dw-mshc-sdr104-timing = <3 0 3 0>; |
| |
| num-ref-clks = <9>; |
| ciu_clkin = <25 50 50 25 50 100 200 50 50>; |
| |
| clk-drive-number = <4>; |
| pinctrl-names = "default", |
| "fast-slew-rate-1x", |
| "fast-slew-rate-2x", |
| "fast-slew-rate-3x", |
| "fast-slew-rate-4x"; |
| pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus1 &sd1_bus4>; |
| pinctrl-1 = <&sd1_clk_fast_slew_rate_1x>; |
| pinctrl-2 = <&sd1_clk_fast_slew_rate_2x>; |
| pinctrl-3 = <&sd1_clk_fast_slew_rate_3x>; |
| pinctrl-4 = <&sd1_clk_fast_slew_rate_4x>; |
| slot@0 { |
| reg = <0>; |
| bus-width = <4>; |
| }; |
| }; |
| |
| dwmmc2@13550000 { |
| status = "okay"; |
| num-slots = <1>; |
| supports-4bit; |
| supports-cmd23; |
| supports-erase; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| card-detect-gpio; |
| bypass-for-allpass; |
| use-fine-tuning; |
| card-init-hwacg-ctrl; |
| only_once_tune; |
| skip-init-mmc-scan; |
| ignore-phase = <(1 << 7)>; |
| fifo-depth = <0x40>; |
| desc-size = <4>; |
| card-detect-delay = <200>; |
| data-timeout = <200>; |
| hto-timeout = <80>; |
| samsung,dw-mshc-ciu-div = <3>; |
| clock-frequency = <800000000>; |
| samsung,dw-mshc-sdr-timing = <3 0 2 0>; |
| samsung,dw-mshc-ddr-timing = <3 0 2 1>; |
| samsung,dw-mshc-sdr50-timing = <3 0 4 2>; |
| samsung,dw-mshc-sdr104-timing = <3 0 3 0>; |
| |
| num-ref-clks = <9>; |
| ciu_clkin = <25 50 50 25 50 100 200 50 50>; |
| |
| /* Swapping clock drive strength */ |
| clk-drive-number = <4>; |
| pinctrl-names = "default", |
| "fast-slew-rate-1x", |
| "fast-slew-rate-2x", |
| "fast-slew-rate-3x", |
| "fast-slew-rate-4x"; |
| pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4 &dwmmc2_cd_ext_irq>; |
| pinctrl-1 = <&sd2_clk_fast_slew_rate_1x>; |
| pinctrl-2 = <&sd2_clk_fast_slew_rate_2x>; |
| pinctrl-3 = <&sd2_clk_fast_slew_rate_3x>; |
| pinctrl-4 = <&sd2_clk_fast_slew_rate_4x>; |
| |
| card-detect = <&gpa0 7 0xf>; |
| slot@0 { |
| reg = <0>; |
| bus-width = <4>; |
| disable-wp; |
| }; |
| }; |
| |
| dsim_0: dsim@0x14870000 { |
| lcd_info = <&s6e3fa0>; |
| decon_board = <&decon_board>; |
| }; |
| |
| decon_f: decon_f@0x14860000 { |
| psr_mode = <2>; /* 0: video mode, 1: DP command mode, 2: MIPI command mode */ |
| trig_mode = <0>; /* 0: hw trigger, 1: sw trigger */ |
| dsi_mode = <0>; /* 0: single dsi, 1: dual dsi */ |
| }; |
| |
| decon_board: decon_board { |
| gpio_lcd_en1 = <&gpg1 7 0x1>; |
| gpio_lcd_en2 = <&gpg2 0 0x1>; |
| gpio_lcd_en3 = <&gpg2 1 0x1>; |
| gpio_lcd_rst = <&gpg1 1 0x1>; |
| |
| dsim_set_panel_power_enable { |
| type = |
| "gpio,high", "gpio_lcd_en1", |
| "delay,usleep", "5000 6000", |
| "gpio,high", "gpio_lcd_en2", |
| "delay,usleep", "5000 6000", |
| "gpio,high", "gpio_lcd_en3", |
| "delay,usleep", "5000 6000"; |
| }; |
| dsim_set_panel_power_disable { |
| type = |
| "gpio,low", "gpio_lcd_rst", |
| "gpio,low", "gpio_lcd_en1", |
| "delay,usleep", "5000 6000", |
| "gpio,low", "gpio_lcd_en2", |
| "delay,usleep", "5000 6000", |
| "gpio,low", "gpio_lcd_en3", |
| "delay,usleep", "5000 6000"; |
| }; |
| dsim_reset_panel { |
| type = |
| "delay,usleep", "5000 6000", |
| "gpio,low", "gpio_lcd_rst", |
| "delay,usleep", "5000 6000", |
| "gpio,high", "gpio_lcd_rst", |
| "delay,usleep", "5000 6000"; |
| }; |
| }; |
| |
| pinctrl@11CB0000 { |
| key_power: key-power { |
| samsung,pins = "gpa1-7"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| |
| key_home: key-home { |
| samsung,pins = "gpa1-4"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| |
| key_voldown: key-voldown { |
| samsung,pins = "gpa1-6"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| |
| key_volup: key-volup { |
| samsung,pins = "gpa1-5"; |
| samsung,pin-function = <0xf>; |
| samsung,pin-pud = <0>; |
| samsung,pin-drv = <0>; |
| }; |
| |
| pmic_irq: pmic-irq { |
| samsung,pins = "gpa2-0"; |
| samsung,pin-pud = <3>; |
| samsung,pin-drv = <3>; |
| }; |
| }; |
| |
| gpio_keys { |
| status = "okay"; |
| compatible = "gpio-keys"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&key_home &key_voldown &key_volup &key_power>; |
| button@1 { |
| label = "gpio-keys: KEY_HOME"; |
| interrupts = <4 0 0>; |
| interrupt-parent = <&gpa1>; |
| linux,code = <172>; |
| gpios = <&gpa1 4 0xf>; |
| gpio-key,wakeup = <1>; |
| }; |
| button@2 { |
| label = "gpio-keys: KEY_VOLUMEDOWN"; |
| interrupts = <6 0 0>; |
| interrupt-parent = <&gpa1>; |
| linux,code = <114>; |
| gpios = <&gpa1 6 0xf>; |
| }; |
| button@3 { |
| label = "gpio-keys: KEY_VOLUMEUP"; |
| interrupts = <5 0 0>; |
| interrupt-parent = <&gpa1>; |
| linux,code = <115>; |
| gpios = <&gpa1 5 0xf>; |
| }; |
| button@4 { |
| label = "gpio-keys: KEY_POWER"; |
| interrupts = <7 0 0>; |
| interrupt-parent = <&gpa1>; |
| linux,code = <116>; |
| gpios = <&gpa1 7 0xf>; |
| gpio-key,wakeup = <1>; |
| }; |
| }; |
| |
| |
| pinctrl@139B0000 { |
| /* Warm reset information from AP */ |
| pm_wrsti: pm-wrsti { |
| samsung,pins = "gpg1-6"; |
| samsung,pin-con-pdn = <3>; |
| }; |
| }; |
| |
| speedy@11CE0000 { |
| status = "okay"; |
| |
| s2mpu08mfd@00 { |
| compatible = "samsung,s2mpu08mfd"; |
| acpm-ipc-channel = <2>; |
| i2c-speedy-address; |
| s2mpu08,wakeup = "enabled"; |
| s2mpu08,irq-gpio = <&gpa2 0 0>; |
| reg = <0x00>; |
| interrupts = <2 0 0>; |
| interrupt-parent = <&gpa2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pmic_irq &pm_wrsti>; |
| /* RTC: wtsr/smpl */ |
| wtsr_en = "enabled"; /* enable */ |
| smpl_en = "enabled"; /* enable */ |
| wtsr_timer_val = <3>; /* 1000ms */ |
| smpl_timer_val = <4>; /* 500ms */ |
| check_jigon = <0>; /* do not check jigon */ |
| /* RTC: If it's first boot, reset rtc to 1/1/2017 12:00:00(Sun) */ |
| init_time,sec = <0>; |
| init_time,min = <0>; |
| init_time,hour = <12>; |
| init_time,mday = <1>; |
| init_time,mon = <0>; |
| init_time,year = <117>; |
| init_time,wday = <0>; |
| |
| regulators { |
| b1_reg: BUCK1 { |
| regulator-name = "vdd_mif"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1100000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <2>; |
| }; |
| |
| b2_reg: BUCK2 { |
| regulator-name = "vdd_cpucl0"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| b3_reg: BUCK3 { |
| regulator-name = "vdd_cpucl1_2"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| b4_reg: BUCK4{ |
| regulator-name = "vdd_int"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <2>; |
| }; |
| |
| b5_reg: BUCK5 { |
| regulator-name = "vdd_g3d"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| b6_reg: BUCK6 { |
| regulator-name = "vdd2_mem"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| b7_reg: BUCK7 { |
| regulator-name = "vdd_lldo"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| b8_reg: BUCK8 { |
| regulator-name = "vdd_mldo"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <2100000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l1_reg: LDO1 { |
| regulator-name = "vdd_ldo1"; |
| regulator-min-microvolt = <700000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l2_reg: LDO2 { |
| regulator-name = "vqmmc"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| }; |
| |
| l3_reg: LDO3 { |
| regulator-name = "vdd_ldo3"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1950000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l4_reg: LDO4 { |
| regulator-name = "vdd_ldo4"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| l5_reg: LDO5 { |
| regulator-name = "vdd_ldo5"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l6_reg: LDO6 { |
| regulator-name = "vdd_ldo6"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l7_reg: LDO7 { |
| regulator-name = "vdd_ldo7"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1950000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l8_reg: LDO8 { |
| regulator-name = "vdd_ldo8"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l9_reg: LDO9 { |
| regulator-name = "vdd_ldo9"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <1>; |
| }; |
| |
| l10_reg: LDO10 { |
| regulator-name = "vdd_ldo10"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l11_reg: LDO11 { |
| regulator-name = "vdd_ldo11"; |
| regulator-min-microvolt = <500000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l12_reg: LDO12 { |
| regulator-name = "vdd_ldo12"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l13_reg: LDO13 { |
| regulator-name = "vdd_ldo13"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1950000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l14_reg: LDO14 { |
| regulator-name = "vdd_ldo14"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l33_reg: LDO33 { |
| regulator-name = "vdd_ldo33"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1950000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l34_reg: LDO34 { |
| regulator-name = "vdd_ldo34"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-always-on; |
| regulator-ramp-delay = <12000>; |
| regulator-initial-mode = <3>; |
| }; |
| |
| l35_reg: LDO35 { |
| regulator-name = "vmmc"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| }; |
| |
| l36_reg: LDO36 { |
| regulator-name = "vdd_ldo36"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <1950000>; |
| regulator-ramp-delay = <12000>; |
| }; |
| |
| l37_reg: LDO37 { |
| regulator-name = "vdd_ldo37"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3375000>; |
| regulator-ramp-delay = <12000>; |
| }; |
| }; |
| }; |
| }; |
| |
| exynos_rgt { |
| compatible = "samsung,exynos-rgt"; |
| }; |
| |
| usb@13600000 { |
| status = "okay"; |
| dwc3 { |
| dr_mode = "otg"; |
| maximum-speed = "high-speed"; |
| }; |
| }; |
| |
| phy@135D0000 { |
| status = "okay"; |
| |
| hs_tune_info = <&usb_hs_tune>; |
| ss_tune_info = <&usb_ss_tune>; |
| }; |
| |
| usb_hs_tune:hs_tune { |
| status = "disabled"; |
| /* value = <device host> */ |
| tx_vref = <0x3 0x3>; |
| tx_pre_emp = <0x0 0x0>; |
| tx_pre_emp_puls = <0x0 0x0>; |
| tx_res = <0x2 0x2>; |
| tx_rise = <0x1 0x1>; |
| tx_hsxv = <0x0 0x0>; |
| tx_fsls = <0x3 0x3>; |
| rx_sqrx = <0x5 0x5>; |
| compdis = <0x3 0x3>; |
| otg= <0x2 0x2>; |
| /* true : 1, false: 0 */ |
| /* <enable_user_imp user_imp_value> */ |
| enable_user_imp = <0 0>; |
| /* PHY clk : 1 , FREE clk : 0 */ |
| is_phyclock = <1>; |
| }; |
| |
| usb_ss_tune:ss_tune { |
| status = "disabled"; |
| /* value = <device host> */ |
| tx_boost_level = <0x4 0x4>; |
| tx_swing_level = <0x1 0x1>; |
| tx_swing_full = <0x7F 0x7F>; |
| tx_swing_low = <0x7F 0x7F>; |
| tx_deemphasis_mode = <0x1 0x1>; |
| tx_deemphasis_3p5db = <0x18 0x18>; |
| tx_deemphasis_6db = <0x18 0x18>; |
| enable_ssc = <0x1 0x1>; |
| ssc_range = <0x0 0x1>; |
| los_bias = <0x5 0x5>; |
| los_mask_val = <0x104 0x104>; |
| enable_fixed_rxeq_mode = <0x0 0x0>; |
| fix_rxeq_value = <0x4 0x4>; |
| set_crport_mpll_charge_pump = <0x0 0x0>; |
| set_crport_level_en = <0x0 0x0>; |
| }; |
| |
| mailbox_cp: mcu_ipc@12080000 { |
| compatible = "samsung,exynos-shd-ipc-mailbox"; |
| reg = <0x0 0x12080000 0x180>; |
| mcu,name = "mcu_ipc_cp"; |
| mcu,id = <0>; |
| interrupts = <0 55 0 >; /* MAILBOX_CP_TO_AP SPI Number */ |
| }; |
| |
| mailbox_gnss: mcu_ipc@120D0000 { |
| compatible = "samsung,exynos-shd-ipc-mailbox"; |
| reg = <0x0 0x120D0000 180>; |
| mcu,name = "mcu_ipc_gnss"; |
| mcu,id = <1>; |
| interrupts = <GIC_SPI 56 IRQ_TYPE_NONE>; |
| }; |
| |
| gnss_pdata { |
| status = "okay"; |
| |
| compatible = "samsung,gnss_shdmem_if"; |
| shmem,name = "KEPLER"; |
| shmem,device_node_name = "gnss_ipc"; |
| |
| /* ACTIVE WATCHDOG WAKEUP */ |
| interrupts = <GIC_SPI 20 IRQ_TYPE_NONE>, |
| <GIC_SPI 165 IRQ_TYPE_NONE>, |
| <GIC_SPI 164 IRQ_TYPE_NONE>; |
| interrupt-names = "ACTIVE", "WATCHDOG", "WAKEUP"; |
| |
| memory-region = <&gnss_reserved>; |
| mbox_info = <&mailbox_gnss>; |
| |
| mbx,int_ap2gnss_bcmd = <0>; |
| mbx,int_ap2gnss_req_fault_info = <1>; |
| mbx,int_ap2gnss_ipc_msg = <2>; |
| mbx,int_ap2gnss_ack_wake_set = <3>; |
| mbx,int_ap2gnss_ack_wake_clr = <4>; |
| |
| mbx,irq_gnss2ap_bcmd = <0>; |
| mbx,irq_gnss2ap_rsp_fault_info = <1>; |
| mbx,irq_gnss2ap_ipc_msg = <2>; |
| mbx,irq_gnss2ap_req_wake_clr = <4>; |
| |
| mbx,reg_bcmd_ctrl = <0>, <1>, <2>, <3>; |
| |
| reg_rx_ipc_msg = <1 5>; |
| reg_tx_ipc_msg = <1 4>; |
| reg_rx_head = <1 3>; |
| reg_rx_tail = <1 2>; |
| reg_tx_head = <1 1>; |
| reg_tx_tail = <1 0>; |
| fault_info = <1 0x200000 0x180000>; |
| |
| shmem,ipc_offset = <0x380000>; |
| shmem,ipc_size = <0x80000>; |
| shmem,ipc_reg_cnt = <32>; |
| }; |
| |
| pinctrl@139B0140 { |
| fimc_is_flash: fimc_is_flash { |
| samsung,pins = "gpg1-2"; |
| samsung,pin-function = <1>; |
| samsung,pin-val = <1>; |
| samsung,pin-pud = <0>; |
| }; |
| }; |
| |
| fimc_is@14450000 { |
| pinctrl-names = "default","release"; |
| pinctrl-0 = <>; |
| pinctrl-1 = <>; |
| |
| rear_sensor_id = <35>; /* 2L7 */ |
| front_sensor_id = <20>; /* 2P8 */ |
| use_module_check; |
| skip_cal_loading; |
| fimc_is_dvfs { |
| /* TODO: DVFS level set */ |
| #define DVFS_INT_L0 533000 |
| #define DVFS_INT_L1 333000 |
| #define DVFS_INT_L2 267000 |
| #define DVFS_INT_L3 133000 |
| #define DVFS_INT_L4 107000 |
| |
| #define DVFS_CAM_L0 690000 |
| #define DVFS_CAM_L1 680000 |
| #define DVFS_CAM_L2 670000 |
| #define DVFS_CAM_L3 660000 |
| #define DVFS_CAM_L4 650000 |
| |
| #define DVFS_MIF_L0 2093000 |
| #define DVFS_MIF_L1 2002000 |
| #define DVFS_MIF_L2 1794000 |
| #define DVFS_MIF_L3 1539000 |
| #define DVFS_MIF_L4 1352000 |
| #define DVFS_MIF_L5 1014000 |
| #define DVFS_MIF_L6 845000 |
| #define DVFS_MIF_L7 676000 |
| #define DVFS_MIF_L8 546000 |
| #define DVFS_MIF_L9 420000 |
| |
| table0 { |
| desc = "default"; |
| |
| default_int = <DVFS_INT_L0>; |
| default_cam = <DVFS_CAM_L0>; |
| default_mif = <DVFS_MIF_L5>; |
| default_i2c = <0>; |
| |
| front_preview_int = <DVFS_INT_L0>; |
| front_preview_cam = <DVFS_CAM_L3>; |
| front_preview_mif = <DVFS_MIF_L5>; |
| front_preview_i2c = <0>; |
| |
| front_video_int = <DVFS_INT_L0>; |
| front_video_cam = <DVFS_CAM_L3>; |
| front_video_mif = <DVFS_MIF_L5>; |
| front_video_i2c = <0>; |
| |
| front_vt1_int = <DVFS_INT_L0>; |
| front_vt1_cam = <DVFS_CAM_L3>; |
| front_vt1_mif = <DVFS_MIF_L5>; |
| front_vt1_i2c = <0>; |
| |
| front_vt2_int = <DVFS_INT_L0>; |
| front_vt2_cam = <DVFS_CAM_L3>; |
| front_vt2_mif = <DVFS_MIF_L5>; |
| front_vt2_i2c = <0>; |
| |
| front_vt4_int = <DVFS_INT_L0>; |
| front_vt4_cam = <DVFS_CAM_L3>; |
| front_vt4_mif = <DVFS_MIF_L5>; |
| front_vt4_i2c = <0>; |
| |
| rear_preview_int = <DVFS_INT_L0>; |
| rear_preview_cam = <DVFS_CAM_L0>; |
| rear_preview_mif = <DVFS_MIF_L5>; |
| rear_preview_i2c = <0>; |
| |
| rear_video_int = <DVFS_INT_L0>; |
| rear_video_cam = <DVFS_CAM_L0>; |
| rear_video_mif = <DVFS_MIF_L5>; |
| rear_video_i2c = <0>; |
| |
| preview_high_speed_fps_int = <DVFS_INT_L0>; |
| preview_high_speed_fps_cam = <DVFS_CAM_L3>; |
| preview_high_speed_fps_mif = <DVFS_MIF_L5>; |
| preview_high_speed_fps_i2c = <0>; |
| |
| video_high_speed_60fps_int = <DVFS_INT_L0>; |
| video_high_speed_60fps_cam = <DVFS_CAM_L2>; |
| video_high_speed_60fps_mif = <DVFS_MIF_L5>; |
| video_high_speed_60fps_i2c = <0>; |
| |
| video_high_speed_120fps_int = <DVFS_INT_L0>; |
| video_high_speed_120fps_cam = <DVFS_CAM_L3>; |
| video_high_speed_120fps_mif = <DVFS_MIF_L5>; |
| video_high_speed_120fps_i2c = <0>; |
| |
| max_int = <DVFS_INT_L0>; |
| max_cam = <DVFS_CAM_L0>; |
| max_mif = <DVFS_MIF_L5>; |
| max_i2c = <0>; |
| }; |
| |
| table1 { |
| desc = "DVFS table for HAL3"; |
| |
| default_int = <DVFS_INT_L0>; |
| default_cam = <DVFS_CAM_L0>; |
| default_mif = <DVFS_MIF_L5>; |
| default_i2c = <0>; |
| |
| front_preview_int = <DVFS_INT_L0>; |
| front_preview_cam = <DVFS_CAM_L3>; |
| front_preview_mif = <DVFS_MIF_L5>; |
| front_preview_i2c = <0>; |
| |
| front_video_int = <DVFS_INT_L0>; |
| front_video_cam = <DVFS_CAM_L3>; |
| front_video_mif = <DVFS_MIF_L5>; |
| front_video_i2c = <0>; |
| |
| front_vt1_int = <DVFS_INT_L0>; |
| front_vt1_cam = <DVFS_CAM_L3>; |
| front_vt1_mif = <DVFS_MIF_L5>; |
| front_vt1_i2c = <0>; |
| |
| front_vt2_int = <DVFS_INT_L0>; |
| front_vt2_cam = <DVFS_CAM_L3>; |
| front_vt2_mif = <DVFS_MIF_L5>; |
| front_vt2_i2c = <0>; |
| |
| front_vt4_int = <DVFS_INT_L0>; |
| front_vt4_cam = <DVFS_CAM_L3>; |
| front_vt4_mif = <DVFS_MIF_L5>; |
| front_vt4_i2c = <0>; |
| |
| rear_preview_int = <DVFS_INT_L0>; |
| rear_preview_cam = <DVFS_CAM_L0>; |
| rear_preview_mif = <DVFS_MIF_L5>; |
| rear_preview_i2c = <0>; |
| |
| rear_video_int = <DVFS_INT_L0>; |
| rear_video_cam = <DVFS_CAM_L0>; |
| rear_video_mif = <DVFS_MIF_L5>; |
| rear_video_i2c = <0>; |
| |
| preview_high_speed_fps_int = <DVFS_INT_L0>; |
| preview_high_speed_fps_cam = <DVFS_CAM_L3>; |
| preview_high_speed_fps_mif = <DVFS_MIF_L5>; |
| preview_high_speed_fps_i2c = <0>; |
| |
| video_high_speed_60fps_int = <DVFS_INT_L0>; |
| video_high_speed_60fps_cam = <DVFS_CAM_L3>; |
| video_high_speed_60fps_mif = <DVFS_MIF_L5>; |
| video_high_speed_60fps_i2c = <0>; |
| |
| video_high_speed_120fps_int = <DVFS_INT_L0>; |
| video_high_speed_120fps_cam = <DVFS_CAM_L3>; |
| video_high_speed_120fps_mif = <DVFS_MIF_L5>; |
| video_high_speed_120fps_i2c = <0>; |
| |
| max_int = <DVFS_INT_L0>; |
| max_cam = <DVFS_CAM_L0>; |
| max_mif = <DVFS_MIF_L5>; |
| max_i2c = <0>; |
| }; |
| }; |
| }; |
| |
| fimc_is_sensor_2l7: fimc-is_sensor_2l7@20 { |
| compatible = "samsung,sensor-module-2l7"; |
| |
| pinctrl-names = "pin0", "pin1", "pin2", "release"; |
| pinctrl-0 = <>; |
| pinctrl-1 = <&fimc_is_mclk0_out>; |
| pinctrl-2 = <&fimc_is_mclk0_fn>; |
| pinctrl-3 = <>; |
| |
| position = <0>; /* Rear:0. Front:1 */ |
| id = <0>; /* bns_id */ |
| mclk_ch = <0>; |
| |
| gpio_mclk = <&gpc0 0 0x1>; |
| gpio_reset = <&gpc2 0 0x1>; /* sensor reset */ |
| gpio_svdd10_en = <&gpg2 4 0x1>; /* CAM_SVDD10_EN */ |
| gpio_svdda28_en = <&gpg2 6 0x1>; /* CAM_SVDDA28_EN */ |
| gpio_svddd18_en = <&gpg2 5 0x1>; /* CAM_SVDDD18_EN */ |
| gpio_vdd28_af_en = <&gpg2 7 0x1>; /* CAM_SVDDD18_EN */ |
| status = "okay"; |
| |
| /* TODO: AF, Flash node */ |
| af { |
| product_name = <12>; /* ak7371 */ |
| i2c_addr = <0x18>; |
| i2c_ch = <0>; /* I2C 0 */ |
| }; |
| |
| }; |
| |
| fimc_is_sensor_3m3: fimc-is_sensor_3m3@20 { |
| compatible = "samsung,sensor-module-3m3"; |
| |
| pinctrl-names = "pin0", "pin1", "pin2", "release"; |
| pinctrl-0 = <>; |
| pinctrl-1 = <&fimc_is_mclk0_out>; |
| pinctrl-2 = <&fimc_is_mclk0_fn>; |
| pinctrl-3 = <>; |
| |
| position = <3>; /* Rear:0. Front:1 */ |
| id = <1>; /* bns_id */ |
| mclk_ch = <0>; |
| |
| gpio_mclk = <&gpc0 0 0x1>; |
| gpio_reset = <&gpc2 1 0x1>; /* sensor reset */ |
| gpio_cam_1p0_en = <&gpg3 0 0x1>; /* CAM_SVDD10_EN */ |
| gpio_cam_2p8_en = <&gpg3 2 0x1>; /* CAM_SVDDA28_EN */ |
| gpio_camio_1p8_en = <&gpg3 1 0x1>; /* CAM_SVDDD18_EN */ |
| gpio_cam_af_2p8_en = <&gpg3 3 0x1>; /* CAM_SVDDD18_EN */ |
| |
| power_seq_id = <1>; |
| |
| status = "okay"; |
| |
| /* TODO: AF, Flash node */ |
| af { |
| product_name = <100>; /* ak7371 */ |
| }; |
| |
| }; |
| |
| fimc_is_sensor_2p8: fimc-is_sensor_2p8@5A { |
| compatible = "samsung,sensor-module-2p8"; |
| |
| pinctrl-names = "pin0", "pin1", "pin2", "release"; |
| pinctrl-0 = <>; |
| pinctrl-1 = <&fimc_is_mclk1_out>; |
| pinctrl-2 = <&fimc_is_mclk1_fn>; |
| pinctrl-3 = <>; |
| |
| position = <1>; /* Rear:0. Front:1 */ |
| id = <2>; /* bns_id */ |
| mclk_ch = <1>; |
| |
| gpio_mclk = <&gpc0 1 0x1>; |
| gpio_reset = <&gpc2 2 0x1>; /* sensor reset */ |
| gpio_dvdd_en = <&gpc2 5 0x1>; /* FRONT_CAM_DVDD_1V2_EN */ |
| gpio_dovdd_en = <&gpc2 6 0x1>; /* FRONT_CAM_DOVDD_1V8_EN */ |
| gpio_af_en = <&gpc2 7 0x1>; /* FRONT_CAM_AF_2V8_EN */ |
| status = "okay"; |
| |
| af { |
| product_name = <7>; |
| i2c_addr = <0x18>; |
| i2c_ch = <1>; /* I2C 1 */ |
| }; |
| }; |
| |
| fimc_is_sensor_5e2: fimc-is_sensor_5e2@20 { |
| compatible = "samsung,sensor-module-5e2"; |
| |
| pinctrl-names = "pin0", "pin1", "pin2", "release"; |
| pinctrl-0 = <>; |
| pinctrl-1 = <&fimc_is_mclk2_out>; |
| pinctrl-2 = <&fimc_is_mclk2_fn>; |
| pinctrl-3 = <>; |
| |
| position = <3>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */ |
| id = <3>; /* fimc_is_sensor id */ |
| mclk_ch = <2>; |
| |
| gpio_mclk = <&gpc0 2 0x1>; |
| gpio_reset = <&gpc2 4 0x1>; /* sensor reset */ |
| gpio_dvdd_en = <&gpc2 5 0x1>; /* FRONT_CAM_DVDD_1V2_EN */ |
| gpio_dovdd_en = <&gpc2 6 0x1>; /* FRONT_CAM_DOVDD_1V8_EN */ |
| gpio_af_en = <&gpc2 7 0x1>; /* FRONT_CAM_AF_2V8_EN */ |
| status = "okay"; |
| |
| /* TODO: AF, Flash node */ |
| af { |
| product_name = <100>; /* ak7371 */ |
| }; |
| }; |
| |
| #define SENSOR_SCENARIO_NORMAL 0 |
| #define SENSOR_SCENARIO_VISION 1 |
| #define SENSOR_SCENARIO_EXTERNAL 2 |
| #define SENSOR_SCENARIO_OIS_FACTORY 3 |
| #define SENSOR_SCENARIO_VIRTUAL 9 |
| #define FLITE_ID_NOTHING 100 |
| |
| fimc_is_sensor0: fimc_is_sensor@14410000 { |
| scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ |
| id = <0>; |
| csi_ch = <1>; |
| flite_ch = <FLITE_ID_NOTHING>; |
| is_bns = <0>; |
| is_flite = <0>; |
| status = "okay"; |
| }; |
| |
| fimc_is_sensor1: fimc_is_sensor@14400000 { |
| scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ |
| id = <1>; |
| csi_ch = <0>; |
| flite_ch = <FLITE_ID_NOTHING>; |
| is_bns = <0>; |
| is_flite = <0>; |
| status = "okay"; |
| }; |
| |
| fimc_is_sensor2: fimc_is_sensor@14420000 { |
| scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ |
| id = <2>; |
| csi_ch = <2>; |
| flite_ch = <FLITE_ID_NOTHING>; |
| is_bns = <0>; |
| is_flite = <0>; |
| status = "okay"; |
| }; |
| |
| fimc_is_sensor3: fimc_is_sensor@14430000 { |
| scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ |
| id = <3>; |
| csi_ch = <3>; |
| flite_ch = <FLITE_ID_NOTHING>; |
| is_bns = <0>; |
| is_flite = <0>; |
| status = "okay"; |
| }; |
| |
| hsi2c_0: hsi2c@138A0000 { |
| gpios = <&gpc1 0 0 &gpc1 1 0>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pinctrl-names = "on_i2c"; |
| pinctrl-0 = <&hs_i2c0_bus>; |
| |
| fimc-is-2l7@2d { |
| compatible = "samsung,exynos5-fimc-is-cis-2l7"; |
| reg = <0x2d>; /* 1 bit right shift */ |
| id = <0>; /* matching sensor id */ |
| setfile = "setB"; |
| }; |
| |
| fimc-is-actuator@50 { |
| compatible = "samsung,exynos5-fimc-is-actuator-ak7371"; |
| reg = <0x50>; |
| id = <0>; |
| place = <0>; |
| }; |
| }; |
| |
| hsi2c_1: hsi2c@138B0000 { |
| gpios = <&gpc1 2 0 &gpc1 3 0>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pinctrl-names = "on_i2c"; |
| pinctrl-0 = <&hs_i2c1_bus>; |
| |
| fimc-is-3m3@2d { |
| compatible = "samsung,exynos5-fimc-is-cis-3m3"; |
| reg = <0x10>; /* 1 bit right shift */ |
| id = <1>; /* matching sensor id */ |
| setfile = "default"; |
| }; |
| }; |
| |
| hsi2c_2: hsi2c@138C0000 { |
| gpios = <&gpc1 4 0 &gpc1 5 0>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pinctrl-names = "on_i2c"; |
| pinctrl-0 = <&hs_i2c2_bus>; |
| |
| fimc-is-2p8@2D { |
| compatible = "samsung,exynos5-fimc-is-cis-2p8"; |
| reg = <0x2d>; /* 1 bit right shift */ |
| id = <2>; /* matching sensor id */ |
| setfile = "default"; |
| }; |
| |
| fimc-is-actuator@0C { |
| compatible = "samsung,exynos5-fimc-is-actuator-ak7345"; |
| reg = <0x0C>; |
| id = <2>; |
| place = <1>; |
| }; |
| |
| }; |
| |
| hsi2c_3: hsi2c@138D0000 { |
| gpios = <&gpc1 6 0 &gpc1 7 0>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pinctrl-names = "on_i2c"; |
| pinctrl-0 = <&hs_i2c3_bus>; |
| |
| fimc-is-5e2@2D { |
| compatible = "samsung,exynos5-fimc-is-cis-5e2"; |
| reg = <0x10>; /* 1 bit right shift */ |
| id = <3>; /* matching sensor id */ |
| setfile = "default"; |
| }; |
| }; |
| }; |
| |
| #include "exynos7885-ecd.dtsi" |