| /* |
| * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /* AM437x SK EVM */ |
| |
| /dts-v1/; |
| |
| #include "am4372.dtsi" |
| #include <dt-bindings/pinctrl/am43xx.h> |
| #include <dt-bindings/pwm/pwm.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| model = "TI AM437x SK EVM"; |
| compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; |
| |
| aliases { |
| display0 = &lcd0; |
| }; |
| |
| /* fixed 32k external oscillator clock */ |
| clk_32k_rtc: clk_32k_rtc { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <32768>; |
| }; |
| |
| backlight { |
| compatible = "pwm-backlight"; |
| pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; |
| brightness-levels = <0 51 53 56 62 75 101 152 255>; |
| default-brightness-level = <8>; |
| }; |
| |
| sound { |
| compatible = "simple-audio-card"; |
| simple-audio-card,name = "AM437x-SK-EVM"; |
| simple-audio-card,widgets = |
| "Headphone", "Headphone Jack", |
| "Line", "Line In"; |
| simple-audio-card,routing = |
| "Headphone Jack", "HPLOUT", |
| "Headphone Jack", "HPROUT", |
| "LINE1L", "Line In", |
| "LINE1R", "Line In"; |
| simple-audio-card,format = "dsp_b"; |
| simple-audio-card,bitclock-master = <&sound_master>; |
| simple-audio-card,frame-master = <&sound_master>; |
| simple-audio-card,bitclock-inversion; |
| |
| simple-audio-card,cpu { |
| sound-dai = <&mcasp1>; |
| }; |
| |
| sound_master: simple-audio-card,codec { |
| sound-dai = <&tlv320aic3106>; |
| system-clock-frequency = <24000000>; |
| }; |
| }; |
| |
| matrix_keypad: matrix_keypad@0 { |
| compatible = "gpio-matrix-keypad"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&matrix_keypad_pins>; |
| |
| debounce-delay-ms = <5>; |
| col-scan-delay-us = <5>; |
| |
| row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ |
| &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ |
| |
| col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ |
| &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ |
| |
| linux,keymap = < |
| MATRIX_KEY(0, 0, KEY_DOWN) |
| MATRIX_KEY(0, 1, KEY_RIGHT) |
| MATRIX_KEY(1, 0, KEY_LEFT) |
| MATRIX_KEY(1, 1, KEY_UP) |
| >; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&leds_pins>; |
| |
| led@0 { |
| label = "am437x-sk:red:heartbeat"; |
| gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ |
| linux,default-trigger = "heartbeat"; |
| default-state = "off"; |
| }; |
| |
| led@1 { |
| label = "am437x-sk:green:mmc1"; |
| gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ |
| linux,default-trigger = "mmc0"; |
| default-state = "off"; |
| }; |
| |
| led@2 { |
| label = "am437x-sk:blue:cpu0"; |
| gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ |
| linux,default-trigger = "cpu0"; |
| default-state = "off"; |
| }; |
| |
| led@3 { |
| label = "am437x-sk:blue:usr3"; |
| gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ |
| default-state = "off"; |
| }; |
| }; |
| |
| lcd0: display { |
| compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; |
| label = "lcd"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&lcd_pins>; |
| |
| enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| |
| panel-timing { |
| clock-frequency = <9000000>; |
| hactive = <480>; |
| vactive = <272>; |
| hfront-porch = <2>; |
| hback-porch = <2>; |
| hsync-len = <41>; |
| vfront-porch = <2>; |
| vback-porch = <2>; |
| vsync-len = <10>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <1>; |
| }; |
| |
| port { |
| lcd_in: endpoint { |
| remote-endpoint = <&dpi_out>; |
| }; |
| }; |
| }; |
| }; |
| |
| &am43xx_pinmux { |
| matrix_keypad_pins: matrix_keypad_pins { |
| pinctrl-single,pins = < |
| 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ |
| 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ |
| 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ |
| 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ |
| >; |
| }; |
| |
| leds_pins: leds_pins { |
| pinctrl-single,pins = < |
| 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ |
| 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ |
| 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ |
| 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ |
| >; |
| }; |
| |
| i2c0_pins: i2c0_pins { |
| pinctrl-single,pins = < |
| 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| >; |
| }; |
| |
| i2c1_pins: i2c1_pins { |
| pinctrl-single,pins = < |
| 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ |
| 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ |
| >; |
| }; |
| |
| mmc1_pins: pinmux_mmc1_pins { |
| pinctrl-single,pins = < |
| 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ |
| 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ |
| 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ |
| 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ |
| 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ |
| 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ |
| 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ |
| >; |
| }; |
| |
| ecap0_pins: backlight_pins { |
| pinctrl-single,pins = < |
| 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ |
| >; |
| }; |
| |
| edt_ft5306_ts_pins: edt_ft5306_ts_pins { |
| pinctrl-single,pins = < |
| 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ |
| 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ |
| >; |
| }; |
| |
| vpfe0_pins_default: vpfe0_pins_default { |
| pinctrl-single,pins = < |
| 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ |
| 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ |
| 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ |
| 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ |
| 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ |
| 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ |
| 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ |
| 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ |
| 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ |
| 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ |
| 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ |
| 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ |
| 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ |
| 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ |
| 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ |
| >; |
| }; |
| |
| vpfe0_pins_sleep: vpfe0_pins_sleep { |
| pinctrl-single,pins = < |
| 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) |
| >; |
| }; |
| |
| cpsw_default: cpsw_default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ |
| 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
| 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
| 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
| 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ |
| 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ |
| 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ |
| 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
| 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
| 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
| 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ |
| 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ |
| |
| /* Slave 2 */ |
| 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ |
| 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ |
| 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ |
| 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ |
| 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ |
| 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ |
| 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ |
| 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ |
| 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ |
| 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ |
| 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ |
| 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ |
| >; |
| }; |
| |
| cpsw_sleep: cpsw_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 reset value */ |
| 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| |
| /* Slave 2 reset value */ |
| 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| >; |
| }; |
| |
| davinci_mdio_default: davinci_mdio_default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
| 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ |
| >; |
| }; |
| |
| davinci_mdio_sleep: davinci_mdio_sleep { |
| pinctrl-single,pins = < |
| /* MDIO reset value */ |
| 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| >; |
| }; |
| |
| dss_pins: dss_pins { |
| pinctrl-single,pins = < |
| 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ |
| 0x024 (PIN_OUTPUT | MUX_MODE1) |
| 0x028 (PIN_OUTPUT | MUX_MODE1) |
| 0x02c (PIN_OUTPUT | MUX_MODE1) |
| 0x030 (PIN_OUTPUT | MUX_MODE1) |
| 0x034 (PIN_OUTPUT | MUX_MODE1) |
| 0x038 (PIN_OUTPUT | MUX_MODE1) |
| 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ |
| 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ |
| 0x0a4 (PIN_OUTPUT | MUX_MODE0) |
| 0x0a8 (PIN_OUTPUT | MUX_MODE0) |
| 0x0ac (PIN_OUTPUT | MUX_MODE0) |
| 0x0b0 (PIN_OUTPUT | MUX_MODE0) |
| 0x0b4 (PIN_OUTPUT | MUX_MODE0) |
| 0x0b8 (PIN_OUTPUT | MUX_MODE0) |
| 0x0bc (PIN_OUTPUT | MUX_MODE0) |
| 0x0c0 (PIN_OUTPUT | MUX_MODE0) |
| 0x0c4 (PIN_OUTPUT | MUX_MODE0) |
| 0x0c8 (PIN_OUTPUT | MUX_MODE0) |
| 0x0cc (PIN_OUTPUT | MUX_MODE0) |
| 0x0d0 (PIN_OUTPUT | MUX_MODE0) |
| 0x0d4 (PIN_OUTPUT | MUX_MODE0) |
| 0x0d8 (PIN_OUTPUT | MUX_MODE0) |
| 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ |
| 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ |
| 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ |
| 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ |
| 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ |
| |
| >; |
| }; |
| |
| qspi_pins: qspi_pins { |
| pinctrl-single,pins = < |
| 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ |
| 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ |
| 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ |
| 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ |
| 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ |
| 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ |
| >; |
| }; |
| |
| mcasp1_pins: mcasp1_pins { |
| pinctrl-single,pins = < |
| 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ |
| 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ |
| 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ |
| 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ |
| >; |
| }; |
| |
| mcasp1_pins_sleep: mcasp1_pins_sleep { |
| pinctrl-single,pins = < |
| 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| >; |
| }; |
| |
| lcd_pins: lcd_pins { |
| pinctrl-single,pins = < |
| 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ |
| >; |
| }; |
| |
| usb1_pins: usb1_pins { |
| pinctrl-single,pins = < |
| 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ |
| >; |
| }; |
| |
| usb2_pins: usb2_pins { |
| pinctrl-single,pins = < |
| 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ |
| >; |
| }; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins>; |
| clock-frequency = <400000>; |
| |
| tps@24 { |
| compatible = "ti,tps65218"; |
| reg = <0x24>; |
| interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| dcdc1: regulator-dcdc1 { |
| compatible = "ti,tps65218-dcdc1"; |
| /* VDD_CORE limits min of OPP50 and max of OPP100 */ |
| regulator-name = "vdd_core"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <1144000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc2: regulator-dcdc2 { |
| compatible = "ti,tps65218-dcdc2"; |
| /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ |
| regulator-name = "vdd_mpu"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <1378000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc3: regulator-dcdc3 { |
| compatible = "ti,tps65218-dcdc3"; |
| regulator-name = "vdds_ddr"; |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc4: regulator-dcdc4 { |
| compatible = "ti,tps65218-dcdc4"; |
| regulator-name = "v3_3d"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo1: regulator-ldo1 { |
| compatible = "ti,tps65218-ldo1"; |
| regulator-name = "v1_8d"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| power-button { |
| compatible = "ti,tps65218-pwrbutton"; |
| status = "okay"; |
| interrupts = <3 IRQ_TYPE_EDGE_BOTH>; |
| }; |
| }; |
| |
| at24@50 { |
| compatible = "at24,24c256"; |
| pagesize = <64>; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_pins>; |
| clock-frequency = <400000>; |
| |
| edt-ft5306@38 { |
| status = "okay"; |
| compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&edt_ft5306_ts_pins>; |
| |
| reg = <0x38>; |
| interrupt-parent = <&gpio0>; |
| interrupts = <31 IRQ_TYPE_EDGE_FALLING>; |
| |
| reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; |
| |
| touchscreen-size-x = <480>; |
| touchscreen-size-y = <272>; |
| |
| wakeup-source; |
| }; |
| |
| tlv320aic3106: tlv320aic3106@1b { |
| #sound-dai-cells = <0>; |
| compatible = "ti,tlv320aic3106"; |
| reg = <0x1b>; |
| status = "okay"; |
| |
| /* Regulators */ |
| AVDD-supply = <&dcdc4>; |
| IOVDD-supply = <&dcdc4>; |
| DRVDD-supply = <&dcdc4>; |
| DVDD-supply = <&ldo1>; |
| }; |
| |
| lis331dlh@18 { |
| compatible = "st,lis331dlh"; |
| reg = <0x18>; |
| status = "okay"; |
| |
| Vdd-supply = <&dcdc4>; |
| Vdd_IO-supply = <&dcdc4>; |
| interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; |
| }; |
| }; |
| |
| &epwmss0 { |
| status = "okay"; |
| }; |
| |
| &ecap0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ecap0_pins>; |
| }; |
| |
| &gpio0 { |
| status = "okay"; |
| }; |
| |
| &gpio1 { |
| status = "okay"; |
| }; |
| |
| &gpio5 { |
| status = "okay"; |
| }; |
| |
| &mmc1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins>; |
| |
| vmmc-supply = <&dcdc4>; |
| bus-width = <4>; |
| cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &usb2_phy1 { |
| status = "okay"; |
| }; |
| |
| &usb1 { |
| dr_mode = "peripheral"; |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&usb1_pins>; |
| }; |
| |
| &usb2_phy2 { |
| status = "okay"; |
| }; |
| |
| &usb2 { |
| dr_mode = "host"; |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&usb2_pins>; |
| }; |
| |
| &qspi { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&qspi_pins>; |
| |
| spi-max-frequency = <48000000>; |
| m25p80@0 { |
| compatible = "mx66l51235l"; |
| spi-max-frequency = <48000000>; |
| reg = <0>; |
| spi-cpol; |
| spi-cpha; |
| spi-tx-bus-width = <1>; |
| spi-rx-bus-width = <4>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| /* MTD partition table. |
| * The ROM checks the first 512KiB |
| * for a valid file to boot(XIP). |
| */ |
| partition@0 { |
| label = "QSPI.U_BOOT"; |
| reg = <0x00000000 0x000080000>; |
| }; |
| partition@1 { |
| label = "QSPI.U_BOOT.backup"; |
| reg = <0x00080000 0x00080000>; |
| }; |
| partition@2 { |
| label = "QSPI.U-BOOT-SPL_OS"; |
| reg = <0x00100000 0x00010000>; |
| }; |
| partition@3 { |
| label = "QSPI.U_BOOT_ENV"; |
| reg = <0x00110000 0x00010000>; |
| }; |
| partition@4 { |
| label = "QSPI.U-BOOT-ENV.backup"; |
| reg = <0x00120000 0x00010000>; |
| }; |
| partition@5 { |
| label = "QSPI.KERNEL"; |
| reg = <0x00130000 0x0800000>; |
| }; |
| partition@6 { |
| label = "QSPI.FILESYSTEM"; |
| reg = <0x00930000 0x36D0000>; |
| }; |
| }; |
| }; |
| |
| &mac { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_default>; |
| pinctrl-1 = <&cpsw_sleep>; |
| dual_emac = <1>; |
| status = "okay"; |
| }; |
| |
| &davinci_mdio { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_default>; |
| pinctrl-1 = <&davinci_mdio_sleep>; |
| status = "okay"; |
| }; |
| |
| &cpsw_emac0 { |
| phy_id = <&davinci_mdio>, <4>; |
| phy-mode = "rgmii"; |
| dual_emac_res_vlan = <1>; |
| }; |
| |
| &cpsw_emac1 { |
| phy_id = <&davinci_mdio>, <5>; |
| phy-mode = "rgmii"; |
| dual_emac_res_vlan = <2>; |
| }; |
| |
| &elm { |
| status = "okay"; |
| }; |
| |
| &mcasp1 { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&mcasp1_pins>; |
| pinctrl-1 = <&mcasp1_pins_sleep>; |
| |
| status = "okay"; |
| |
| op-mode = <0>; |
| tdm-slots = <2>; |
| serial-dir = < |
| 0 0 1 2 |
| >; |
| |
| tx-num-evt = <1>; |
| rx-num-evt = <1>; |
| }; |
| |
| &dss { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&dss_pins>; |
| |
| port { |
| dpi_out: endpoint@0 { |
| remote-endpoint = <&lcd_in>; |
| data-lines = <24>; |
| }; |
| }; |
| }; |
| |
| &rtc { |
| clocks = <&clk_32k_rtc>, <&clk_32768_ck>; |
| clock-names = "ext-clk", "int-clk"; |
| status = "okay"; |
| }; |
| |
| &wdt { |
| status = "okay"; |
| }; |
| |
| &cpu { |
| cpu0-supply = <&dcdc2>; |
| }; |
| |
| &vpfe0 { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&vpfe0_pins_default>; |
| pinctrl-1 = <&vpfe0_pins_sleep>; |
| |
| /* Camera port */ |
| port { |
| vpfe0_ep: endpoint { |
| /* remote-endpoint = <&sensor>; add once we have it */ |
| ti,am437x-vpfe-interface = <0>; |
| bus-width = <8>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| }; |
| }; |
| }; |