Tim Zimmermann | 6a834b7 | 2020-09-03 09:11:59 +0200 | [diff] [blame] | 1 | #include <linux/kernel.h> |
| 2 | #include <linux/module.h> |
| 3 | #include <linux/types.h> |
| 4 | #include <asm/cacheflush.h> |
| 5 | #include <asm/irqflags.h> |
| 6 | #include <linux/fs.h> |
| 7 | #include <asm/tlbflush.h> |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/io.h> |
| 10 | #include <asm/topology.h> |
| 11 | #include <asm/memory.h> |
| 12 | #include <asm/system_misc.h> |
| 13 | |
| 14 | #include <linux/uh.h> |
| 15 | #include <linux/uh_fault_handler.h> |
| 16 | |
| 17 | DEFINE_SPINLOCK(uh_fault_lock); |
| 18 | |
| 19 | static const char *exception_class_string[] = { |
| 20 | [esr_ec_unknown_reason] |
| 21 | = "[EL2 EXCEPTION] unknown reason", |
| 22 | [esr_ec_wfi_or_wfe_instruction_execution] |
| 23 | = "[EL2 EXCEPTION] wfi or wfe instruction execution", |
| 24 | [esr_ec_mcr_or_mrc_access_to_cp15] |
| 25 | = "[EL2 EXCEPTION] mcr or mrc access to cp15", |
| 26 | [esr_ec_mcrr_or_mrrc_access_to_cp15] |
| 27 | = "[EL2 EXCEPTION] mcrr or mrrc access to cp15", |
| 28 | [esr_ec_mcr_or_mrc_access_to_cp14] |
| 29 | = "[EL2 EXCEPTION] mcr or mrc access to cp14", |
| 30 | [esr_ec_ldc_or_stc_access_to_cp14] |
| 31 | = "[EL2 EXCEPTION] ldc or stc access to cp14", |
| 32 | [esr_ec_access_to_simd_or_floating_point_registers] |
| 33 | = "[EL2 EXCEPTION] access to simd or floating point registers", |
| 34 | [esr_ec_trapped_mrc_or_mrs_access_to_cp10_for_id_group_traps] |
| 35 | = "[EL2 EXCEPTION] trapped mrc or mrs access to cp10 for id group traps", |
| 36 | [esr_ec_trapped_mrrc_or_mcrr_access_to_cp14] |
| 37 | = "[EL2 EXCEPTION] trapped mrrc or mcrr access to cp14", |
| 38 | [esr_ec_illegal_execution_state] |
| 39 | = "[EL2 EXCEPTION] illegal execution state", |
| 40 | [esr_ec_aarch32_svc_instruction_execution] |
| 41 | = "[EL2 EXCEPTION] aarch32 svc instruction execution", |
| 42 | [esr_ec_aarch32_hvc_instruction_execution] |
| 43 | = "[EL2 EXCEPTION] aarch32 hvc instruction execution", |
| 44 | [esr_ec_aarch32_smc_instruction_execution] |
| 45 | = "[EL2 EXCEPTION] aarch32 smc instruction execution", |
| 46 | [esr_ec_aarch64_svc_instruction_execution] |
| 47 | = "[EL2 EXCEPTION] aarch64 svc instruction execution", |
| 48 | [esr_ec_aarch64_hvc_instruction_execution] |
| 49 | = "[EL2 EXCEPTION] aarch64 hvc instruction execution", |
| 50 | [esr_ec_aarch64_smc_instruction_execution] |
| 51 | = "[EL2 EXCEPTION] aarch64 smc instruction execution", |
| 52 | [esr_ec_other_msr_mrs_or_system_instruction_execution] |
| 53 | = "[EL2 EXCEPTION] other msr mrs or system instruction execution", |
| 54 | [esr_ec_prefetch_abort_from_a_lower_exception_level] |
| 55 | = "[EL2 EXCEPTION] prefetch abort from a lower exception level", |
| 56 | [esr_ec_prefetch_abort_taken_without_a_change_in_exception_level] |
| 57 | = "[EL2 EXCEPTION] prefetch abort taken without a change in exception level", |
| 58 | [esr_ec_misaligned_pc_exception] |
| 59 | = "[EL2 EXCEPTION] misaligned pc exception", |
| 60 | [esr_ec_data_abort_from_a_lower_exception_level] |
| 61 | = "[EL2 EXCEPTION] data abort from a lower exception level", |
| 62 | [esr_ec_data_abort_taken_without_a_change_in_exception_level] |
| 63 | = "[EL2 EXCEPTION] data abort taken without a change in exception level", |
| 64 | [esr_ec_stack_pointer_alignment_exception] |
| 65 | = "[EL2 EXCEPTION] stack pointer alignment exception", |
| 66 | [esr_ec_aarch32_floating_point_exception] |
| 67 | = "[EL2 EXCEPTION] aarch32 floating point exception", |
| 68 | [esr_ec_aarch64_floating_point_exception] |
| 69 | = "[EL2 EXCEPTION] aarch64 floating point exception", |
| 70 | [esr_ec_serror_interrupt] |
| 71 | = "[EL2 EXCEPTION] serror interrupt", |
| 72 | [esr_ec_breakpoint_exception_from_a_lower_exception_level] |
| 73 | = "[EL2 EXCEPTION] breakpoint exception from a lower exception level", |
| 74 | [esr_ec_breakpoint_exception_taken_without_a_change_in_exception_level] |
| 75 | = "[EL2 EXCEPTION] breakpoint exception taken without a change in exception level", |
| 76 | [esr_ec_software_step_exception_taken_from_a_lower_exception_level] |
| 77 | = "[EL2 EXCEPTION] software step exception taken from a lower exception level", |
| 78 | [esr_ec_software_step_exception_taken_without_a_change_in_exception_level] |
| 79 | = "[EL2 EXCEPTION] software step exception taken without a change in exception level", |
| 80 | [esr_ec_watchpoint_exception_from_a_lower_exception_level] |
| 81 | = "[EL2 EXCEPTION] watchpoint exception from a lower exception level", |
| 82 | [esr_ec_watchpoint_exception_taken_without_a_change_in_exception_level] |
| 83 | = "[EL2 EXCEPTION] watchpoint exception taken without a change in exception level", |
| 84 | [esr_ec_bkpt_instruction_execution] |
| 85 | = "[EL2 EXCEPTION] bkpt instruction execution", |
| 86 | [esr_ec_vector_catch_exception_from_aach32_state] |
| 87 | = "[EL2 EXCEPTION] vector catch exception from aach32 state", |
| 88 | [esr_ec_brk_instruction_execution] |
| 89 | = "[EL2 EXCEPTION] brk instruction execution", |
| 90 | }; |
| 91 | |
| 92 | static uh_handler_list_t uh_handler_list; |
| 93 | |
| 94 | void uh_fault_handler(void) |
| 95 | { |
| 96 | unsigned int cpu; |
| 97 | uh_handler_data_t *uh_handler_data; |
| 98 | u32 exception_class; |
| 99 | unsigned long flags; |
| 100 | struct pt_regs regs; |
| 101 | |
| 102 | spin_lock_irqsave(&uh_fault_lock, flags); |
| 103 | |
| 104 | cpu = smp_processor_id(); |
| 105 | uh_handler_data = &uh_handler_list.uh_handler_data[cpu]; |
| 106 | exception_class = uh_handler_data->esr_el2.ec; |
| 107 | |
| 108 | if (!exception_class_string[exception_class] |
| 109 | || exception_class > esr_ec_brk_instruction_execution) |
| 110 | exception_class = esr_ec_unknown_reason; |
| 111 | pr_alert("=============uH fault handler logging=============\n"); |
| 112 | pr_alert("%s",exception_class_string[exception_class]); |
Tim Zimmermann | f5a8669 | 2020-12-25 08:39:43 +0100 | [diff] [blame] | 113 | pr_alert("[System registers] on CPU %d\n", cpu); |
Tim Zimmermann | 6a834b7 | 2020-09-03 09:11:59 +0200 | [diff] [blame] | 114 | pr_alert("ESR_EL2: %x\tHCR_EL2: %llx\tHPFAR_EL2: %llx\n", |
| 115 | uh_handler_data->esr_el2.bits, |
| 116 | uh_handler_data->hcr_el2, uh_handler_data->hpfar_el2); |
| 117 | pr_alert("FAR_EL2: %llx\tELR_EL2: %llx\n", uh_handler_data->far_el2, |
| 118 | uh_handler_data->elr_el2); |
| 119 | |
| 120 | memset(®s, 0, sizeof(regs)); |
| 121 | memcpy(®s, &uh_handler_data->regs, sizeof(uh_handler_data->regs)); |
| 122 | |
| 123 | do_mem_abort(uh_handler_data->far_el2, (u32)uh_handler_data->esr_el2.bits, ®s); |
Tim Zimmermann | f5a8669 | 2020-12-25 08:39:43 +0100 | [diff] [blame] | 124 | panic("uH Fault handler : %s",exception_class_string[exception_class]); |
Tim Zimmermann | 6a834b7 | 2020-09-03 09:11:59 +0200 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | u64 uh_get_fault_handler(void) |
| 128 | { |
| 129 | uh_handler_list.uh_handler = (u64) & uh_fault_handler; |
| 130 | return (u64) & uh_handler_list; |
| 131 | } |