blob: 08711e9202ab41cc38a4a512d3eb0c40b11663db [file] [log] [blame]
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -08001/*
2 * Driver for Atmel AT32 and AT91 SPI Controllers
3 *
4 * Copyright (C) 2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/clk.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16#include <linux/delay.h>
17#include <linux/dma-mapping.h>
18#include <linux/err.h>
19#include <linux/interrupt.h>
20#include <linux/spi/spi.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090021#include <linux/slab.h>
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080022
23#include <asm/io.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010024#include <mach/board.h>
25#include <mach/gpio.h>
26#include <mach/cpu.h>
David Brownellbb2d1c32007-02-20 13:58:19 -080027
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080028#include "atmel_spi.h"
29
30/*
31 * The core SPI transfer engine just talks to a register bank to set up
32 * DMA transfers; transfer queue progress is driven by IRQs. The clock
33 * framework provides the base clock, subdivided for each spi_device.
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080034 */
35struct atmel_spi {
36 spinlock_t lock;
37
38 void __iomem *regs;
39 int irq;
40 struct clk *clk;
41 struct platform_device *pdev;
David Brownelldefbd3b2007-07-17 04:04:08 -070042 struct spi_device *stay;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080043
44 u8 stopping;
45 struct list_head queue;
46 struct spi_transfer *current_transfer;
Silvester Erdeg154443c2008-02-06 01:38:12 -080047 unsigned long current_remaining_bytes;
48 struct spi_transfer *next_transfer;
49 unsigned long next_remaining_bytes;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080050
51 void *buffer;
52 dma_addr_t buffer_dma;
53};
54
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -080055/* Controller-specific per-slave state */
56struct atmel_spi_device {
57 unsigned int npcs_pin;
58 u32 csr;
59};
60
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080061#define BUFFER_SIZE PAGE_SIZE
62#define INVALID_DMA_ADDRESS 0xffffffff
63
64/*
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -080065 * Version 2 of the SPI controller has
66 * - CR.LASTXFER
67 * - SPI_MR.DIV32 may become FDIV or must-be-zero (here: always zero)
68 * - SPI_SR.TXEMPTY, SPI_SR.NSSR (and corresponding irqs)
69 * - SPI_CSRx.CSAAT
70 * - SPI_CSRx.SBCR allows faster clocking
71 *
72 * We can determine the controller version by reading the VERSION
73 * register, but I haven't checked that it exists on all chips, and
74 * this is cheaper anyway.
75 */
76static bool atmel_spi_is_v2(void)
77{
78 return !cpu_is_at91rm9200();
79}
80
81/*
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080082 * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
83 * they assume that spi slave device state will not change on deselect, so
David Brownelldefbd3b2007-07-17 04:04:08 -070084 * that automagic deselection is OK. ("NPCSx rises if no data is to be
85 * transmitted") Not so! Workaround uses nCSx pins as GPIOs; or newer
86 * controllers have CSAAT and friends.
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080087 *
David Brownelldefbd3b2007-07-17 04:04:08 -070088 * Since the CSAAT functionality is a bit weird on newer controllers as
89 * well, we use GPIO to control nCSx pins on all controllers, updating
90 * MR.PCS to avoid confusing the controller. Using GPIOs also lets us
91 * support active-high chipselects despite the controller's belief that
92 * only active-low devices/systems exists.
93 *
94 * However, at91rm9200 has a second erratum whereby nCS0 doesn't work
95 * right when driven with GPIO. ("Mode Fault does not allow more than one
96 * Master on Chip Select 0.") No workaround exists for that ... so for
97 * nCS0 on that chip, we (a) don't use the GPIO, (b) can't support CS_HIGH,
98 * and (c) will trigger that first erratum in some cases.
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -080099 *
100 * TODO: Test if the atmel_spi_is_v2() branch below works on
101 * AT91RM9200 if we use some other register than CSR0. However, don't
102 * do this unconditionally since AP7000 has an errata where the BITS
103 * field in CSR0 overrides all other CSRs.
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800104 */
105
David Brownelldefbd3b2007-07-17 04:04:08 -0700106static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800107{
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800108 struct atmel_spi_device *asd = spi->controller_state;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800109 unsigned active = spi->mode & SPI_CS_HIGH;
David Brownelldefbd3b2007-07-17 04:04:08 -0700110 u32 mr;
Atsushi Nemotof6febcc2008-02-23 15:23:39 -0800111
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800112 if (atmel_spi_is_v2()) {
113 /*
114 * Always use CSR0. This ensures that the clock
115 * switches to the correct idle polarity before we
116 * toggle the CS.
117 */
118 spi_writel(as, CSR0, asd->csr);
119 spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS)
120 | SPI_BIT(MSTR));
121 mr = spi_readl(as, MR);
122 gpio_set_value(asd->npcs_pin, active);
123 } else {
124 u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
125 int i;
126 u32 csr;
127
128 /* Make sure clock polarity is correct */
129 for (i = 0; i < spi->master->num_chipselect; i++) {
130 csr = spi_readl(as, CSR0 + 4 * i);
131 if ((csr ^ cpol) & SPI_BIT(CPOL))
132 spi_writel(as, CSR0 + 4 * i,
133 csr ^ SPI_BIT(CPOL));
134 }
135
136 mr = spi_readl(as, MR);
137 mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);
138 if (spi->chip_select != 0)
139 gpio_set_value(asd->npcs_pin, active);
140 spi_writel(as, MR, mr);
Atsushi Nemotof6febcc2008-02-23 15:23:39 -0800141 }
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800142
David Brownelldefbd3b2007-07-17 04:04:08 -0700143 dev_dbg(&spi->dev, "activate %u%s, mr %08x\n",
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800144 asd->npcs_pin, active ? " (high)" : "",
David Brownelldefbd3b2007-07-17 04:04:08 -0700145 mr);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800146}
147
David Brownelldefbd3b2007-07-17 04:04:08 -0700148static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800149{
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800150 struct atmel_spi_device *asd = spi->controller_state;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800151 unsigned active = spi->mode & SPI_CS_HIGH;
David Brownelldefbd3b2007-07-17 04:04:08 -0700152 u32 mr;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800153
David Brownelldefbd3b2007-07-17 04:04:08 -0700154 /* only deactivate *this* device; sometimes transfers to
155 * another device may be active when this routine is called.
156 */
157 mr = spi_readl(as, MR);
158 if (~SPI_BFEXT(PCS, mr) & (1 << spi->chip_select)) {
159 mr = SPI_BFINS(PCS, 0xf, mr);
160 spi_writel(as, MR, mr);
161 }
162
163 dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n",
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800164 asd->npcs_pin, active ? " (low)" : "",
David Brownelldefbd3b2007-07-17 04:04:08 -0700165 mr);
166
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800167 if (atmel_spi_is_v2() || spi->chip_select != 0)
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800168 gpio_set_value(asd->npcs_pin, !active);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800169}
170
Silvester Erdeg154443c2008-02-06 01:38:12 -0800171static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
172 struct spi_transfer *xfer)
173{
174 return msg->transfers.prev == &xfer->transfer_list;
175}
176
177static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
178{
179 return xfer->delay_usecs == 0 && !xfer->cs_change;
180}
181
182static void atmel_spi_next_xfer_data(struct spi_master *master,
183 struct spi_transfer *xfer,
184 dma_addr_t *tx_dma,
185 dma_addr_t *rx_dma,
186 u32 *plen)
187{
188 struct atmel_spi *as = spi_master_get_devdata(master);
189 u32 len = *plen;
190
191 /* use scratch buffer only when rx or tx data is unspecified */
192 if (xfer->rx_buf)
Ben Nizette6aed4ee2009-12-14 22:20:20 -0800193 *rx_dma = xfer->rx_dma + xfer->len - *plen;
Silvester Erdeg154443c2008-02-06 01:38:12 -0800194 else {
195 *rx_dma = as->buffer_dma;
196 if (len > BUFFER_SIZE)
197 len = BUFFER_SIZE;
198 }
199 if (xfer->tx_buf)
Ben Nizette6aed4ee2009-12-14 22:20:20 -0800200 *tx_dma = xfer->tx_dma + xfer->len - *plen;
Silvester Erdeg154443c2008-02-06 01:38:12 -0800201 else {
202 *tx_dma = as->buffer_dma;
203 if (len > BUFFER_SIZE)
204 len = BUFFER_SIZE;
205 memset(as->buffer, 0, len);
206 dma_sync_single_for_device(&as->pdev->dev,
207 as->buffer_dma, len, DMA_TO_DEVICE);
208 }
209
210 *plen = len;
211}
212
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800213/*
214 * Submit next transfer for DMA.
215 * lock is held, spi irq is blocked
216 */
217static void atmel_spi_next_xfer(struct spi_master *master,
218 struct spi_message *msg)
219{
220 struct atmel_spi *as = spi_master_get_devdata(master);
221 struct spi_transfer *xfer;
Gerard Kamdc329442008-08-04 13:41:12 -0700222 u32 len, remaining;
223 u32 ieval;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800224 dma_addr_t tx_dma, rx_dma;
225
Silvester Erdeg154443c2008-02-06 01:38:12 -0800226 if (!as->current_transfer)
227 xfer = list_entry(msg->transfers.next,
228 struct spi_transfer, transfer_list);
229 else if (!as->next_transfer)
230 xfer = list_entry(as->current_transfer->transfer_list.next,
231 struct spi_transfer, transfer_list);
232 else
233 xfer = NULL;
234
235 if (xfer) {
Gerard Kamdc329442008-08-04 13:41:12 -0700236 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
237
Silvester Erdeg154443c2008-02-06 01:38:12 -0800238 len = xfer->len;
239 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
240 remaining = xfer->len - len;
241
242 spi_writel(as, RPR, rx_dma);
243 spi_writel(as, TPR, tx_dma);
244
245 if (msg->spi->bits_per_word > 8)
246 len >>= 1;
247 spi_writel(as, RCR, len);
248 spi_writel(as, TCR, len);
Haavard Skinnemoen8bacb212008-02-06 01:38:13 -0800249
250 dev_dbg(&msg->spi->dev,
251 " start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
252 xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
253 xfer->rx_buf, xfer->rx_dma);
Silvester Erdeg154443c2008-02-06 01:38:12 -0800254 } else {
255 xfer = as->next_transfer;
256 remaining = as->next_remaining_bytes;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800257 }
258
Silvester Erdeg154443c2008-02-06 01:38:12 -0800259 as->current_transfer = xfer;
260 as->current_remaining_bytes = remaining;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800261
Silvester Erdeg154443c2008-02-06 01:38:12 -0800262 if (remaining > 0)
263 len = remaining;
Haavard Skinnemoen8bacb212008-02-06 01:38:13 -0800264 else if (!atmel_spi_xfer_is_last(msg, xfer)
265 && atmel_spi_xfer_can_be_chained(xfer)) {
Silvester Erdeg154443c2008-02-06 01:38:12 -0800266 xfer = list_entry(xfer->transfer_list.next,
267 struct spi_transfer, transfer_list);
268 len = xfer->len;
269 } else
270 xfer = NULL;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800271
Silvester Erdeg154443c2008-02-06 01:38:12 -0800272 as->next_transfer = xfer;
273
274 if (xfer) {
Gerard Kamdc329442008-08-04 13:41:12 -0700275 u32 total;
276
Silvester Erdeg154443c2008-02-06 01:38:12 -0800277 total = len;
278 atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
279 as->next_remaining_bytes = total - len;
280
281 spi_writel(as, RNPR, rx_dma);
282 spi_writel(as, TNPR, tx_dma);
283
284 if (msg->spi->bits_per_word > 8)
285 len >>= 1;
286 spi_writel(as, RNCR, len);
287 spi_writel(as, TNCR, len);
Haavard Skinnemoen8bacb212008-02-06 01:38:13 -0800288
289 dev_dbg(&msg->spi->dev,
290 " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
291 xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
292 xfer->rx_buf, xfer->rx_dma);
Gerard Kamdc329442008-08-04 13:41:12 -0700293 ieval = SPI_BIT(ENDRX) | SPI_BIT(OVRES);
Silvester Erdeg154443c2008-02-06 01:38:12 -0800294 } else {
295 spi_writel(as, RNCR, 0);
296 spi_writel(as, TNCR, 0);
Gerard Kamdc329442008-08-04 13:41:12 -0700297 ieval = SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | SPI_BIT(OVRES);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800298 }
299
Silvester Erdeg154443c2008-02-06 01:38:12 -0800300 /* REVISIT: We're waiting for ENDRX before we start the next
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800301 * transfer because we need to handle some difficult timing
302 * issues otherwise. If we wait for ENDTX in one transfer and
303 * then starts waiting for ENDRX in the next, it's difficult
304 * to tell the difference between the ENDRX interrupt we're
305 * actually waiting for and the ENDRX interrupt of the
306 * previous transfer.
307 *
308 * It should be doable, though. Just not now...
309 */
Gerard Kamdc329442008-08-04 13:41:12 -0700310 spi_writel(as, IER, ieval);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800311 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
312}
313
314static void atmel_spi_next_message(struct spi_master *master)
315{
316 struct atmel_spi *as = spi_master_get_devdata(master);
317 struct spi_message *msg;
David Brownelldefbd3b2007-07-17 04:04:08 -0700318 struct spi_device *spi;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800319
320 BUG_ON(as->current_transfer);
321
322 msg = list_entry(as->queue.next, struct spi_message, queue);
David Brownelldefbd3b2007-07-17 04:04:08 -0700323 spi = msg->spi;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800324
Tony Jones49dce682007-10-16 01:27:48 -0700325 dev_dbg(master->dev.parent, "start message %p for %s\n",
Kay Sievers6c7377a2009-03-24 16:38:21 -0700326 msg, dev_name(&spi->dev));
David Brownelldefbd3b2007-07-17 04:04:08 -0700327
328 /* select chip if it's not still active */
329 if (as->stay) {
330 if (as->stay != spi) {
331 cs_deactivate(as, as->stay);
332 cs_activate(as, spi);
333 }
334 as->stay = NULL;
335 } else
336 cs_activate(as, spi);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800337
338 atmel_spi_next_xfer(master, msg);
339}
340
David Brownell8da08592007-07-17 04:04:07 -0700341/*
342 * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma:
343 * - The buffer is either valid for CPU access, else NULL
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400344 * - If the buffer is valid, so is its DMA address
David Brownell8da08592007-07-17 04:04:07 -0700345 *
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400346 * This driver manages the dma address unless message->is_dma_mapped.
David Brownell8da08592007-07-17 04:04:07 -0700347 */
348static int
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800349atmel_spi_dma_map_xfer(struct atmel_spi *as, struct spi_transfer *xfer)
350{
David Brownell8da08592007-07-17 04:04:07 -0700351 struct device *dev = &as->pdev->dev;
352
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800353 xfer->tx_dma = xfer->rx_dma = INVALID_DMA_ADDRESS;
David Brownell8da08592007-07-17 04:04:07 -0700354 if (xfer->tx_buf) {
Jean-Christophe PLAGNIOL-VILLARD214b5742010-11-20 14:52:53 +0800355 /* tx_buf is a const void* where we need a void * for the dma
356 * mapping */
357 void *nonconst_tx = (void *)xfer->tx_buf;
358
David Brownell8da08592007-07-17 04:04:07 -0700359 xfer->tx_dma = dma_map_single(dev,
Jean-Christophe PLAGNIOL-VILLARD214b5742010-11-20 14:52:53 +0800360 nonconst_tx, xfer->len,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800361 DMA_TO_DEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -0700362 if (dma_mapping_error(dev, xfer->tx_dma))
David Brownell8da08592007-07-17 04:04:07 -0700363 return -ENOMEM;
364 }
365 if (xfer->rx_buf) {
366 xfer->rx_dma = dma_map_single(dev,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800367 xfer->rx_buf, xfer->len,
368 DMA_FROM_DEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -0700369 if (dma_mapping_error(dev, xfer->rx_dma)) {
David Brownell8da08592007-07-17 04:04:07 -0700370 if (xfer->tx_buf)
371 dma_unmap_single(dev,
372 xfer->tx_dma, xfer->len,
373 DMA_TO_DEVICE);
374 return -ENOMEM;
375 }
376 }
377 return 0;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800378}
379
380static void atmel_spi_dma_unmap_xfer(struct spi_master *master,
381 struct spi_transfer *xfer)
382{
383 if (xfer->tx_dma != INVALID_DMA_ADDRESS)
Tony Jones49dce682007-10-16 01:27:48 -0700384 dma_unmap_single(master->dev.parent, xfer->tx_dma,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800385 xfer->len, DMA_TO_DEVICE);
386 if (xfer->rx_dma != INVALID_DMA_ADDRESS)
Tony Jones49dce682007-10-16 01:27:48 -0700387 dma_unmap_single(master->dev.parent, xfer->rx_dma,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800388 xfer->len, DMA_FROM_DEVICE);
389}
390
391static void
392atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
David Brownelldefbd3b2007-07-17 04:04:08 -0700393 struct spi_message *msg, int status, int stay)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800394{
David Brownelldefbd3b2007-07-17 04:04:08 -0700395 if (!stay || status < 0)
396 cs_deactivate(as, msg->spi);
397 else
398 as->stay = msg->spi;
399
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800400 list_del(&msg->queue);
401 msg->status = status;
402
Tony Jones49dce682007-10-16 01:27:48 -0700403 dev_dbg(master->dev.parent,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800404 "xfer complete: %u bytes transferred\n",
405 msg->actual_length);
406
407 spin_unlock(&as->lock);
408 msg->complete(msg->context);
409 spin_lock(&as->lock);
410
411 as->current_transfer = NULL;
Silvester Erdeg154443c2008-02-06 01:38:12 -0800412 as->next_transfer = NULL;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800413
414 /* continue if needed */
415 if (list_empty(&as->queue) || as->stopping)
416 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
417 else
418 atmel_spi_next_message(master);
419}
420
421static irqreturn_t
422atmel_spi_interrupt(int irq, void *dev_id)
423{
424 struct spi_master *master = dev_id;
425 struct atmel_spi *as = spi_master_get_devdata(master);
426 struct spi_message *msg;
427 struct spi_transfer *xfer;
428 u32 status, pending, imr;
429 int ret = IRQ_NONE;
430
431 spin_lock(&as->lock);
432
433 xfer = as->current_transfer;
434 msg = list_entry(as->queue.next, struct spi_message, queue);
435
436 imr = spi_readl(as, IMR);
437 status = spi_readl(as, SR);
438 pending = status & imr;
439
440 if (pending & SPI_BIT(OVRES)) {
441 int timeout;
442
443 ret = IRQ_HANDLED;
444
Gerard Kamdc329442008-08-04 13:41:12 -0700445 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800446 | SPI_BIT(OVRES)));
447
448 /*
449 * When we get an overrun, we disregard the current
450 * transfer. Data will not be copied back from any
451 * bounce buffer and msg->actual_len will not be
452 * updated with the last xfer.
453 *
454 * We will also not process any remaning transfers in
455 * the message.
456 *
457 * First, stop the transfer and unmap the DMA buffers.
458 */
459 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
460 if (!msg->is_dma_mapped)
461 atmel_spi_dma_unmap_xfer(master, xfer);
462
463 /* REVISIT: udelay in irq is unfriendly */
464 if (xfer->delay_usecs)
465 udelay(xfer->delay_usecs);
466
Gerard Kamdc329442008-08-04 13:41:12 -0700467 dev_warn(master->dev.parent, "overrun (%u/%u remaining)\n",
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800468 spi_readl(as, TCR), spi_readl(as, RCR));
469
470 /*
471 * Clean up DMA registers and make sure the data
472 * registers are empty.
473 */
474 spi_writel(as, RNCR, 0);
475 spi_writel(as, TNCR, 0);
476 spi_writel(as, RCR, 0);
477 spi_writel(as, TCR, 0);
478 for (timeout = 1000; timeout; timeout--)
479 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
480 break;
481 if (!timeout)
Tony Jones49dce682007-10-16 01:27:48 -0700482 dev_warn(master->dev.parent,
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800483 "timeout waiting for TXEMPTY");
484 while (spi_readl(as, SR) & SPI_BIT(RDRF))
485 spi_readl(as, RDR);
486
487 /* Clear any overrun happening while cleaning up */
488 spi_readl(as, SR);
489
David Brownelldefbd3b2007-07-17 04:04:08 -0700490 atmel_spi_msg_done(master, as, msg, -EIO, 0);
Gerard Kamdc329442008-08-04 13:41:12 -0700491 } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800492 ret = IRQ_HANDLED;
493
494 spi_writel(as, IDR, pending);
495
Silvester Erdeg154443c2008-02-06 01:38:12 -0800496 if (as->current_remaining_bytes == 0) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800497 msg->actual_length += xfer->len;
498
499 if (!msg->is_dma_mapped)
500 atmel_spi_dma_unmap_xfer(master, xfer);
501
502 /* REVISIT: udelay in irq is unfriendly */
503 if (xfer->delay_usecs)
504 udelay(xfer->delay_usecs);
505
Silvester Erdeg154443c2008-02-06 01:38:12 -0800506 if (atmel_spi_xfer_is_last(msg, xfer)) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800507 /* report completed message */
David Brownelldefbd3b2007-07-17 04:04:08 -0700508 atmel_spi_msg_done(master, as, msg, 0,
509 xfer->cs_change);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800510 } else {
511 if (xfer->cs_change) {
David Brownelldefbd3b2007-07-17 04:04:08 -0700512 cs_deactivate(as, msg->spi);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800513 udelay(1);
David Brownelldefbd3b2007-07-17 04:04:08 -0700514 cs_activate(as, msg->spi);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800515 }
516
517 /*
518 * Not done yet. Submit the next transfer.
519 *
520 * FIXME handle protocol options for xfer
521 */
522 atmel_spi_next_xfer(master, msg);
523 }
524 } else {
525 /*
526 * Keep going, we still have data to send in
527 * the current transfer.
528 */
529 atmel_spi_next_xfer(master, msg);
530 }
531 }
532
533 spin_unlock(&as->lock);
534
535 return ret;
536}
537
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800538static int atmel_spi_setup(struct spi_device *spi)
539{
540 struct atmel_spi *as;
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800541 struct atmel_spi_device *asd;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800542 u32 scbr, csr;
543 unsigned int bits = spi->bits_per_word;
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700544 unsigned long bus_hz;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800545 unsigned int npcs_pin;
546 int ret;
547
548 as = spi_master_get_devdata(spi->master);
549
550 if (as->stopping)
551 return -ESHUTDOWN;
552
553 if (spi->chip_select > spi->master->num_chipselect) {
554 dev_dbg(&spi->dev,
555 "setup: invalid chipselect %u (%u defined)\n",
556 spi->chip_select, spi->master->num_chipselect);
557 return -EINVAL;
558 }
559
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800560 if (bits < 8 || bits > 16) {
561 dev_dbg(&spi->dev,
562 "setup: invalid bits_per_word %u (8 to 16)\n",
563 bits);
564 return -EINVAL;
565 }
566
David Brownelldefbd3b2007-07-17 04:04:08 -0700567 /* see notes above re chipselect */
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800568 if (!atmel_spi_is_v2()
David Brownelldefbd3b2007-07-17 04:04:08 -0700569 && spi->chip_select == 0
570 && (spi->mode & SPI_CS_HIGH)) {
571 dev_dbg(&spi->dev, "setup: can't be active-high\n");
572 return -EINVAL;
573 }
574
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800575 /* v1 chips start out at half the peripheral bus speed. */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800576 bus_hz = clk_get_rate(as->clk);
Haavard Skinnemoen5bfa26c2009-01-06 14:41:42 -0800577 if (!atmel_spi_is_v2())
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700578 bus_hz /= 2;
579
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800580 if (spi->max_speed_hz) {
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700581 /*
582 * Calculate the lowest divider that satisfies the
583 * constraint, assuming div32/fdiv/mbz == 0.
584 */
585 scbr = DIV_ROUND_UP(bus_hz, spi->max_speed_hz);
586
587 /*
588 * If the resulting divider doesn't fit into the
589 * register bitfield, we can't satisfy the constraint.
590 */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800591 if (scbr >= (1 << SPI_SCBR_SIZE)) {
David Brownell8da08592007-07-17 04:04:07 -0700592 dev_dbg(&spi->dev,
593 "setup: %d Hz too slow, scbr %u; min %ld Hz\n",
594 spi->max_speed_hz, scbr, bus_hz/255);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800595 return -EINVAL;
596 }
597 } else
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700598 /* speed zero means "as slow as possible" */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800599 scbr = 0xff;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800600
601 csr = SPI_BF(SCBR, scbr) | SPI_BF(BITS, bits - 8);
602 if (spi->mode & SPI_CPOL)
603 csr |= SPI_BIT(CPOL);
604 if (!(spi->mode & SPI_CPHA))
605 csr |= SPI_BIT(NCPHA);
606
Haavard Skinnemoen1eed29d2008-02-06 01:38:11 -0800607 /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
608 *
609 * DLYBCT would add delays between words, slowing down transfers.
610 * It could potentially be useful to cope with DMA bottlenecks, but
611 * in those cases it's probably best to just use a lower bitrate.
612 */
613 csr |= SPI_BF(DLYBS, 0);
614 csr |= SPI_BF(DLYBCT, 0);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800615
616 /* chipselect must have been muxed as GPIO (e.g. in board setup) */
617 npcs_pin = (unsigned int)spi->controller_data;
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800618 asd = spi->controller_state;
619 if (!asd) {
620 asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL);
621 if (!asd)
622 return -ENOMEM;
623
Kay Sievers6c7377a2009-03-24 16:38:21 -0700624 ret = gpio_request(npcs_pin, dev_name(&spi->dev));
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800625 if (ret) {
626 kfree(asd);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800627 return ret;
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800628 }
629
630 asd->npcs_pin = npcs_pin;
631 spi->controller_state = asd;
David Brownell28735a72007-03-16 13:38:14 -0800632 gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH));
David Brownelldefbd3b2007-07-17 04:04:08 -0700633 } else {
634 unsigned long flags;
635
636 spin_lock_irqsave(&as->lock, flags);
637 if (as->stay == spi)
638 as->stay = NULL;
639 cs_deactivate(as, spi);
640 spin_unlock_irqrestore(&as->lock, flags);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800641 }
642
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800643 asd->csr = csr;
644
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800645 dev_dbg(&spi->dev,
646 "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
Haavard Skinnemoen592e7bf2008-04-30 00:52:17 -0700647 bus_hz / scbr, bits, spi->mode, spi->chip_select, csr);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800648
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800649 if (!atmel_spi_is_v2())
650 spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800651
652 return 0;
653}
654
655static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
656{
657 struct atmel_spi *as;
658 struct spi_transfer *xfer;
659 unsigned long flags;
Tony Jones49dce682007-10-16 01:27:48 -0700660 struct device *controller = spi->master->dev.parent;
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200661 u8 bits;
662 struct atmel_spi_device *asd;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800663
664 as = spi_master_get_devdata(spi->master);
665
666 dev_dbg(controller, "new message %p submitted for %s\n",
Kay Sievers6c7377a2009-03-24 16:38:21 -0700667 msg, dev_name(&spi->dev));
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800668
Stanislaw Gruszka5b96f172009-01-15 13:50:44 -0800669 if (unlikely(list_empty(&msg->transfers)))
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800670 return -EINVAL;
671
672 if (as->stopping)
673 return -ESHUTDOWN;
674
675 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
Atsushi Nemoto06719812008-04-28 02:14:19 -0700676 if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800677 dev_dbg(&spi->dev, "missing rx or tx buf\n");
678 return -EINVAL;
679 }
680
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200681 if (xfer->bits_per_word) {
682 asd = spi->controller_state;
683 bits = (asd->csr >> 4) & 0xf;
684 if (bits != xfer->bits_per_word - 8) {
685 dev_dbg(&spi->dev, "you can't yet change "
Matthias Bruggeree2007d2010-10-16 01:39:49 +0200686 "bits_per_word in transfers\n");
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200687 return -ENOPROTOOPT;
688 }
689 }
690
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800691 /* FIXME implement these protocol options!! */
Matthias Bruggerb9d228f2010-10-13 17:51:02 +0200692 if (xfer->speed_hz) {
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800693 dev_dbg(&spi->dev, "no protocol options yet\n");
694 return -ENOPROTOOPT;
695 }
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800696
David Brownell8da08592007-07-17 04:04:07 -0700697 /*
698 * DMA map early, for performance (empties dcache ASAP) and
699 * better fault reporting. This is a DMA-only driver.
700 *
701 * NOTE that if dma_unmap_single() ever starts to do work on
702 * platforms supported by this driver, we would need to clean
703 * up mappings for previously-mapped transfers.
704 */
705 if (!msg->is_dma_mapped) {
706 if (atmel_spi_dma_map_xfer(as, xfer) < 0)
707 return -ENOMEM;
708 }
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800709 }
710
David Brownelldefbd3b2007-07-17 04:04:08 -0700711#ifdef VERBOSE
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800712 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
713 dev_dbg(controller,
714 " xfer %p: len %u tx %p/%08x rx %p/%08x\n",
715 xfer, xfer->len,
716 xfer->tx_buf, xfer->tx_dma,
717 xfer->rx_buf, xfer->rx_dma);
718 }
David Brownelldefbd3b2007-07-17 04:04:08 -0700719#endif
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800720
721 msg->status = -EINPROGRESS;
722 msg->actual_length = 0;
723
724 spin_lock_irqsave(&as->lock, flags);
725 list_add_tail(&msg->queue, &as->queue);
726 if (!as->current_transfer)
727 atmel_spi_next_message(spi->master);
728 spin_unlock_irqrestore(&as->lock, flags);
729
730 return 0;
731}
732
David Brownellbb2d1c32007-02-20 13:58:19 -0800733static void atmel_spi_cleanup(struct spi_device *spi)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800734{
David Brownelldefbd3b2007-07-17 04:04:08 -0700735 struct atmel_spi *as = spi_master_get_devdata(spi->master);
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800736 struct atmel_spi_device *asd = spi->controller_state;
David Brownelldefbd3b2007-07-17 04:04:08 -0700737 unsigned gpio = (unsigned) spi->controller_data;
738 unsigned long flags;
739
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800740 if (!asd)
David Brownelldefbd3b2007-07-17 04:04:08 -0700741 return;
742
743 spin_lock_irqsave(&as->lock, flags);
744 if (as->stay == spi) {
745 as->stay = NULL;
746 cs_deactivate(as, spi);
747 }
748 spin_unlock_irqrestore(&as->lock, flags);
749
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800750 spi->controller_state = NULL;
David Brownelldefbd3b2007-07-17 04:04:08 -0700751 gpio_free(gpio);
Haavard Skinnemoen5ee36c92009-01-06 14:41:43 -0800752 kfree(asd);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800753}
754
755/*-------------------------------------------------------------------------*/
756
757static int __init atmel_spi_probe(struct platform_device *pdev)
758{
759 struct resource *regs;
760 int irq;
761 struct clk *clk;
762 int ret;
763 struct spi_master *master;
764 struct atmel_spi *as;
765
766 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
767 if (!regs)
768 return -ENXIO;
769
770 irq = platform_get_irq(pdev, 0);
771 if (irq < 0)
772 return irq;
773
774 clk = clk_get(&pdev->dev, "spi_clk");
775 if (IS_ERR(clk))
776 return PTR_ERR(clk);
777
778 /* setup spi core then atmel-specific driver state */
779 ret = -ENOMEM;
780 master = spi_alloc_master(&pdev->dev, sizeof *as);
781 if (!master)
782 goto out_free;
783
David Brownelle7db06b2009-06-17 16:26:04 -0700784 /* the spi->mode bits understood by this driver: */
785 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
786
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800787 master->bus_num = pdev->id;
788 master->num_chipselect = 4;
789 master->setup = atmel_spi_setup;
790 master->transfer = atmel_spi_transfer;
791 master->cleanup = atmel_spi_cleanup;
792 platform_set_drvdata(pdev, master);
793
794 as = spi_master_get_devdata(master);
795
David Brownell8da08592007-07-17 04:04:07 -0700796 /*
797 * Scratch buffer is used for throwaway rx and tx data.
798 * It's coherent to minimize dcache pollution.
799 */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800800 as->buffer = dma_alloc_coherent(&pdev->dev, BUFFER_SIZE,
801 &as->buffer_dma, GFP_KERNEL);
802 if (!as->buffer)
803 goto out_free;
804
805 spin_lock_init(&as->lock);
806 INIT_LIST_HEAD(&as->queue);
807 as->pdev = pdev;
hartleys905aa0a2009-12-14 22:22:25 +0000808 as->regs = ioremap(regs->start, resource_size(regs));
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800809 if (!as->regs)
810 goto out_free_buffer;
811 as->irq = irq;
812 as->clk = clk;
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800813
814 ret = request_irq(irq, atmel_spi_interrupt, 0,
Kay Sievers6c7377a2009-03-24 16:38:21 -0700815 dev_name(&pdev->dev), master);
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800816 if (ret)
817 goto out_unmap_regs;
818
819 /* Initialize the hardware */
820 clk_enable(clk);
821 spi_writel(as, CR, SPI_BIT(SWRST));
Jean-Christophe Lallemand50d7d5b2008-11-12 13:27:00 -0800822 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800823 spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
824 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
825 spi_writel(as, CR, SPI_BIT(SPIEN));
826
827 /* go! */
828 dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n",
829 (unsigned long)regs->start, irq);
830
831 ret = spi_register_master(master);
832 if (ret)
833 goto out_reset_hw;
834
835 return 0;
836
837out_reset_hw:
838 spi_writel(as, CR, SPI_BIT(SWRST));
Jean-Christophe Lallemand50d7d5b2008-11-12 13:27:00 -0800839 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800840 clk_disable(clk);
841 free_irq(irq, master);
842out_unmap_regs:
843 iounmap(as->regs);
844out_free_buffer:
845 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
846 as->buffer_dma);
847out_free:
848 clk_put(clk);
849 spi_master_put(master);
850 return ret;
851}
852
853static int __exit atmel_spi_remove(struct platform_device *pdev)
854{
855 struct spi_master *master = platform_get_drvdata(pdev);
856 struct atmel_spi *as = spi_master_get_devdata(master);
857 struct spi_message *msg;
858
859 /* reset the hardware and block queue progress */
860 spin_lock_irq(&as->lock);
861 as->stopping = 1;
862 spi_writel(as, CR, SPI_BIT(SWRST));
Jean-Christophe Lallemand50d7d5b2008-11-12 13:27:00 -0800863 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800864 spi_readl(as, SR);
865 spin_unlock_irq(&as->lock);
866
867 /* Terminate remaining queued transfers */
868 list_for_each_entry(msg, &as->queue, queue) {
869 /* REVISIT unmapping the dma is a NOP on ARM and AVR32
870 * but we shouldn't depend on that...
871 */
872 msg->status = -ESHUTDOWN;
873 msg->complete(msg->context);
874 }
875
876 dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
877 as->buffer_dma);
878
879 clk_disable(as->clk);
880 clk_put(as->clk);
881 free_irq(as->irq, master);
882 iounmap(as->regs);
883
884 spi_unregister_master(master);
885
886 return 0;
887}
888
889#ifdef CONFIG_PM
890
891static int atmel_spi_suspend(struct platform_device *pdev, pm_message_t mesg)
892{
893 struct spi_master *master = platform_get_drvdata(pdev);
894 struct atmel_spi *as = spi_master_get_devdata(master);
895
896 clk_disable(as->clk);
897 return 0;
898}
899
900static int atmel_spi_resume(struct platform_device *pdev)
901{
902 struct spi_master *master = platform_get_drvdata(pdev);
903 struct atmel_spi *as = spi_master_get_devdata(master);
904
905 clk_enable(as->clk);
906 return 0;
907}
908
909#else
910#define atmel_spi_suspend NULL
911#define atmel_spi_resume NULL
912#endif
913
914
915static struct platform_driver atmel_spi_driver = {
916 .driver = {
917 .name = "atmel_spi",
918 .owner = THIS_MODULE,
919 },
920 .suspend = atmel_spi_suspend,
921 .resume = atmel_spi_resume,
922 .remove = __exit_p(atmel_spi_remove),
923};
924
925static int __init atmel_spi_init(void)
926{
927 return platform_driver_probe(&atmel_spi_driver, atmel_spi_probe);
928}
929module_init(atmel_spi_init);
930
931static void __exit atmel_spi_exit(void)
932{
933 platform_driver_unregister(&atmel_spi_driver);
934}
935module_exit(atmel_spi_exit);
936
937MODULE_DESCRIPTION("Atmel AT32/AT91 SPI Controller driver");
Jean Delvaree05503e2011-05-18 16:49:24 +0200938MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -0800939MODULE_LICENSE("GPL");
Kay Sievers7e38c3c2008-04-10 21:29:20 -0700940MODULE_ALIAS("platform:atmel_spi");