| David Mosberger-Tang | 2ab561a | 2006-06-21 11:19:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ESI call stub. |
| 3 | * |
| 4 | * Copyright (C) 2005 Hewlett-Packard Co |
| 5 | * Alex Williamson <alex.williamson@hp.com> |
| 6 | * |
| 7 | * Based on EFI call stub by David Mosberger. The stub is virtually |
| 8 | * identical to the one for EFI phys-mode calls, except that ESI |
| 9 | * calls may have up to 8 arguments, so they get passed to this routine |
| 10 | * through memory. |
| 11 | * |
| 12 | * This stub allows us to make ESI calls in physical mode with interrupts |
| 13 | * turned off. ESI calls may not support calling from virtual mode. |
| 14 | * |
| 15 | * Google for "Extensible SAL specification" for a document describing the |
| 16 | * ESI standard. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | * PSR settings as per SAL spec (Chapter 8 in the "IA-64 System |
| 21 | * Abstraction Layer Specification", revision 2.6e). Note that |
| 22 | * psr.dfl and psr.dfh MUST be cleared, despite what this manual says. |
| 23 | * Otherwise, SAL dies whenever it's trying to do an IA-32 BIOS call |
| 24 | * (the br.ia instruction fails unless psr.dfl and psr.dfh are |
| 25 | * cleared). Fortunately, SAL promises not to touch the floating |
| 26 | * point regs, so at least we don't have to save f2-f127. |
| 27 | */ |
| 28 | #define PSR_BITS_TO_CLEAR \ |
| 29 | (IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_RT | \ |
| 30 | IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \ |
| 31 | IA64_PSR_DFL | IA64_PSR_DFH) |
| 32 | |
| 33 | #define PSR_BITS_TO_SET \ |
| 34 | (IA64_PSR_BN) |
| 35 | |
| 36 | #include <asm/processor.h> |
| 37 | #include <asm/asmmacro.h> |
| 38 | |
| 39 | /* |
| 40 | * Inputs: |
| 41 | * in0 = address of function descriptor of ESI routine to call |
| 42 | * in1 = address of array of ESI parameters |
| 43 | * |
| 44 | * Outputs: |
| 45 | * r8 = result returned by called function |
| 46 | */ |
| 47 | GLOBAL_ENTRY(esi_call_phys) |
| 48 | .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) |
| 49 | alloc loc1=ar.pfs,2,7,8,0 |
| 50 | ld8 r2=[in0],8 // load ESI function's entry point |
| 51 | mov loc0=rp |
| 52 | .body |
| 53 | ;; |
| 54 | ld8 out0=[in1],8 // ESI params loaded from array |
| 55 | ;; // passing all as inputs doesn't work |
| 56 | ld8 out1=[in1],8 |
| 57 | ;; |
| 58 | ld8 out2=[in1],8 |
| 59 | ;; |
| 60 | ld8 out3=[in1],8 |
| 61 | ;; |
| 62 | ld8 out4=[in1],8 |
| 63 | ;; |
| 64 | ld8 out5=[in1],8 |
| 65 | ;; |
| 66 | ld8 out6=[in1],8 |
| 67 | ;; |
| 68 | ld8 out7=[in1] |
| 69 | mov loc2=gp // save global pointer |
| 70 | mov loc4=ar.rsc // save RSE configuration |
| 71 | mov ar.rsc=0 // put RSE in enforced lazy, LE mode |
| 72 | ;; |
| 73 | ld8 gp=[in0] // load ESI function's global pointer |
| 74 | movl r16=PSR_BITS_TO_CLEAR |
| 75 | mov loc3=psr // save processor status word |
| 76 | movl r17=PSR_BITS_TO_SET |
| 77 | ;; |
| 78 | or loc3=loc3,r17 |
| 79 | mov b6=r2 |
| 80 | ;; |
| 81 | andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared |
| 82 | br.call.sptk.many rp=ia64_switch_mode_phys |
| 83 | .ret0: mov loc5=r19 // old ar.bsp |
| 84 | mov loc6=r20 // old sp |
| 85 | br.call.sptk.many rp=b6 // call the ESI function |
| 86 | .ret1: mov ar.rsc=0 // put RSE in enforced lazy, LE mode |
| 87 | mov r16=loc3 // save virtual mode psr |
| 88 | mov r19=loc5 // save virtual mode bspstore |
| 89 | mov r20=loc6 // save virtual mode sp |
| 90 | br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode |
| 91 | .ret2: mov ar.rsc=loc4 // restore RSE configuration |
| 92 | mov ar.pfs=loc1 |
| 93 | mov rp=loc0 |
| 94 | mov gp=loc2 |
| 95 | br.ret.sptk.many rp |
| 96 | END(esi_call_phys) |