viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-spear3xx/spear3xx.c |
| 3 | * |
| 4 | * SPEAr3XX machines common source file |
| 5 | * |
Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 6 | * Copyright (C) 2009-2012 ST Microelectronics |
Viresh Kumar | 10d8935 | 2012-06-20 12:53:02 -0700 | [diff] [blame] | 7 | * Viresh Kumar <viresh.linux@gmail.com> |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 8 | * |
| 9 | * This file is licensed under the terms of the GNU General Public |
| 10 | * License version 2. This program is licensed "as is" without any |
| 11 | * warranty of any kind, whether express or implied. |
| 12 | */ |
| 13 | |
Viresh Kumar | 5fb00f9 | 2012-03-26 10:39:43 +0530 | [diff] [blame] | 14 | #define pr_fmt(fmt) "SPEAr3xx: " fmt |
| 15 | |
Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 16 | #include <linux/amba/pl022.h> |
Arnd Bergmann | 5447521 | 2013-03-12 17:00:03 +0100 | [diff] [blame] | 17 | #include <linux/amba/pl080.h> |
| 18 | #include <linux/clk.h> |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 19 | #include <linux/io.h> |
Arnd Bergmann | 5447521 | 2013-03-12 17:00:03 +0100 | [diff] [blame] | 20 | #include <asm/mach/map.h> |
Arnd Bergmann | 2b9c613 | 2012-12-02 15:49:04 +0100 | [diff] [blame] | 21 | #include "pl080.h" |
| 22 | #include "generic.h" |
Arnd Bergmann | 5019f0b | 2012-04-11 17:30:11 +0000 | [diff] [blame] | 23 | #include <mach/spear.h> |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 24 | #include <mach/misc_regs.h> |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 25 | |
Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 26 | /* ssp device registration */ |
| 27 | struct pl022_ssp_controller pl022_plat_data = { |
| 28 | .bus_id = 0, |
| 29 | .enable_dma = 1, |
| 30 | .dma_filter = pl08x_filter_id, |
| 31 | .dma_tx_param = "ssp0_tx", |
| 32 | .dma_rx_param = "ssp0_rx", |
| 33 | /* |
| 34 | * This is number of spi devices that can be connected to spi. There are |
| 35 | * two type of chipselects on which slave devices can work. One is chip |
| 36 | * select provided by spi masters other is controlled through external |
| 37 | * gpio's. We can't use chipselect provided from spi master (because as |
| 38 | * soon as FIFO becomes empty, CS is disabled and transfer ends). So |
| 39 | * this number now depends on number of gpios available for spi. each |
| 40 | * slave on each master requires a separate gpio pin. |
| 41 | */ |
| 42 | .num_chipselect = 2, |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 43 | }; |
| 44 | |
Viresh Kumar | 0b7ee71 | 2012-03-26 10:29:23 +0530 | [diff] [blame] | 45 | /* dmac device registration */ |
| 46 | struct pl08x_platform_data pl080_plat_data = { |
| 47 | .memcpy_channel = { |
| 48 | .bus_id = "memcpy", |
Russell King | dc8d5f8 | 2012-05-16 12:20:55 +0100 | [diff] [blame] | 49 | .cctl_memcpy = |
| 50 | (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ |
Viresh Kumar | 0b7ee71 | 2012-03-26 10:29:23 +0530 | [diff] [blame] | 51 | PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ |
| 52 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ |
| 53 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ |
| 54 | PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \ |
| 55 | PL080_CONTROL_PROT_SYS), |
| 56 | }, |
| 57 | .lli_buses = PL08X_AHB1, |
| 58 | .mem_buses = PL08X_AHB1, |
Mark Brown | d7cabeed | 2013-06-19 20:38:28 +0100 | [diff] [blame] | 59 | .get_xfer_signal = pl080_get_signal, |
| 60 | .put_xfer_signal = pl080_put_signal, |
Viresh Kumar | 0b7ee71 | 2012-03-26 10:29:23 +0530 | [diff] [blame] | 61 | }; |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 62 | |
Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 63 | /* |
| 64 | * Following will create 16MB static virtual/physical mappings |
| 65 | * PHYSICAL VIRTUAL |
| 66 | * 0xD0000000 0xFD000000 |
| 67 | * 0xFC000000 0xFC000000 |
| 68 | */ |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 69 | struct map_desc spear3xx_io_desc[] __initdata = { |
| 70 | { |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 71 | .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE, |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 72 | .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE), |
Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 73 | .length = SZ_16M, |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 74 | .type = MT_DEVICE |
| 75 | }, { |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 76 | .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE, |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 77 | .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE), |
Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 78 | .length = SZ_16M, |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 79 | .type = MT_DEVICE |
| 80 | }, |
| 81 | }; |
| 82 | |
| 83 | /* This will create static memory mapping for selected devices */ |
| 84 | void __init spear3xx_map_io(void) |
| 85 | { |
| 86 | iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc)); |
viresh kumar | bc4e814 | 2010-04-01 12:30:58 +0100 | [diff] [blame] | 87 | } |
viresh kumar | 70f4c0b | 2010-04-01 12:31:29 +0100 | [diff] [blame] | 88 | |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 89 | void __init spear3xx_timer_init(void) |
Shiraz Hashim | 5c881d9 | 2011-02-16 07:40:32 +0100 | [diff] [blame] | 90 | { |
Vipul Kumar Samar | 5cfc545 | 2012-07-10 17:12:45 +0530 | [diff] [blame] | 91 | char pclk_name[] = "pll3_clk"; |
Shiraz Hashim | 5c881d9 | 2011-02-16 07:40:32 +0100 | [diff] [blame] | 92 | struct clk *gpt_clk, *pclk; |
| 93 | |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 94 | spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE); |
Viresh Kumar | 5df33a6 | 2012-04-10 09:02:35 +0530 | [diff] [blame] | 95 | |
Shiraz Hashim | 5c881d9 | 2011-02-16 07:40:32 +0100 | [diff] [blame] | 96 | /* get the system timer clock */ |
| 97 | gpt_clk = clk_get_sys("gpt0", NULL); |
| 98 | if (IS_ERR(gpt_clk)) { |
| 99 | pr_err("%s:couldn't get clk for gpt\n", __func__); |
| 100 | BUG(); |
| 101 | } |
| 102 | |
| 103 | /* get the suitable parent clock for timer*/ |
| 104 | pclk = clk_get(NULL, pclk_name); |
| 105 | if (IS_ERR(pclk)) { |
| 106 | pr_err("%s:couldn't get %s as parent for gpt\n", |
| 107 | __func__, pclk_name); |
| 108 | BUG(); |
| 109 | } |
| 110 | |
| 111 | clk_set_parent(gpt_clk, pclk); |
| 112 | clk_put(gpt_clk); |
| 113 | clk_put(pclk); |
| 114 | |
Viresh Kumar | 30551c0 | 2012-04-21 13:15:37 +0530 | [diff] [blame] | 115 | spear_setup_of_timer(); |
Shiraz Hashim | 5c881d9 | 2011-02-16 07:40:32 +0100 | [diff] [blame] | 116 | } |