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viresh kumarbc4e8142010-04-01 12:30:58 +01001/*
2 * arch/arm/mach-spear3xx/spear3xx.c
3 *
4 * SPEAr3XX machines common source file
5 *
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05306 * Copyright (C) 2009-2012 ST Microelectronics
Viresh Kumar10d89352012-06-20 12:53:02 -07007 * Viresh Kumar <viresh.linux@gmail.com>
viresh kumarbc4e8142010-04-01 12:30:58 +01008 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
Viresh Kumar5fb00f92012-03-26 10:39:43 +053014#define pr_fmt(fmt) "SPEAr3xx: " fmt
15
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053016#include <linux/amba/pl022.h>
Arnd Bergmann54475212013-03-12 17:00:03 +010017#include <linux/amba/pl080.h>
18#include <linux/clk.h>
viresh kumarbc4e8142010-04-01 12:30:58 +010019#include <linux/io.h>
Arnd Bergmann54475212013-03-12 17:00:03 +010020#include <asm/mach/map.h>
Arnd Bergmann2b9c6132012-12-02 15:49:04 +010021#include "pl080.h"
22#include "generic.h"
Arnd Bergmann5019f0b2012-04-11 17:30:11 +000023#include <mach/spear.h>
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010024#include <mach/misc_regs.h>
viresh kumarbc4e8142010-04-01 12:30:58 +010025
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053026/* ssp device registration */
27struct pl022_ssp_controller pl022_plat_data = {
28 .bus_id = 0,
29 .enable_dma = 1,
30 .dma_filter = pl08x_filter_id,
31 .dma_tx_param = "ssp0_tx",
32 .dma_rx_param = "ssp0_rx",
33 /*
34 * This is number of spi devices that can be connected to spi. There are
35 * two type of chipselects on which slave devices can work. One is chip
36 * select provided by spi masters other is controlled through external
37 * gpio's. We can't use chipselect provided from spi master (because as
38 * soon as FIFO becomes empty, CS is disabled and transfer ends). So
39 * this number now depends on number of gpios available for spi. each
40 * slave on each master requires a separate gpio pin.
41 */
42 .num_chipselect = 2,
viresh kumarbc4e8142010-04-01 12:30:58 +010043};
44
Viresh Kumar0b7ee712012-03-26 10:29:23 +053045/* dmac device registration */
46struct pl08x_platform_data pl080_plat_data = {
47 .memcpy_channel = {
48 .bus_id = "memcpy",
Russell Kingdc8d5f82012-05-16 12:20:55 +010049 .cctl_memcpy =
50 (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \
Viresh Kumar0b7ee712012-03-26 10:29:23 +053051 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \
52 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \
53 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \
54 PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \
55 PL080_CONTROL_PROT_SYS),
56 },
57 .lli_buses = PL08X_AHB1,
58 .mem_buses = PL08X_AHB1,
Mark Brownd7cabeed2013-06-19 20:38:28 +010059 .get_xfer_signal = pl080_get_signal,
60 .put_xfer_signal = pl080_put_signal,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053061};
viresh kumarbc4e8142010-04-01 12:30:58 +010062
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053063/*
64 * Following will create 16MB static virtual/physical mappings
65 * PHYSICAL VIRTUAL
66 * 0xD0000000 0xFD000000
67 * 0xFC000000 0xFC000000
68 */
viresh kumarbc4e8142010-04-01 12:30:58 +010069struct map_desc spear3xx_io_desc[] __initdata = {
70 {
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010071 .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
Arnd Bergmannd42799b2012-12-02 14:45:27 +010072 .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053073 .length = SZ_16M,
viresh kumarbc4e8142010-04-01 12:30:58 +010074 .type = MT_DEVICE
75 }, {
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010076 .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
Arnd Bergmannd42799b2012-12-02 14:45:27 +010077 .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053078 .length = SZ_16M,
viresh kumarbc4e8142010-04-01 12:30:58 +010079 .type = MT_DEVICE
80 },
81};
82
83/* This will create static memory mapping for selected devices */
84void __init spear3xx_map_io(void)
85{
86 iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
viresh kumarbc4e8142010-04-01 12:30:58 +010087}
viresh kumar70f4c0b2010-04-01 12:31:29 +010088
Stephen Warren6bb27d72012-11-08 12:40:59 -070089void __init spear3xx_timer_init(void)
Shiraz Hashim5c881d92011-02-16 07:40:32 +010090{
Vipul Kumar Samar5cfc5452012-07-10 17:12:45 +053091 char pclk_name[] = "pll3_clk";
Shiraz Hashim5c881d92011-02-16 07:40:32 +010092 struct clk *gpt_clk, *pclk;
93
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010094 spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE);
Viresh Kumar5df33a62012-04-10 09:02:35 +053095
Shiraz Hashim5c881d92011-02-16 07:40:32 +010096 /* get the system timer clock */
97 gpt_clk = clk_get_sys("gpt0", NULL);
98 if (IS_ERR(gpt_clk)) {
99 pr_err("%s:couldn't get clk for gpt\n", __func__);
100 BUG();
101 }
102
103 /* get the suitable parent clock for timer*/
104 pclk = clk_get(NULL, pclk_name);
105 if (IS_ERR(pclk)) {
106 pr_err("%s:couldn't get %s as parent for gpt\n",
107 __func__, pclk_name);
108 BUG();
109 }
110
111 clk_set_parent(gpt_clk, pclk);
112 clk_put(gpt_clk);
113 clk_put(pclk);
114
Viresh Kumar30551c02012-04-21 13:15:37 +0530115 spear_setup_of_timer();
Shiraz Hashim5c881d92011-02-16 07:40:32 +0100116}