Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 32 | #include <linux/sched.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/gfp.h> |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 34 | #include "iwch_provider.h" |
| 35 | #include "iwch.h" |
| 36 | #include "iwch_cm.h" |
| 37 | #include "cxio_hal.h" |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 38 | #include "cxio_resource.h" |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 39 | |
| 40 | #define NO_SUPPORT -1 |
| 41 | |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 42 | static int build_rdma_send(union t3_wr *wqe, struct ib_send_wr *wr, |
Adrian Bunk | 2b54035 | 2007-02-21 11:52:49 +0100 | [diff] [blame] | 43 | u8 * flit_cnt) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 44 | { |
| 45 | int i; |
| 46 | u32 plen; |
| 47 | |
| 48 | switch (wr->opcode) { |
| 49 | case IB_WR_SEND: |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 50 | if (wr->send_flags & IB_SEND_SOLICITED) |
| 51 | wqe->send.rdmaop = T3_SEND_WITH_SE; |
| 52 | else |
| 53 | wqe->send.rdmaop = T3_SEND; |
| 54 | wqe->send.rem_stag = 0; |
| 55 | break; |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 56 | case IB_WR_SEND_WITH_INV: |
| 57 | if (wr->send_flags & IB_SEND_SOLICITED) |
| 58 | wqe->send.rdmaop = T3_SEND_WITH_SE_INV; |
| 59 | else |
| 60 | wqe->send.rdmaop = T3_SEND_WITH_INV; |
| 61 | wqe->send.rem_stag = cpu_to_be32(wr->ex.invalidate_rkey); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 62 | break; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 63 | default: |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 64 | return -EINVAL; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 65 | } |
| 66 | if (wr->num_sge > T3_MAX_SGE) |
| 67 | return -EINVAL; |
| 68 | wqe->send.reserved[0] = 0; |
| 69 | wqe->send.reserved[1] = 0; |
| 70 | wqe->send.reserved[2] = 0; |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 71 | plen = 0; |
| 72 | for (i = 0; i < wr->num_sge; i++) { |
| 73 | if ((plen + wr->sg_list[i].length) < plen) |
| 74 | return -EMSGSIZE; |
| 75 | |
| 76 | plen += wr->sg_list[i].length; |
| 77 | wqe->send.sgl[i].stag = cpu_to_be32(wr->sg_list[i].lkey); |
| 78 | wqe->send.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); |
| 79 | wqe->send.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 80 | } |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 81 | wqe->send.num_sgle = cpu_to_be32(wr->num_sge); |
| 82 | *flit_cnt = 4 + ((wr->num_sge) << 1); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 83 | wqe->send.plen = cpu_to_be32(plen); |
| 84 | return 0; |
| 85 | } |
| 86 | |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 87 | static int build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr, |
Adrian Bunk | 2b54035 | 2007-02-21 11:52:49 +0100 | [diff] [blame] | 88 | u8 *flit_cnt) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 89 | { |
| 90 | int i; |
| 91 | u32 plen; |
| 92 | if (wr->num_sge > T3_MAX_SGE) |
| 93 | return -EINVAL; |
| 94 | wqe->write.rdmaop = T3_RDMA_WRITE; |
| 95 | wqe->write.reserved[0] = 0; |
| 96 | wqe->write.reserved[1] = 0; |
| 97 | wqe->write.reserved[2] = 0; |
Christoph Hellwig | e622f2f | 2015-10-08 09:16:33 +0100 | [diff] [blame] | 98 | wqe->write.stag_sink = cpu_to_be32(rdma_wr(wr)->rkey); |
| 99 | wqe->write.to_sink = cpu_to_be64(rdma_wr(wr)->remote_addr); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 100 | |
| 101 | if (wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) { |
| 102 | plen = 4; |
Roland Dreier | 0f39cf3 | 2008-04-16 21:09:32 -0700 | [diff] [blame] | 103 | wqe->write.sgl[0].stag = wr->ex.imm_data; |
Harvey Harrison | 9c3da09 | 2009-01-17 17:11:57 -0800 | [diff] [blame] | 104 | wqe->write.sgl[0].len = cpu_to_be32(0); |
| 105 | wqe->write.num_sgle = cpu_to_be32(0); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 106 | *flit_cnt = 6; |
| 107 | } else { |
| 108 | plen = 0; |
| 109 | for (i = 0; i < wr->num_sge; i++) { |
| 110 | if ((plen + wr->sg_list[i].length) < plen) { |
| 111 | return -EMSGSIZE; |
| 112 | } |
| 113 | plen += wr->sg_list[i].length; |
| 114 | wqe->write.sgl[i].stag = |
| 115 | cpu_to_be32(wr->sg_list[i].lkey); |
| 116 | wqe->write.sgl[i].len = |
| 117 | cpu_to_be32(wr->sg_list[i].length); |
| 118 | wqe->write.sgl[i].to = |
| 119 | cpu_to_be64(wr->sg_list[i].addr); |
| 120 | } |
| 121 | wqe->write.num_sgle = cpu_to_be32(wr->num_sge); |
| 122 | *flit_cnt = 5 + ((wr->num_sge) << 1); |
| 123 | } |
| 124 | wqe->write.plen = cpu_to_be32(plen); |
| 125 | return 0; |
| 126 | } |
| 127 | |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 128 | static int build_rdma_read(union t3_wr *wqe, struct ib_send_wr *wr, |
Adrian Bunk | 2b54035 | 2007-02-21 11:52:49 +0100 | [diff] [blame] | 129 | u8 *flit_cnt) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 130 | { |
| 131 | if (wr->num_sge > 1) |
| 132 | return -EINVAL; |
| 133 | wqe->read.rdmaop = T3_READ_REQ; |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 134 | if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) |
| 135 | wqe->read.local_inv = 1; |
| 136 | else |
| 137 | wqe->read.local_inv = 0; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 138 | wqe->read.reserved[0] = 0; |
| 139 | wqe->read.reserved[1] = 0; |
Christoph Hellwig | e622f2f | 2015-10-08 09:16:33 +0100 | [diff] [blame] | 140 | wqe->read.rem_stag = cpu_to_be32(rdma_wr(wr)->rkey); |
| 141 | wqe->read.rem_to = cpu_to_be64(rdma_wr(wr)->remote_addr); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 142 | wqe->read.local_stag = cpu_to_be32(wr->sg_list[0].lkey); |
| 143 | wqe->read.local_len = cpu_to_be32(wr->sg_list[0].length); |
| 144 | wqe->read.local_to = cpu_to_be64(wr->sg_list[0].addr); |
| 145 | *flit_cnt = sizeof(struct t3_rdma_read_wr) >> 3; |
| 146 | return 0; |
| 147 | } |
| 148 | |
Sagi Grimberg | 14fb417 | 2015-10-13 19:11:29 +0300 | [diff] [blame] | 149 | static int build_memreg(union t3_wr *wqe, struct ib_reg_wr *wr, |
| 150 | u8 *flit_cnt, int *wr_cnt, struct t3_wq *wq) |
| 151 | { |
| 152 | struct iwch_mr *mhp = to_iwch_mr(wr->mr); |
| 153 | int i; |
| 154 | __be64 *p; |
| 155 | |
| 156 | if (mhp->npages > T3_MAX_FASTREG_DEPTH) |
| 157 | return -EINVAL; |
| 158 | *wr_cnt = 1; |
| 159 | wqe->fastreg.stag = cpu_to_be32(wr->key); |
| 160 | wqe->fastreg.len = cpu_to_be32(mhp->ibmr.length); |
| 161 | wqe->fastreg.va_base_hi = cpu_to_be32(mhp->ibmr.iova >> 32); |
| 162 | wqe->fastreg.va_base_lo_fbo = |
| 163 | cpu_to_be32(mhp->ibmr.iova & 0xffffffff); |
| 164 | wqe->fastreg.page_type_perms = cpu_to_be32( |
| 165 | V_FR_PAGE_COUNT(mhp->npages) | |
| 166 | V_FR_PAGE_SIZE(ilog2(wr->mr->page_size) - 12) | |
| 167 | V_FR_TYPE(TPT_VATO) | |
| 168 | V_FR_PERMS(iwch_ib_to_tpt_access(wr->access))); |
| 169 | p = &wqe->fastreg.pbl_addrs[0]; |
| 170 | for (i = 0; i < mhp->npages; i++, p++) { |
| 171 | |
| 172 | /* If we need a 2nd WR, then set it up */ |
| 173 | if (i == T3_MAX_FASTREG_FRAG) { |
| 174 | *wr_cnt = 2; |
| 175 | wqe = (union t3_wr *)(wq->queue + |
| 176 | Q_PTR2IDX((wq->wptr+1), wq->size_log2)); |
| 177 | build_fw_riwrh((void *)wqe, T3_WR_FASTREG, 0, |
| 178 | Q_GENBIT(wq->wptr + 1, wq->size_log2), |
| 179 | 0, 1 + mhp->npages - T3_MAX_FASTREG_FRAG, |
| 180 | T3_EOP); |
| 181 | |
| 182 | p = &wqe->pbl_frag.pbl_addrs[0]; |
| 183 | } |
| 184 | *p = cpu_to_be64((u64)mhp->pages[i]); |
| 185 | } |
| 186 | *flit_cnt = 5 + mhp->npages; |
| 187 | if (*flit_cnt > 15) |
| 188 | *flit_cnt = 15; |
| 189 | return 0; |
| 190 | } |
| 191 | |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 192 | static int build_inv_stag(union t3_wr *wqe, struct ib_send_wr *wr, |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 193 | u8 *flit_cnt) |
| 194 | { |
| 195 | wqe->local_inv.stag = cpu_to_be32(wr->ex.invalidate_rkey); |
| 196 | wqe->local_inv.reserved = 0; |
| 197 | *flit_cnt = sizeof(struct t3_local_inv_wr) >> 3; |
| 198 | return 0; |
| 199 | } |
| 200 | |
Adrian Bunk | 2b54035 | 2007-02-21 11:52:49 +0100 | [diff] [blame] | 201 | static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list, |
| 202 | u32 num_sgle, u32 * pbl_addr, u8 * page_size) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 203 | { |
| 204 | int i; |
| 205 | struct iwch_mr *mhp; |
Steve Wise | 900f4c1 | 2009-02-10 16:38:22 -0800 | [diff] [blame] | 206 | u64 offset; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 207 | for (i = 0; i < num_sgle; i++) { |
| 208 | |
| 209 | mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8); |
| 210 | if (!mhp) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 211 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 212 | return -EIO; |
| 213 | } |
| 214 | if (!mhp->attr.state) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 215 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 216 | return -EIO; |
| 217 | } |
| 218 | if (mhp->attr.zbva) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 219 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 220 | return -EIO; |
| 221 | } |
| 222 | |
| 223 | if (sg_list[i].addr < mhp->attr.va_fbo) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 224 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 225 | return -EINVAL; |
| 226 | } |
| 227 | if (sg_list[i].addr + ((u64) sg_list[i].length) < |
| 228 | sg_list[i].addr) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 229 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 230 | return -EINVAL; |
| 231 | } |
| 232 | if (sg_list[i].addr + ((u64) sg_list[i].length) > |
| 233 | mhp->attr.va_fbo + ((u64) mhp->attr.len)) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 234 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 235 | return -EINVAL; |
| 236 | } |
| 237 | offset = sg_list[i].addr - mhp->attr.va_fbo; |
Steve Wise | 900f4c1 | 2009-02-10 16:38:22 -0800 | [diff] [blame] | 238 | offset += mhp->attr.va_fbo & |
| 239 | ((1UL << (12 + mhp->attr.page_size)) - 1); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 240 | pbl_addr[i] = ((mhp->attr.pbl_addr - |
| 241 | rhp->rdev.rnic_info.pbl_base) >> 3) + |
| 242 | (offset >> (12 + mhp->attr.page_size)); |
| 243 | page_size[i] = mhp->attr.page_size; |
| 244 | } |
| 245 | return 0; |
| 246 | } |
| 247 | |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 248 | static int build_rdma_recv(struct iwch_qp *qhp, union t3_wr *wqe, |
Adrian Bunk | 2b54035 | 2007-02-21 11:52:49 +0100 | [diff] [blame] | 249 | struct ib_recv_wr *wr) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 250 | { |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 251 | int i, err = 0; |
| 252 | u32 pbl_addr[T3_MAX_SGE]; |
| 253 | u8 page_size[T3_MAX_SGE]; |
| 254 | |
| 255 | err = iwch_sgl2pbl_map(qhp->rhp, wr->sg_list, wr->num_sge, pbl_addr, |
| 256 | page_size); |
| 257 | if (err) |
| 258 | return err; |
| 259 | wqe->recv.pagesz[0] = page_size[0]; |
| 260 | wqe->recv.pagesz[1] = page_size[1]; |
| 261 | wqe->recv.pagesz[2] = page_size[2]; |
| 262 | wqe->recv.pagesz[3] = page_size[3]; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 263 | wqe->recv.num_sgle = cpu_to_be32(wr->num_sge); |
| 264 | for (i = 0; i < wr->num_sge; i++) { |
| 265 | wqe->recv.sgl[i].stag = cpu_to_be32(wr->sg_list[i].lkey); |
| 266 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 267 | |
| 268 | /* to in the WQE == the offset into the page */ |
Steve Wise | 42632896 | 2009-02-16 21:23:32 -0800 | [diff] [blame] | 269 | wqe->recv.sgl[i].to = cpu_to_be64(((u32)wr->sg_list[i].addr) & |
| 270 | ((1UL << (12 + page_size[i])) - 1)); |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 271 | |
| 272 | /* pbl_addr is the adapters address in the PBL */ |
| 273 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_addr[i]); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 274 | } |
| 275 | for (; i < T3_MAX_SGE; i++) { |
| 276 | wqe->recv.sgl[i].stag = 0; |
| 277 | wqe->recv.sgl[i].len = 0; |
| 278 | wqe->recv.sgl[i].to = 0; |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 279 | wqe->recv.pbl_addr[i] = 0; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 280 | } |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 281 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, |
| 282 | qhp->wq.rq_size_log2)].wr_id = wr->wr_id; |
| 283 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, |
| 284 | qhp->wq.rq_size_log2)].pbl_addr = 0; |
| 285 | return 0; |
| 286 | } |
| 287 | |
| 288 | static int build_zero_stag_recv(struct iwch_qp *qhp, union t3_wr *wqe, |
| 289 | struct ib_recv_wr *wr) |
| 290 | { |
| 291 | int i; |
| 292 | u32 pbl_addr; |
| 293 | u32 pbl_offset; |
| 294 | |
| 295 | |
| 296 | /* |
| 297 | * The T3 HW requires the PBL in the HW recv descriptor to reference |
| 298 | * a PBL entry. So we allocate the max needed PBL memory here and pass |
| 299 | * it to the uP in the recv WR. The uP will build the PBL and setup |
| 300 | * the HW recv descriptor. |
| 301 | */ |
| 302 | pbl_addr = cxio_hal_pblpool_alloc(&qhp->rhp->rdev, T3_STAG0_PBL_SIZE); |
| 303 | if (!pbl_addr) |
| 304 | return -ENOMEM; |
| 305 | |
| 306 | /* |
| 307 | * Compute the 8B aligned offset. |
| 308 | */ |
| 309 | pbl_offset = (pbl_addr - qhp->rhp->rdev.rnic_info.pbl_base) >> 3; |
| 310 | |
| 311 | wqe->recv.num_sgle = cpu_to_be32(wr->num_sge); |
| 312 | |
| 313 | for (i = 0; i < wr->num_sge; i++) { |
| 314 | |
| 315 | /* |
| 316 | * Use a 128MB page size. This and an imposed 128MB |
| 317 | * sge length limit allows us to require only a 2-entry HW |
| 318 | * PBL for each SGE. This restriction is acceptable since |
| 319 | * since it is not possible to allocate 128MB of contiguous |
| 320 | * DMA coherent memory! |
| 321 | */ |
| 322 | if (wr->sg_list[i].length > T3_STAG0_MAX_PBE_LEN) |
| 323 | return -EINVAL; |
| 324 | wqe->recv.pagesz[i] = T3_STAG0_PAGE_SHIFT; |
| 325 | |
| 326 | /* |
| 327 | * T3 restricts a recv to all zero-stag or all non-zero-stag. |
| 328 | */ |
| 329 | if (wr->sg_list[i].lkey != 0) |
| 330 | return -EINVAL; |
| 331 | wqe->recv.sgl[i].stag = 0; |
| 332 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); |
| 333 | wqe->recv.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); |
| 334 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_offset); |
| 335 | pbl_offset += 2; |
| 336 | } |
| 337 | for (; i < T3_MAX_SGE; i++) { |
| 338 | wqe->recv.pagesz[i] = 0; |
| 339 | wqe->recv.sgl[i].stag = 0; |
| 340 | wqe->recv.sgl[i].len = 0; |
| 341 | wqe->recv.sgl[i].to = 0; |
| 342 | wqe->recv.pbl_addr[i] = 0; |
| 343 | } |
| 344 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, |
| 345 | qhp->wq.rq_size_log2)].wr_id = wr->wr_id; |
| 346 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, |
| 347 | qhp->wq.rq_size_log2)].pbl_addr = pbl_addr; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, |
| 352 | struct ib_send_wr **bad_wr) |
| 353 | { |
| 354 | int err = 0; |
Roland Dreier | 21609ae | 2008-05-16 14:58:40 -0700 | [diff] [blame] | 355 | u8 uninitialized_var(t3_wr_flit_cnt); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 356 | enum t3_wr_opcode t3_wr_opcode = 0; |
| 357 | enum t3_wr_flags t3_wr_flags; |
| 358 | struct iwch_qp *qhp; |
| 359 | u32 idx; |
| 360 | union t3_wr *wqe; |
| 361 | u32 num_wrs; |
| 362 | unsigned long flag; |
| 363 | struct t3_swsq *sqp; |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 364 | int wr_cnt = 1; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 365 | |
| 366 | qhp = to_iwch_qp(ibqp); |
| 367 | spin_lock_irqsave(&qhp->lock, flag); |
| 368 | if (qhp->attr.state > IWCH_QP_STATE_RTS) { |
| 369 | spin_unlock_irqrestore(&qhp->lock, flag); |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 370 | err = -EINVAL; |
| 371 | goto out; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 372 | } |
| 373 | num_wrs = Q_FREECNT(qhp->wq.sq_rptr, qhp->wq.sq_wptr, |
| 374 | qhp->wq.sq_size_log2); |
Dan Carpenter | 3d4f9a2 | 2010-07-19 20:30:14 +0000 | [diff] [blame] | 375 | if (num_wrs == 0) { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 376 | spin_unlock_irqrestore(&qhp->lock, flag); |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 377 | err = -ENOMEM; |
| 378 | goto out; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 379 | } |
| 380 | while (wr) { |
| 381 | if (num_wrs == 0) { |
| 382 | err = -ENOMEM; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 383 | break; |
| 384 | } |
| 385 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); |
| 386 | wqe = (union t3_wr *) (qhp->wq.queue + idx); |
| 387 | t3_wr_flags = 0; |
| 388 | if (wr->send_flags & IB_SEND_SOLICITED) |
| 389 | t3_wr_flags |= T3_SOLICITED_EVENT_FLAG; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 390 | if (wr->send_flags & IB_SEND_SIGNALED) |
| 391 | t3_wr_flags |= T3_COMPLETION_FLAG; |
| 392 | sqp = qhp->wq.sq + |
| 393 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); |
| 394 | switch (wr->opcode) { |
| 395 | case IB_WR_SEND: |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 396 | case IB_WR_SEND_WITH_INV: |
| 397 | if (wr->send_flags & IB_SEND_FENCE) |
| 398 | t3_wr_flags |= T3_READ_FENCE_FLAG; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 399 | t3_wr_opcode = T3_WR_SEND; |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 400 | err = build_rdma_send(wqe, wr, &t3_wr_flit_cnt); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 401 | break; |
| 402 | case IB_WR_RDMA_WRITE: |
| 403 | case IB_WR_RDMA_WRITE_WITH_IMM: |
| 404 | t3_wr_opcode = T3_WR_WRITE; |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 405 | err = build_rdma_write(wqe, wr, &t3_wr_flit_cnt); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 406 | break; |
| 407 | case IB_WR_RDMA_READ: |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 408 | case IB_WR_RDMA_READ_WITH_INV: |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 409 | t3_wr_opcode = T3_WR_READ; |
| 410 | t3_wr_flags = 0; /* T3 reads are always signaled */ |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 411 | err = build_rdma_read(wqe, wr, &t3_wr_flit_cnt); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 412 | if (err) |
| 413 | break; |
| 414 | sqp->read_len = wqe->read.local_len; |
| 415 | if (!qhp->wq.oldest_read) |
| 416 | qhp->wq.oldest_read = sqp; |
| 417 | break; |
Sagi Grimberg | 14fb417 | 2015-10-13 19:11:29 +0300 | [diff] [blame] | 418 | case IB_WR_REG_MR: |
| 419 | t3_wr_opcode = T3_WR_FASTREG; |
| 420 | err = build_memreg(wqe, reg_wr(wr), &t3_wr_flit_cnt, |
| 421 | &wr_cnt, &qhp->wq); |
| 422 | break; |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 423 | case IB_WR_LOCAL_INV: |
| 424 | if (wr->send_flags & IB_SEND_FENCE) |
| 425 | t3_wr_flags |= T3_LOCAL_FENCE_FLAG; |
| 426 | t3_wr_opcode = T3_WR_INV_STAG; |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 427 | err = build_inv_stag(wqe, wr, &t3_wr_flit_cnt); |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 428 | break; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 429 | default: |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 430 | PDBG("%s post of type=%d TBD!\n", __func__, |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 431 | wr->opcode); |
| 432 | err = -EINVAL; |
| 433 | } |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 434 | if (err) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 435 | break; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 436 | wqe->send.wrid.id0.hi = qhp->wq.sq_wptr; |
| 437 | sqp->wr_id = wr->wr_id; |
| 438 | sqp->opcode = wr2opcode(t3_wr_opcode); |
| 439 | sqp->sq_wptr = qhp->wq.sq_wptr; |
| 440 | sqp->complete = 0; |
| 441 | sqp->signaled = (wr->send_flags & IB_SEND_SIGNALED); |
| 442 | |
| 443 | build_fw_riwrh((void *) wqe, t3_wr_opcode, t3_wr_flags, |
| 444 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 445 | 0, t3_wr_flit_cnt, |
| 446 | (wr_cnt == 1) ? T3_SOPEOP : T3_SOP); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 447 | PDBG("%s cookie 0x%llx wq idx 0x%x swsq idx %ld opcode %d\n", |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 448 | __func__, (unsigned long long) wr->wr_id, idx, |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 449 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2), |
| 450 | sqp->opcode); |
| 451 | wr = wr->next; |
| 452 | num_wrs--; |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 453 | qhp->wq.wptr += wr_cnt; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 454 | ++(qhp->wq.sq_wptr); |
| 455 | } |
| 456 | spin_unlock_irqrestore(&qhp->lock, flag); |
Steve Wise | e998f24 | 2010-01-27 17:03:34 +0000 | [diff] [blame] | 457 | if (cxio_wq_db_enabled(&qhp->wq)) |
| 458 | ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 459 | |
| 460 | out: |
| 461 | if (err) |
| 462 | *bad_wr = wr; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 463 | return err; |
| 464 | } |
| 465 | |
| 466 | int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, |
| 467 | struct ib_recv_wr **bad_wr) |
| 468 | { |
| 469 | int err = 0; |
| 470 | struct iwch_qp *qhp; |
| 471 | u32 idx; |
| 472 | union t3_wr *wqe; |
| 473 | u32 num_wrs; |
| 474 | unsigned long flag; |
| 475 | |
| 476 | qhp = to_iwch_qp(ibqp); |
| 477 | spin_lock_irqsave(&qhp->lock, flag); |
| 478 | if (qhp->attr.state > IWCH_QP_STATE_RTS) { |
| 479 | spin_unlock_irqrestore(&qhp->lock, flag); |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 480 | err = -EINVAL; |
| 481 | goto out; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 482 | } |
| 483 | num_wrs = Q_FREECNT(qhp->wq.rq_rptr, qhp->wq.rq_wptr, |
| 484 | qhp->wq.rq_size_log2) - 1; |
| 485 | if (!wr) { |
| 486 | spin_unlock_irqrestore(&qhp->lock, flag); |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 487 | err = -ENOMEM; |
| 488 | goto out; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 489 | } |
| 490 | while (wr) { |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 491 | if (wr->num_sge > T3_MAX_SGE) { |
| 492 | err = -EINVAL; |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 493 | break; |
| 494 | } |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 495 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); |
| 496 | wqe = (union t3_wr *) (qhp->wq.queue + idx); |
| 497 | if (num_wrs) |
Steve Wise | 4ab928f | 2008-07-14 23:48:53 -0700 | [diff] [blame] | 498 | if (wr->sg_list[0].lkey) |
| 499 | err = build_rdma_recv(qhp, wqe, wr); |
| 500 | else |
| 501 | err = build_zero_stag_recv(qhp, wqe, wr); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 502 | else |
| 503 | err = -ENOMEM; |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 504 | |
| 505 | if (err) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 506 | break; |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 507 | |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 508 | build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG, |
| 509 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), |
Steve Wise | e7e5582 | 2008-07-14 23:48:45 -0700 | [diff] [blame] | 510 | 0, sizeof(struct t3_receive_wr) >> 3, T3_SOPEOP); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 511 | PDBG("%s cookie 0x%llx idx 0x%x rq_wptr 0x%x rw_rptr 0x%x " |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 512 | "wqe %p \n", __func__, (unsigned long long) wr->wr_id, |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 513 | idx, qhp->wq.rq_wptr, qhp->wq.rq_rptr, wqe); |
| 514 | ++(qhp->wq.rq_wptr); |
| 515 | ++(qhp->wq.wptr); |
| 516 | wr = wr->next; |
| 517 | num_wrs--; |
| 518 | } |
| 519 | spin_unlock_irqrestore(&qhp->lock, flag); |
Steve Wise | e998f24 | 2010-01-27 17:03:34 +0000 | [diff] [blame] | 520 | if (cxio_wq_db_enabled(&qhp->wq)) |
| 521 | ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); |
Frank Zago | 48617f8 | 2009-12-15 23:39:10 -0800 | [diff] [blame] | 522 | |
| 523 | out: |
| 524 | if (err) |
| 525 | *bad_wr = wr; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 526 | return err; |
| 527 | } |
| 528 | |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 529 | static inline void build_term_codes(struct respQ_msg_t *rsp_msg, |
| 530 | u8 *layer_type, u8 *ecode) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 531 | { |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 532 | int status = TPT_ERR_INTERNAL_ERR; |
| 533 | int tagged = 0; |
| 534 | int opcode = -1; |
| 535 | int rqtype = 0; |
| 536 | int send_inv = 0; |
| 537 | |
| 538 | if (rsp_msg) { |
| 539 | status = CQE_STATUS(rsp_msg->cqe); |
| 540 | opcode = CQE_OPCODE(rsp_msg->cqe); |
| 541 | rqtype = RQ_TYPE(rsp_msg->cqe); |
| 542 | send_inv = (opcode == T3_SEND_WITH_INV) || |
| 543 | (opcode == T3_SEND_WITH_SE_INV); |
| 544 | tagged = (opcode == T3_RDMA_WRITE) || |
| 545 | (rqtype && (opcode == T3_READ_RESP)); |
| 546 | } |
| 547 | |
| 548 | switch (status) { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 549 | case TPT_ERR_STAG: |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 550 | if (send_inv) { |
| 551 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; |
| 552 | *ecode = RDMAP_CANT_INV_STAG; |
| 553 | } else { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 554 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; |
| 555 | *ecode = RDMAP_INV_STAG; |
| 556 | } |
| 557 | break; |
| 558 | case TPT_ERR_PDID: |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 559 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; |
| 560 | if ((opcode == T3_SEND_WITH_INV) || |
| 561 | (opcode == T3_SEND_WITH_SE_INV)) |
| 562 | *ecode = RDMAP_CANT_INV_STAG; |
| 563 | else |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 564 | *ecode = RDMAP_STAG_NOT_ASSOC; |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 565 | break; |
| 566 | case TPT_ERR_QPID: |
| 567 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; |
| 568 | *ecode = RDMAP_STAG_NOT_ASSOC; |
| 569 | break; |
| 570 | case TPT_ERR_ACCESS: |
| 571 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; |
| 572 | *ecode = RDMAP_ACC_VIOL; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 573 | break; |
| 574 | case TPT_ERR_WRAP: |
| 575 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; |
| 576 | *ecode = RDMAP_TO_WRAP; |
| 577 | break; |
| 578 | case TPT_ERR_BOUND: |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 579 | if (tagged) { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 580 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; |
| 581 | *ecode = DDPT_BASE_BOUNDS; |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 582 | } else { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 583 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; |
| 584 | *ecode = RDMAP_BASE_BOUNDS; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 585 | } |
| 586 | break; |
| 587 | case TPT_ERR_INVALIDATE_SHARED_MR: |
| 588 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: |
| 589 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; |
| 590 | *ecode = RDMAP_CANT_INV_STAG; |
| 591 | break; |
| 592 | case TPT_ERR_ECC: |
| 593 | case TPT_ERR_ECC_PSTAG: |
| 594 | case TPT_ERR_INTERNAL_ERR: |
| 595 | *layer_type = LAYER_RDMAP|RDMAP_LOCAL_CATA; |
| 596 | *ecode = 0; |
| 597 | break; |
| 598 | case TPT_ERR_OUT_OF_RQE: |
| 599 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; |
| 600 | *ecode = DDPU_INV_MSN_NOBUF; |
| 601 | break; |
| 602 | case TPT_ERR_PBL_ADDR_BOUND: |
| 603 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; |
| 604 | *ecode = DDPT_BASE_BOUNDS; |
| 605 | break; |
| 606 | case TPT_ERR_CRC: |
| 607 | *layer_type = LAYER_MPA|DDP_LLP; |
| 608 | *ecode = MPA_CRC_ERR; |
| 609 | break; |
| 610 | case TPT_ERR_MARKER: |
| 611 | *layer_type = LAYER_MPA|DDP_LLP; |
| 612 | *ecode = MPA_MARKER_ERR; |
| 613 | break; |
| 614 | case TPT_ERR_PDU_LEN_ERR: |
| 615 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; |
| 616 | *ecode = DDPU_MSG_TOOBIG; |
| 617 | break; |
| 618 | case TPT_ERR_DDP_VERSION: |
| 619 | if (tagged) { |
| 620 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; |
| 621 | *ecode = DDPT_INV_VERS; |
| 622 | } else { |
| 623 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; |
| 624 | *ecode = DDPU_INV_VERS; |
| 625 | } |
| 626 | break; |
| 627 | case TPT_ERR_RDMA_VERSION: |
| 628 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; |
| 629 | *ecode = RDMAP_INV_VERS; |
| 630 | break; |
| 631 | case TPT_ERR_OPCODE: |
| 632 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; |
| 633 | *ecode = RDMAP_INV_OPCODE; |
| 634 | break; |
| 635 | case TPT_ERR_DDP_QUEUE_NUM: |
| 636 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; |
| 637 | *ecode = DDPU_INV_QN; |
| 638 | break; |
| 639 | case TPT_ERR_MSN: |
| 640 | case TPT_ERR_MSN_GAP: |
| 641 | case TPT_ERR_MSN_RANGE: |
| 642 | case TPT_ERR_IRD_OVERFLOW: |
| 643 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; |
| 644 | *ecode = DDPU_INV_MSN_RANGE; |
| 645 | break; |
| 646 | case TPT_ERR_TBIT: |
| 647 | *layer_type = LAYER_DDP|DDP_LOCAL_CATA; |
| 648 | *ecode = 0; |
| 649 | break; |
| 650 | case TPT_ERR_MO: |
| 651 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; |
| 652 | *ecode = DDPU_INV_MO; |
| 653 | break; |
| 654 | default: |
| 655 | *layer_type = LAYER_RDMAP|DDP_LOCAL_CATA; |
| 656 | *ecode = 0; |
| 657 | break; |
| 658 | } |
| 659 | } |
| 660 | |
Steve Wise | 8078386 | 2011-05-13 18:37:18 +0000 | [diff] [blame] | 661 | int iwch_post_zb_read(struct iwch_ep *ep) |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 662 | { |
| 663 | union t3_wr *wqe; |
| 664 | struct sk_buff *skb; |
| 665 | u8 flit_cnt = sizeof(struct t3_rdma_read_wr) >> 3; |
| 666 | |
| 667 | PDBG("%s enter\n", __func__); |
| 668 | skb = alloc_skb(40, GFP_KERNEL); |
| 669 | if (!skb) { |
| 670 | printk(KERN_ERR "%s cannot send zb_read!!\n", __func__); |
| 671 | return -ENOMEM; |
| 672 | } |
| 673 | wqe = (union t3_wr *)skb_put(skb, sizeof(struct t3_rdma_read_wr)); |
| 674 | memset(wqe, 0, sizeof(struct t3_rdma_read_wr)); |
| 675 | wqe->read.rdmaop = T3_READ_REQ; |
| 676 | wqe->read.reserved[0] = 0; |
| 677 | wqe->read.reserved[1] = 0; |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 678 | wqe->read.rem_stag = cpu_to_be32(1); |
| 679 | wqe->read.rem_to = cpu_to_be64(1); |
| 680 | wqe->read.local_stag = cpu_to_be32(1); |
| 681 | wqe->read.local_len = cpu_to_be32(0); |
| 682 | wqe->read.local_to = cpu_to_be64(1); |
| 683 | wqe->send.wrh.op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(T3_WR_READ)); |
Steve Wise | 8078386 | 2011-05-13 18:37:18 +0000 | [diff] [blame] | 684 | wqe->send.wrh.gen_tid_len = cpu_to_be32(V_FW_RIWR_TID(ep->hwtid)| |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 685 | V_FW_RIWR_LEN(flit_cnt)); |
| 686 | skb->priority = CPL_PRIORITY_DATA; |
Steve Wise | 8078386 | 2011-05-13 18:37:18 +0000 | [diff] [blame] | 687 | return iwch_cxgb3_ofld_send(ep->com.qp->rhp->rdev.t3cdev_p, skb); |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 688 | } |
| 689 | |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 690 | /* |
| 691 | * This posts a TERMINATE with layer=RDMA, type=catastrophic. |
| 692 | */ |
| 693 | int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg) |
| 694 | { |
| 695 | union t3_wr *wqe; |
| 696 | struct terminate_message *term; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 697 | struct sk_buff *skb; |
| 698 | |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 699 | PDBG("%s %d\n", __func__, __LINE__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 700 | skb = alloc_skb(40, GFP_ATOMIC); |
| 701 | if (!skb) { |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 702 | printk(KERN_ERR "%s cannot send TERMINATE!\n", __func__); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 703 | return -ENOMEM; |
| 704 | } |
| 705 | wqe = (union t3_wr *)skb_put(skb, 40); |
| 706 | memset(wqe, 0, 40); |
| 707 | wqe->send.rdmaop = T3_TERMINATE; |
| 708 | |
| 709 | /* immediate data length */ |
| 710 | wqe->send.plen = htonl(4); |
| 711 | |
| 712 | /* immediate data starts here. */ |
| 713 | term = (struct terminate_message *)wqe->send.sgl; |
Steve Wise | 4a97d47 | 2007-04-26 15:21:02 -0500 | [diff] [blame] | 714 | build_term_codes(rsp_msg, &term->layer_etype, &term->ecode); |
Steve Wise | fb497d7 | 2007-06-19 09:27:48 -0500 | [diff] [blame] | 715 | wqe->send.wrh.op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(T3_WR_SEND) | |
| 716 | V_FW_RIWR_FLAGS(T3_COMPLETION_FLAG | T3_NOTIFY_FLAG)); |
| 717 | wqe->send.wrh.gen_tid_len = cpu_to_be32(V_FW_RIWR_TID(qhp->ep->hwtid)); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 718 | skb->priority = CPL_PRIORITY_DATA; |
Steve Wise | 04b5d02 | 2009-03-30 08:37:56 -0700 | [diff] [blame] | 719 | return iwch_cxgb3_ofld_send(qhp->rhp->rdev.t3cdev_p, skb); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 720 | } |
| 721 | |
| 722 | /* |
| 723 | * Assumes qhp lock is held. |
| 724 | */ |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 725 | static void __flush_qp(struct iwch_qp *qhp, struct iwch_cq *rchp, |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 726 | struct iwch_cq *schp) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 727 | { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 728 | int count; |
Steve Wise | c828694 | 2008-05-02 11:17:41 -0500 | [diff] [blame] | 729 | int flushed; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 730 | |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 731 | |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 732 | PDBG("%s qhp %p rchp %p schp %p\n", __func__, qhp, rchp, schp); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 733 | /* take a ref on the qhp since we must release the lock */ |
| 734 | atomic_inc(&qhp->refcnt); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 735 | spin_unlock(&qhp->lock); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 736 | |
Uwe Kleine-König | 732bee7 | 2010-06-11 12:16:59 +0200 | [diff] [blame] | 737 | /* locking hierarchy: cq lock first, then qp lock. */ |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 738 | spin_lock(&rchp->lock); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 739 | spin_lock(&qhp->lock); |
| 740 | cxio_flush_hw_cq(&rchp->cq); |
| 741 | cxio_count_rcqes(&rchp->cq, &qhp->wq, &count); |
Steve Wise | c828694 | 2008-05-02 11:17:41 -0500 | [diff] [blame] | 742 | flushed = cxio_flush_rq(&qhp->wq, &rchp->cq, count); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 743 | spin_unlock(&qhp->lock); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 744 | spin_unlock(&rchp->lock); |
Kumar Sanghvi | f7cc25d | 2011-10-24 21:20:22 +0530 | [diff] [blame] | 745 | if (flushed) { |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 746 | spin_lock(&rchp->comp_handler_lock); |
Steve Wise | c828694 | 2008-05-02 11:17:41 -0500 | [diff] [blame] | 747 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 748 | spin_unlock(&rchp->comp_handler_lock); |
Kumar Sanghvi | f7cc25d | 2011-10-24 21:20:22 +0530 | [diff] [blame] | 749 | } |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 750 | |
Uwe Kleine-König | 732bee7 | 2010-06-11 12:16:59 +0200 | [diff] [blame] | 751 | /* locking hierarchy: cq lock first, then qp lock. */ |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 752 | spin_lock(&schp->lock); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 753 | spin_lock(&qhp->lock); |
| 754 | cxio_flush_hw_cq(&schp->cq); |
| 755 | cxio_count_scqes(&schp->cq, &qhp->wq, &count); |
Steve Wise | c828694 | 2008-05-02 11:17:41 -0500 | [diff] [blame] | 756 | flushed = cxio_flush_sq(&qhp->wq, &schp->cq, count); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 757 | spin_unlock(&qhp->lock); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 758 | spin_unlock(&schp->lock); |
Kumar Sanghvi | f7cc25d | 2011-10-24 21:20:22 +0530 | [diff] [blame] | 759 | if (flushed) { |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 760 | spin_lock(&schp->comp_handler_lock); |
Steve Wise | c828694 | 2008-05-02 11:17:41 -0500 | [diff] [blame] | 761 | (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 762 | spin_unlock(&schp->comp_handler_lock); |
Kumar Sanghvi | f7cc25d | 2011-10-24 21:20:22 +0530 | [diff] [blame] | 763 | } |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 764 | |
| 765 | /* deref */ |
| 766 | if (atomic_dec_and_test(&qhp->refcnt)) |
| 767 | wake_up(&qhp->wait); |
| 768 | |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 769 | spin_lock(&qhp->lock); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 770 | } |
| 771 | |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 772 | static void flush_qp(struct iwch_qp *qhp) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 773 | { |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 774 | struct iwch_cq *rchp, *schp; |
| 775 | |
| 776 | rchp = get_chp(qhp->rhp, qhp->attr.rcq); |
| 777 | schp = get_chp(qhp->rhp, qhp->attr.scq); |
| 778 | |
| 779 | if (qhp->ibqp.uobject) { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 780 | cxio_set_wq_in_error(&qhp->wq); |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 781 | cxio_set_cq_in_error(&rchp->cq); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 782 | spin_lock(&rchp->comp_handler_lock); |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 783 | (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 784 | spin_unlock(&rchp->comp_handler_lock); |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 785 | if (schp != rchp) { |
| 786 | cxio_set_cq_in_error(&schp->cq); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 787 | spin_lock(&schp->comp_handler_lock); |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 788 | (*schp->ibcq.comp_handler)(&schp->ibcq, |
| 789 | schp->ibcq.cq_context); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 790 | spin_unlock(&schp->comp_handler_lock); |
Steve Wise | b955150 | 2010-10-21 12:37:06 +0000 | [diff] [blame] | 791 | } |
| 792 | return; |
| 793 | } |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 794 | __flush_qp(qhp, rchp, schp); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 795 | } |
| 796 | |
| 797 | |
| 798 | /* |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 799 | * Return count of RECV WRs posted |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 800 | */ |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 801 | u16 iwch_rqes_posted(struct iwch_qp *qhp) |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 802 | { |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 803 | union t3_wr *wqe = qhp->wq.queue; |
| 804 | u16 count = 0; |
Dan Carpenter | 21bfd47 | 2013-06-18 10:27:38 +0300 | [diff] [blame] | 805 | |
| 806 | while (count < USHRT_MAX && fw_riwrh_opcode((struct fw_riwrh *)wqe) == T3_WR_RCV) { |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 807 | count++; |
| 808 | wqe++; |
| 809 | } |
| 810 | PDBG("%s qhp %p count %u\n", __func__, qhp, count); |
| 811 | return count; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 812 | } |
| 813 | |
| 814 | static int rdma_init(struct iwch_dev *rhp, struct iwch_qp *qhp, |
| 815 | enum iwch_qp_attr_mask mask, |
| 816 | struct iwch_qp_attributes *attrs) |
| 817 | { |
| 818 | struct t3_rdma_init_attr init_attr; |
| 819 | int ret; |
| 820 | |
| 821 | init_attr.tid = qhp->ep->hwtid; |
| 822 | init_attr.qpid = qhp->wq.qpid; |
| 823 | init_attr.pdid = qhp->attr.pd; |
| 824 | init_attr.scqid = qhp->attr.scq; |
| 825 | init_attr.rcqid = qhp->attr.rcq; |
| 826 | init_attr.rq_addr = qhp->wq.rq_addr; |
| 827 | init_attr.rq_size = 1 << qhp->wq.rq_size_log2; |
| 828 | init_attr.mpaattrs = uP_RI_MPA_IETF_ENABLE | |
| 829 | qhp->attr.mpa_attr.recv_marker_enabled | |
| 830 | (qhp->attr.mpa_attr.xmit_marker_enabled << 1) | |
| 831 | (qhp->attr.mpa_attr.crc_enabled << 2); |
| 832 | |
Steve Wise | 5f0f66b | 2008-08-04 11:04:42 -0700 | [diff] [blame] | 833 | init_attr.qpcaps = uP_RI_QP_RDMA_READ_ENABLE | |
| 834 | uP_RI_QP_RDMA_WRITE_ENABLE | |
| 835 | uP_RI_QP_BIND_ENABLE; |
| 836 | if (!qhp->ibqp.uobject) |
| 837 | init_attr.qpcaps |= uP_RI_QP_STAG0_ENABLE | |
| 838 | uP_RI_QP_FAST_REGISTER_ENABLE; |
| 839 | |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 840 | init_attr.tcp_emss = qhp->ep->emss; |
| 841 | init_attr.ord = qhp->attr.max_ord; |
| 842 | init_attr.ird = qhp->attr.max_ird; |
| 843 | init_attr.qp_dma_addr = qhp->wq.dma_addr; |
| 844 | init_attr.qp_dma_size = (1UL << qhp->wq.size_log2); |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 845 | init_attr.rqe_count = iwch_rqes_posted(qhp); |
| 846 | init_attr.flags = qhp->attr.mpa_attr.initiator ? MPA_INITIATOR : 0; |
Steve Wise | b496fe8 | 2009-09-05 20:22:37 -0700 | [diff] [blame] | 847 | init_attr.chan = qhp->ep->l2t->smt_idx; |
Steve Wise | f8b0dfd | 2008-04-29 13:46:52 -0700 | [diff] [blame] | 848 | if (peer2peer) { |
| 849 | init_attr.rtr_type = RTR_READ; |
| 850 | if (init_attr.ord == 0 && qhp->attr.mpa_attr.initiator) |
| 851 | init_attr.ord = 1; |
| 852 | if (init_attr.ird == 0 && !qhp->attr.mpa_attr.initiator) |
| 853 | init_attr.ird = 1; |
| 854 | } else |
| 855 | init_attr.rtr_type = 0; |
Steve Wise | de3d353 | 2007-05-14 13:27:27 -0500 | [diff] [blame] | 856 | init_attr.irs = qhp->ep->rcv_seq; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 857 | PDBG("%s init_attr.rq_addr 0x%x init_attr.rq_size = %d " |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 858 | "flags 0x%x qpcaps 0x%x\n", __func__, |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 859 | init_attr.rq_addr, init_attr.rq_size, |
| 860 | init_attr.flags, init_attr.qpcaps); |
| 861 | ret = cxio_rdma_init(&rhp->rdev, &init_attr); |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 862 | PDBG("%s ret %d\n", __func__, ret); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 863 | return ret; |
| 864 | } |
| 865 | |
| 866 | int iwch_modify_qp(struct iwch_dev *rhp, struct iwch_qp *qhp, |
| 867 | enum iwch_qp_attr_mask mask, |
| 868 | struct iwch_qp_attributes *attrs, |
| 869 | int internal) |
| 870 | { |
| 871 | int ret = 0; |
| 872 | struct iwch_qp_attributes newattr = qhp->attr; |
| 873 | unsigned long flag; |
| 874 | int disconnect = 0; |
| 875 | int terminate = 0; |
| 876 | int abort = 0; |
| 877 | int free = 0; |
| 878 | struct iwch_ep *ep = NULL; |
| 879 | |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 880 | PDBG("%s qhp %p qpid 0x%x ep %p state %d -> %d\n", __func__, |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 881 | qhp, qhp->wq.qpid, qhp->ep, qhp->attr.state, |
| 882 | (mask & IWCH_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); |
| 883 | |
| 884 | spin_lock_irqsave(&qhp->lock, flag); |
| 885 | |
| 886 | /* Process attr changes if in IDLE */ |
| 887 | if (mask & IWCH_QP_ATTR_VALID_MODIFY) { |
| 888 | if (qhp->attr.state != IWCH_QP_STATE_IDLE) { |
| 889 | ret = -EIO; |
| 890 | goto out; |
| 891 | } |
| 892 | if (mask & IWCH_QP_ATTR_ENABLE_RDMA_READ) |
| 893 | newattr.enable_rdma_read = attrs->enable_rdma_read; |
| 894 | if (mask & IWCH_QP_ATTR_ENABLE_RDMA_WRITE) |
| 895 | newattr.enable_rdma_write = attrs->enable_rdma_write; |
| 896 | if (mask & IWCH_QP_ATTR_ENABLE_RDMA_BIND) |
| 897 | newattr.enable_bind = attrs->enable_bind; |
| 898 | if (mask & IWCH_QP_ATTR_MAX_ORD) { |
| 899 | if (attrs->max_ord > |
| 900 | rhp->attr.max_rdma_read_qp_depth) { |
| 901 | ret = -EINVAL; |
| 902 | goto out; |
| 903 | } |
| 904 | newattr.max_ord = attrs->max_ord; |
| 905 | } |
| 906 | if (mask & IWCH_QP_ATTR_MAX_IRD) { |
| 907 | if (attrs->max_ird > |
| 908 | rhp->attr.max_rdma_reads_per_qp) { |
| 909 | ret = -EINVAL; |
| 910 | goto out; |
| 911 | } |
| 912 | newattr.max_ird = attrs->max_ird; |
| 913 | } |
| 914 | qhp->attr = newattr; |
| 915 | } |
| 916 | |
| 917 | if (!(mask & IWCH_QP_ATTR_NEXT_STATE)) |
| 918 | goto out; |
| 919 | if (qhp->attr.state == attrs->next_state) |
| 920 | goto out; |
| 921 | |
| 922 | switch (qhp->attr.state) { |
| 923 | case IWCH_QP_STATE_IDLE: |
| 924 | switch (attrs->next_state) { |
| 925 | case IWCH_QP_STATE_RTS: |
| 926 | if (!(mask & IWCH_QP_ATTR_LLP_STREAM_HANDLE)) { |
| 927 | ret = -EINVAL; |
| 928 | goto out; |
| 929 | } |
| 930 | if (!(mask & IWCH_QP_ATTR_MPA_ATTR)) { |
| 931 | ret = -EINVAL; |
| 932 | goto out; |
| 933 | } |
| 934 | qhp->attr.mpa_attr = attrs->mpa_attr; |
| 935 | qhp->attr.llp_stream_handle = attrs->llp_stream_handle; |
| 936 | qhp->ep = qhp->attr.llp_stream_handle; |
| 937 | qhp->attr.state = IWCH_QP_STATE_RTS; |
| 938 | |
| 939 | /* |
| 940 | * Ref the endpoint here and deref when we |
| 941 | * disassociate the endpoint from the QP. This |
| 942 | * happens in CLOSING->IDLE transition or *->ERROR |
| 943 | * transition. |
| 944 | */ |
| 945 | get_ep(&qhp->ep->com); |
| 946 | spin_unlock_irqrestore(&qhp->lock, flag); |
| 947 | ret = rdma_init(rhp, qhp, mask, attrs); |
| 948 | spin_lock_irqsave(&qhp->lock, flag); |
| 949 | if (ret) |
| 950 | goto err; |
| 951 | break; |
| 952 | case IWCH_QP_STATE_ERROR: |
| 953 | qhp->attr.state = IWCH_QP_STATE_ERROR; |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 954 | flush_qp(qhp); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 955 | break; |
| 956 | default: |
| 957 | ret = -EINVAL; |
| 958 | goto out; |
| 959 | } |
| 960 | break; |
| 961 | case IWCH_QP_STATE_RTS: |
| 962 | switch (attrs->next_state) { |
| 963 | case IWCH_QP_STATE_CLOSING: |
| 964 | BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); |
| 965 | qhp->attr.state = IWCH_QP_STATE_CLOSING; |
| 966 | if (!internal) { |
| 967 | abort=0; |
| 968 | disconnect = 1; |
| 969 | ep = qhp->ep; |
Steve Wise | 989a178 | 2008-04-29 13:46:51 -0700 | [diff] [blame] | 970 | get_ep(&ep->com); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 971 | } |
| 972 | break; |
| 973 | case IWCH_QP_STATE_TERMINATE: |
| 974 | qhp->attr.state = IWCH_QP_STATE_TERMINATE; |
Steve Wise | 856b5925 | 2008-01-21 14:42:09 -0600 | [diff] [blame] | 975 | if (qhp->ibqp.uobject) |
Steve Wise | a1a7505 | 2007-02-15 08:49:02 -0600 | [diff] [blame] | 976 | cxio_set_wq_in_error(&qhp->wq); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 977 | if (!internal) |
| 978 | terminate = 1; |
| 979 | break; |
| 980 | case IWCH_QP_STATE_ERROR: |
| 981 | qhp->attr.state = IWCH_QP_STATE_ERROR; |
| 982 | if (!internal) { |
| 983 | abort=1; |
| 984 | disconnect = 1; |
| 985 | ep = qhp->ep; |
Steve Wise | 989a178 | 2008-04-29 13:46:51 -0700 | [diff] [blame] | 986 | get_ep(&ep->com); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 987 | } |
| 988 | goto err; |
| 989 | break; |
| 990 | default: |
| 991 | ret = -EINVAL; |
| 992 | goto out; |
| 993 | } |
| 994 | break; |
| 995 | case IWCH_QP_STATE_CLOSING: |
| 996 | if (!internal) { |
| 997 | ret = -EINVAL; |
| 998 | goto out; |
| 999 | } |
| 1000 | switch (attrs->next_state) { |
| 1001 | case IWCH_QP_STATE_IDLE: |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 1002 | flush_qp(qhp); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1003 | qhp->attr.state = IWCH_QP_STATE_IDLE; |
| 1004 | qhp->attr.llp_stream_handle = NULL; |
| 1005 | put_ep(&qhp->ep->com); |
| 1006 | qhp->ep = NULL; |
| 1007 | wake_up(&qhp->wait); |
| 1008 | break; |
| 1009 | case IWCH_QP_STATE_ERROR: |
| 1010 | goto err; |
| 1011 | default: |
| 1012 | ret = -EINVAL; |
| 1013 | goto err; |
| 1014 | } |
| 1015 | break; |
| 1016 | case IWCH_QP_STATE_ERROR: |
| 1017 | if (attrs->next_state != IWCH_QP_STATE_IDLE) { |
| 1018 | ret = -EINVAL; |
| 1019 | goto out; |
| 1020 | } |
| 1021 | |
| 1022 | if (!Q_EMPTY(qhp->wq.sq_rptr, qhp->wq.sq_wptr) || |
| 1023 | !Q_EMPTY(qhp->wq.rq_rptr, qhp->wq.rq_wptr)) { |
| 1024 | ret = -EINVAL; |
| 1025 | goto out; |
| 1026 | } |
| 1027 | qhp->attr.state = IWCH_QP_STATE_IDLE; |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1028 | break; |
| 1029 | case IWCH_QP_STATE_TERMINATE: |
| 1030 | if (!internal) { |
| 1031 | ret = -EINVAL; |
| 1032 | goto out; |
| 1033 | } |
| 1034 | goto err; |
| 1035 | break; |
| 1036 | default: |
| 1037 | printk(KERN_ERR "%s in a bad state %d\n", |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 1038 | __func__, qhp->attr.state); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1039 | ret = -EINVAL; |
| 1040 | goto err; |
| 1041 | break; |
| 1042 | } |
| 1043 | goto out; |
| 1044 | err: |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 1045 | PDBG("%s disassociating ep %p qpid 0x%x\n", __func__, qhp->ep, |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1046 | qhp->wq.qpid); |
| 1047 | |
| 1048 | /* disassociate the LLP connection */ |
| 1049 | qhp->attr.llp_stream_handle = NULL; |
| 1050 | ep = qhp->ep; |
| 1051 | qhp->ep = NULL; |
| 1052 | qhp->attr.state = IWCH_QP_STATE_ERROR; |
| 1053 | free=1; |
| 1054 | wake_up(&qhp->wait); |
| 1055 | BUG_ON(!ep); |
Steve Wise | db4106c | 2012-03-07 16:48:46 -0600 | [diff] [blame] | 1056 | flush_qp(qhp); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1057 | out: |
| 1058 | spin_unlock_irqrestore(&qhp->lock, flag); |
| 1059 | |
| 1060 | if (terminate) |
| 1061 | iwch_post_terminate(qhp, NULL); |
| 1062 | |
| 1063 | /* |
| 1064 | * If disconnect is 1, then we need to initiate a disconnect |
| 1065 | * on the EP. This can be a normal close (RTS->CLOSING) or |
| 1066 | * an abnormal close (RTS/CLOSING->ERROR). |
| 1067 | */ |
Steve Wise | 989a178 | 2008-04-29 13:46:51 -0700 | [diff] [blame] | 1068 | if (disconnect) { |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1069 | iwch_ep_disconnect(ep, abort, GFP_KERNEL); |
Steve Wise | 989a178 | 2008-04-29 13:46:51 -0700 | [diff] [blame] | 1070 | put_ep(&ep->com); |
| 1071 | } |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1072 | |
| 1073 | /* |
| 1074 | * If free is 1, then we've disassociated the EP from the QP |
| 1075 | * and we need to dereference the EP. |
| 1076 | */ |
| 1077 | if (free) |
| 1078 | put_ep(&ep->com); |
| 1079 | |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 1080 | PDBG("%s exit state %d\n", __func__, qhp->attr.state); |
Steve Wise | b038ced | 2007-02-12 16:16:18 -0800 | [diff] [blame] | 1081 | return ret; |
| 1082 | } |